Thermoelectric Cooler Optimization for Deployment in Electronics Thermal Management Thermoelectric coolers (TEC) are solid state refrigeration devices which use DC current to generate cooling or heating. Unlike traditional vapor-compression refrigeration system, thermoelectric cooling has no moving parts and circulating fluid. Its simple structure and small size makes it a good choice for a thermal management device in electronics. However, the low coefficient of performance (COP) of a TEC hampers its wide deployment. As illustrated in Figure 1, a typical thermoelectric module is manufactured using two thin ceramic wafers with a series of P and N doped bismuthtelluride semiconductor material sandwiched between them. The ceramic wafer on both sides of the module adds rigidity and the necessary electrical insulation. Figure 1. Illustration of a Thermoelectric Module [1] 4 When a DC current is applied to a TEC, the TEC can work as a cooler or heater depending on the direction of current. When working as a cooler, the TEC maintains a low temperature at the cold side by transferring heat from the cold side to the hot side against the temperature gradient. When working as a heater, the TEC transfers heat from the hot side of the device to the cold side. For electronics thermal management, a TEC is generally used as cooler to maintain or lower the chip’s junction temperature. Despite poor thermal performance, TEC modules can be a good and reliable solution for the applications that require temperature stability, sub-ambient operating conditions, or devices with a special design to accommodate TECs. This paper discusses an optimization process for using a TEC model to maintain a high-power electronic component’s junction temperature inside an air-cooled chassis at certain level. Figure 2 illustrates the application. A chip (J1) is a 40X40 mm device located on the back of the PCB and it dissipates a maximum of 50 Watts. For the stable operation of a chip, its junction temperature has to be maintained below 25˚C. The junction-tocase thermal resistance of the chip is 0.1˚C/W. The ambient temperature is 25˚C at the chassis inlet and 30˚C in front of the chip. For the sake of simplicity, all the interfacial and contact resistances are ignored. Cooled by the TEC, the junction temperature of the chip is, Tj = Tc + (Rjc + RTIM)q (1) where Tc is the TEC cold side temperature, and Rjc is the thermal resistance of chip from junction to case, and RTIM is the thermal resistance of thermal interface material used both between TEC and chip and between TEC and heat sink. The COP of the TEC for cooling is defined as, COP = q W (2) where q is the heat removed from the cold side by TEC and W is the electric energy consumed by TEC. The heat sink temperature is, Ths = Th = Ta + (Rhs + RTIM)(q + W) (3) Figure 2. Chip and Board Layout 1. Regular TEC Cooling Method To keep the chip junction temperature below 25˚C, a cooling method has to be applied. The regular method is putting a heat sink with an integrated TEC module on top of the heat sink. Figure 3 shows the concept. A TEC module is sandwiched between the chip and the air-cooled heat sink. Where Th is the TEC hot side temperature, Ta is the local air temperature, and Rhs is thermal resistance of heat sink from base to ambient. Equation 3 can be written as, Th = Ta + (Rhs + RTIM)(1 + 1 )q COP (4) Let, ΔTTEC = Th - Tc (5) The junction temperature of device becomes, Tj = Ta + (Rjc + RTIM)q + (Rhs + RTIM)(1 + Figure 3. Schematic of a Heat Sink with TEC 1 )q - ΔTTEC (6) COP For the TEC, the value of ∆TTEC is directly proportional to the voltage applied on the TEC module. Generally the larger the ∆TTEC is, the larger the voltage applied and energy consumed by TEC module are. FEBRUARY 2014 |Qpedia 5 Assuming the thermal resistance of the heat sink is 0.2˚C/W, which is reasonable for a high performance heat sink with forced air cooling and the thermal resistance of thermal interface material (grease) is 0.01˚C/W, Equation 6 becomes, 25 = 30 + (0.1 +0.01) x 50 + (0.2 + 0.01) 1 (1 + )50 - ∆TTEC COP (7) The ∆TTEC required is, ∆TTEC = 21 + 10.5 COP (8) 2. Optimized TEC Cooling Method An optimized TEC cooling method that can minimize the required ∆TTEC is shown in Figure 4. A copper block with integrated heat pipes is mounted on the top of the chip. The heat pipes transfer the heat dissipated by the chip to the heat sink module located at the front of the chassis. This design has two distinct advantages: 1. The air temperature at inlet is lower than that of the air in front of the chip 2. The heat sink can have a larger size and more complicated design, its thermal performance also improves with uniform inlet flow The junction temperature of the chip is as follows, 1 Tj = Ta + (Rjc + RTIM + Rhp)q + (Rhs + RTIM)(1 + )q - ΔTTEC (9) COP Figure 4. Optimized Heat Sink with TEC Module ∆TTEC = 11.5 + 5.5 COP To evaluate the two TEC cooling methods, a TEC (RC12-8) from Marlow industries [2] is selected for the calculation. The image of the RC12-8 is shown in Figure 5. The specifications of the RC12-8 are shown in Table 1. Where Rhp is the thermal resistance of the heat pipe. In the optimized case, the ambient temperature is 25˚C, the thermal resistance of the heat sink can be as low as 0.1˚C/W, and the thermal resistance of the heat pipe can be in the order of 0.01˚C/W. Equation 9 becomes: 25 = 25+ (0.1 x 0.01 + 0.01) x 50 + (0.1 + 0.01) 1 (1 + )50 - ∆TTEC (10) COP 6 (11) Figure 5. Marlow RC12-8 TEC [2] RC12-8 (40mm x 40mm x 3.6mm) Hot Side Temperature 27 50 ΔTmax (°C) 66 74 qmax (watts) 71 78 Imax (amps) 7.4 7.4 Vmax (vdc) 14.7 16.4 So the COP of the TEC is, COP = (12) For the regular TEC solution, ∆TTEC_required = 21 + Table 1. Marlow RC12-8 TEC Specifications [2] The performance curves of RC12-8 at 50˚C hot side temperature are shown in Figure 6. 50 = 0.476 15x7 10.5 = 43°C > 25°C 0.476 (13) The ∆TTEC_required is larger than the maximum ∆TTEC that RC12-8 can generate, which means the solution does not work. For the optimized TEC solution, ∆TTEC_required = 11.5 + 5.5 = 23°C < 25°C 0.476 (14) The ∆TTEC_required is smaller than the maximum ∆TTEC that RC12-8 can generate. The estimated hot side temperature of the TEC is 42˚C and the cold side is 19˚C. So the optimized solution works and the chip junction temperature can be maintained lower than 25˚C even at 50 Watts maximum power. The electrical and thermal performance of current TEC’s is still low compared with other refrigeration methods. However, this paper shows that TEC cooling is feasible for high-power chips by laying out the heat sink cleverly and utilizing heat pipe. The keys for successfully using the TEC for electronic cooling applications are optimizing the design to decrease ∆TTEC to reach better COP and using high performance heat sinks. References: Figure 6. Marlow RC12-8 TEC Performance Curves [2] Working at 50˚C hot side temperature and transferring 50 Watts heat load, the maximum ∆TTEC that RC12-8 can generate is 25˚C, see Figure 6. At this operating condition, the voltage applied on the TEC is 15V and the current consumed by the TEC is 7A. 1. http://www.melcor.com/tec_intro.html 2. http://www.marlow.com/ Learn More FEBRUARY 2014 |Qpedia 7 98 112 21 fine + superfine fin pitch designs course fin pitch designs compression spring types 82 18 108,000 cross-cut designs maxiFLOWTM designs 128 straight fin designs 30 push pin options push pin heat sink configurations available pushPIN TM www.qats.com