HS-1840ARH Data Sheet Rad-Hard 16 Channel CMOS Analog Multiplexer with High-Z Analog Input Protection The HS-1840ARH is a radiation hardened, monolithic 16 channel multiplexer constructed with the Intersil Rad-Hard Silicon Gate, bonded wafer, Dielectric Isolation process. It is designed to provide a high input impedance to the analog source if device power fails (open), or the analog signal voltage inadvertently exceeds the supply by up to ±35V, regardless of whether the device is powered on or off. Excellent for use in redundant applications, since the secondary device can be operated in a standby unpowered mode affording no additional power drain. More significantly, a very high impedance exists between the active and inactive devices preventing any interaction. One of sixteen channel selection is controlled by a 4-bit binary address plus an Enable-Inhibit input which conveniently controls the ON/OFF operation of several multiplexers in a system. All inputs have electrostatic discharge protection. The HS-1840ARH is processed and screened in full compliance with MIL-PRF-38535 and QML standards. The device is available in a 28 lead SBDIP and a 28 lead Ceramic Flatpack. Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for these devices are contained in SMD 5962-95630. A “hot-link” is provided on our homepage for downloading. http://www.intersil.com/spacedefense/space.htm August 1999 File Number 4355.1 Features • Electrically Screened to SMD # 5962-95630 • QML Qualified per MIL-PRF-38535 Requirements • Pin-to-Pin for Intersil’s HS-1840RH and HS-1840/883S • Improved Radiation Performance - Gamma Dose (γ) 3 x 105RAD(Si) • Improved rDS(ON) Linearity • Improved Access Time 1.5µs (Max) Over Temp and Post Rad • High Analog Input Impedance 500MΩ During Power Loss (Open) • ±35V Input Over Voltage Protection (Power On or Off) • Dielectrically Isolated Device Islands • Excellent in Hi-Rel Redundant Systems • Break-Before-Make Switching • No Latch-Up Ordering Information ORDERING NUMBER INTERNAL MKT. NUMBER TEMP. RANGE (oC) 5962F9563002QXC HS1-1840ARH-8 -55 to 125 5962F9563002QYC HS9-1840ARH-8 -55 to 125 5962F9563002V9A HS0-1840ARH-Q 25 5962F9563002VXC HS1-1840ARH-Q -55 to 125 5962F9563002VYC HS9-1840ARH-Q -55 to 125 HS1-1840ARH/PROTO HS1-1840ARH/PROTO -55 to 125 HS9-1840ARH/PROTO HS9-1840ARH/PROTO -55 to 125 Pinouts HS1-1840ARH (SBDIP) CDIP2-T28 TOP VIEW HS9-1840ARH (FLATPACK) CDFP3-F28 TOP VIEW +VS 1 28 OUT +VS 1 28 OUT NC 2 27 -VS NC 2 27 -VS NC 3 26 IN 8 NC 3 26 IN 8 IN 16 4 25 IN 7 IN 15 5 24 IN 6 IN 14 6 23 IN 5 25 IN 7 IN 16 4 IN 15 5 24 IN 6 IN 14 6 23 IN 5 IN 13 7 22 IN 4 IN 13 7 22 IN 4 IN 12 8 21 IN 3 IN 12 8 21 IN 3 IN 11 9 20 IN 2 IN 11 9 20 IN 2 IN 10 10 19 IN 1 IN 9 11 18 ENABLE GND 12 17 ADDR A0 (+5VS) VREF 13 16 ADDR A1 ADDR A3 14 15 ADDR A2 19 IN 1 IN 10 10 IN 9 11 18 ENABLE GND 12 17 ADDR A0 (+5VS) VREF 13 16 ADDR A1 ADDR A3 14 15 ADDR A2 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 HS-1840ARH Functional Diagram IN 1 A0 1 P A1 DIGITAL ADDRESS A2 OUT A3 16 P EN IN 16 ADDRESS INPUT BUFFER AND LEVEL SHIFTER TRUTH TABLE A3 A2 A1 A0 EN “ON” CHANNEL X X X X H None L L L L L 1 L L L H L 2 L L H L L 3 L L H H L 4 L H L L L 5 L H L H L 6 L H H L L 7 L H H H L 8 H L L L L 9 H L L H L 10 H L H L L 11 H L H H L 12 H H L L L 13 H H L H L 14 H H H L L 15 H H H H L 16 2 DECODERS MULTIPLEX SWITCHES HS-1840ARH Burn-In/Life Test Circuits R +VS R GND F4 R +VS 28 1 2 3 -VS 27 4 5 6 26 25 24 23 7 8 9 10 11 12 13 14 22 21 20 19 18 17 16 15 R R F5 F1 F2 F3 GND VR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 -VS R R NOTES: NOTES: VS+ = +15.5V ±0.5V, VS- = -15.5V ±0.5V. R = 1kΩ ±5%, 1/4W. R = 1kΩ ±5%. C1 = C2 = 0.01µF minimum, 1 each per socket, minimum. C1 = C2 = 0.01µF ±10%, 1 each per socket, minimum. VS+ = 15.5V ±0.5V, VS- = -15.5V ±0.5V, VR = 15.5 ±0.5V. D1 = D2 = 1N4002, 1 each per board, minimum. FIGURE 2. STATIC BURN-IN TEST CIRCUIT Input Signals: square wave, 50% duty cycle, 0V to 15V peak ±10%. F1 = 100kHz; F2 = F1/2; F3 = F1/4; F4 = F1/8; F5 = F1/16. FIGURE 1. DYNAMIC BURN-IN AND LIFE TEST CIRCUIT NOTES: 1. The above test circuits are utilized for all package types. 2. The Dynamic Test Circuit is utilized for all life testing. Irradiation Circuit HS-1840ARH +15V 1 28 NC 2 27 NC 3 26 +1V 4 25 5 24 6 23 7 22 8 21 9 20 10 19 11 18 12 17 13 16 14 15 +5V NOTE: 3. All irradiation testing is performed in the 28 lead CERDIP package. 3 -15V 1kΩ HS-1840ARH Die Characteristics DIE DIMENSIONS: ASSEMBLY RELATED INFORMATION: (2820µm x 4080µm x 483µm ±25.4µm) 111 mils x 161 mils x 19 mils ±1 mil Substrate Potential: Unbiased (DI) INTERFACE MATERIALS: ADDITIONAL INFORMATION: Glassivation: Worst Case Current Density: Type: PSG (Phosphorus Silicon Glass) Thickness: 8.0kÅ ±1kÅ Modified SEM Transistor Count: Top Metallization: 407 Type: AlSiCu Thickness: 16.0kÅ ±2kÅ Process: Backside Finish: Radiation Hardened Silicon Gate, Bonded Wafer, Dielectric Isolation Silicon Metallization Mask Layout IN1 IN2 IN3 IN4 IN5 IN6 IN7 HS-1840ARH IN8 ENABLE A0 -V A1 OUT A2 A3 +V VREF IN16 IN9 IN10 IN11 IN12 IN13 IN14 IN15 GND All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com 4