ASM3P2111 D

ASM3P2111B
Peak EMI Reducing Solution
Features
• Generates an EMI optimized clock at the output.
• Input frequency: 25MHz.
• Frequency outputs:
o 60MHz (unmodulated)
o 2 x 48MHz (unmodulated)
o 66.6MHz (modulated): -1.7% down spread
• Modulation rate: 30KHz.
• Supply voltage range: 3.3V ± 0.3V.
number of circuit board layers and shielding that are
required to pass EMI regulations. The ASM3P2111B
modulates the output of PLL in order to spread the
bandwidth of a synthesized clock, thereby decreasing the
peak amplitudes of its harmonics. This results in
significantly lower system EMI compared to the typical
narrow band signal produced by oscillators and most
clock generators. Lowering EMI by increasing a signal’s
bandwidth is called spread spectrum clock generation.
• Available in 8-pin SOIC Package.
Applications
• RoHS Compliant
ASM3P2111B is targeted towards EMI management for
high speed digital applications such as PC peripheral
devices, consumer electronics and embedded controller
systems.
Product Description
The ASM3P2111B is a versatile spread spectrum
frequency modulator that reduces electromagnetic
interference (EMI) at the clock source. The ASM3P2111B
allows significant system cost savings by reducing the
Block Diagram
VDD
60MHz
XIN / CLKIN
Crystal
Oscillator
PLL1
48MHz_1
XOUT
48MHz_2
48MHz_1
PLL2
66.6MHz
Modulated
VSS
©2010 SCILLC. All rights reserved.
JANUARY 2010 – Rev. 1
Publication Order Number:
ASM3P2111/D
ASM3P2111B
Pin Configuration
XIN/ CLKIN
1
XOUT
2
8
VSS
7
66.6MHz
ASM3P2111B
VDD
3
6
48MHz_1
60MHz
4
5
48MHz_2
Pin Description
Description
Pin #
Pin Name
Type
1
XIN / CLKIN
I
Connection to crystal
2
XOUT
O
Connection to crystal
3
VDD
P
Power supply for the analog and digital blocks (+3.3V)
4
60MHz
O
Clock output-1 60MHz un-modulated
5
48MHz_2
O
Clock output-2 48MHz_2 un-modulated
6
48MHz_1
O
Clock output-3 48MHz_1 un-modulated
7
66.6MHz
O
Clock output-4 66.6MHz modulated
8
VSS
P
Ground to entire chip. Connect to System Ground
Rev. 1 | Page 2 of 7 | www.onsemi.com
ASM3P2111B
Absolute Maximum Ratings
Symbol
VDD, VIN
TSTG
Rating
Unit
Voltage on any pin with respect to Ground
Parameter
-0.5 to +4.6
V
Storage temperature
-65 to +125
°C
Ts
Max. Soldering Temperature (10 sec)
260
°C
TJ
Junction Temperature
Static Discharge Voltage
(As per JEDEC STD22- A114-B)
150
°C
2
KV
TDV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Operating Conditions
Symbol
Parameter
VDD
Supply Voltage
FXIN
Crystal Resonator Frequency
Min
Typ
Max
3
3.3
3.6
25
TA
Operating Temperature
-40
CL
Output Driver Load Capacitance
Rev. 1 | Page 3 of 7 | www.onsemi.com
Unit
V
MHz
+85
°C
15
pF
ASM3P2111B
DC Electrical Characteristics
Parameter
Symbol
Conditions / Description
Min
Typ
Max
Unit
IDD
VDD = 3.3V, FCLK = 25MHz, CL = 15pF
41
48
62
mA
IDDL
VDD = 3.3V, Clock Input = 0
20
25
35
mA
VIH
VDD = 3.3V
2.0
VDD+0.3
V
VIL
VDD =3.3V
VSS-0.3
0.8
V
IIH
-1
1
µA
IIL
-20
-80
µA
Overall
Supply Current,
Dynamic
Supply Current,
Static
All input pins
High-Level Input
Voltage
Low-Level Input
Voltage
High-Level Input
Current
Low-Level Input
Current (pull-up)
High-Level Output
Source Current
Low-Level Output
Sink Current
-36
IxOH
VDD = V (XIN) = 3.3V, VO= 0.4V
3
mA
IxOL
VDD = 3.3V, V (XIN) = VO = 2.5V
3
mA
IOH
VO = 2.5V
-20
mA
IOL
VO = 0.4V
23
mA
ZOH
VO = 0.5 VDD; output driving high
29
ZOL
VO = 0.5 VDD; output driving low
27
Ω
Clock Outputs
High-Level Output
Source Current
Low-Level Output
Sink Current
Output Impedance
AC Electrical Characteristics
Parameter
Symbol
Rise Time
tr
Fall Time
tf
Clock Duty
Cycle
Conditions / Description
VO = 0.8V to 2.0V;
CL = 15pF
VO = 2.0V to 0.8V;
CL = 15pF
Min
Typ
Max
Unit
300
800
900
pS
360
800
900
pS
55
%
Ratio of pulse width (as measured from
rising edge to next falling edge at VDD /2) to
one clock period
Note: 1. CL = 15pF, Input clock frequency = 25MHz.
Rev. 1 | Page 4 of 7 | www.onsemi.com
45
ASM3P2111B
Typical Crystal Specifications
Fundamental AT cut parallel resonant crystal
Nominal frequency
25MHz
Frequency tolerance
± 50 ppm or better at 25°C
Operating temperature range
-25°C to +85°C
Storage temperature
-40°C to +85°C
Load capacitance(CP)
18pF
Shunt capacitance
7pF maximum
ESR
25 Ω
Note: Note: CL is Load Capacitance and Rx is used to prevent oscillations at overtone frequency of the Fundamental frequency.
Typical Crystal Interface Circuit
R
Crystal
CL
Rx
CL
CL = 2*(CP – CS),
Where CP = Load capacitance of crystal
CS = Stray capacitance due to CIN, PCB, Trace etc.
Rev. 1 | Page 5 of 7 | www.onsemi.com
ASM3P2111B
Package Information
8-lead (150-mil) SOIC Package
H
E
D
A2
A
θ
C
D
e
A1
L
B
Dimensions
Symbol
Inches
Min
Max
Millimeters
Min
Max
A1
0.004
0.010
0.10
0.25
A
0.053
0.069
1.35
1.75
A2
0.049
0.059
1.25
1.50
B
0.012
0.020
0.31
0.51
C
0.007
0.010
0.18
0.25
D
0.193 BSC
4.90 BSC
E
0.154 BSC
3.91 BSC
e
0.050 BSC
1.27 BSC
H
0.236 BSC
6.00 BSC
L
0.016
0.050
θ
0°
8°
0.41
1.27
0°
8°
Rev. 1 | Page 6 of 7 | www.onsemi.com
ASM3P2111B
Ordering Codes
Part number
Marking
ASM3P2111BG-08SR
Package Configuration
AEI
Temperature Range
8-pin SOIC TAPE & REEL, Green
0°C to +70°C
A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free
Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.
Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003.
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
ON Semiconductor and
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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