ASM3P2863A D

ASM3P2863A
Product Preview
Low Power Peak EMI
Reducing Solution
Description
The ASM3P2863A is a versatile spread spectrum frequency
modulator designed specifically for a wide range of clock frequencies.
The ASM3P2863A reduces electromagnetic interference (EMI) at the
clock source, allowing system wide reduction of EMI of all clock
dependent signals. The ASM3P2863A allows significant system cost
savings by reducing the number of circuit board layers, ferrite beads
and shielding that are traditionally required to pass EMI regulations.
The ASM3P2863A uses the most efficient and optimized
modulation profile approved by the FCC and is implemented by using
a proprietary all digital method.
The ASM3P2863A modulates the output of a single PLL in order to
“spread” the bandwidth of a synthesized clock, and more importantly,
decreases the peak amplitudes of its harmonics. This results in
significantly lower system EMI compared to the typical narrow band
signal produced by oscillators and most frequency generators.
Lowering EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation.’
Applications
The ASM3P2863A is targeted towards all portable devices with
very low power requirements like MP3 players, Notebooks and
Digital still cameras.
•
•
•
TSOT−6
O SUFFIX
CASE 419AF
TSSOP−8
T SUFFIX
CASE 948AL
SOIC−8
S SUFFIX
CASE 751BD
PIN CONFIGURATIONS
1
REFOUT
VSS
ModOUT
XOUT
VDD
XIN / CLKIN
6−Pin TSOT−23 Package
(Top View)
1
VDD
XIN / CLKIN
Features
•
•
•
•
•
•
•
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Generates an EMI Optimized Clock Signal at the Output
Integrated Loop Filter Components
Operates with a 3.3 V / 2.5 V Supply
Operating Current less than 4 mA
Low Power CMOS Design
Input Frequency: 12 MHz
Generates a 1X Low EMI Spread Spectrum Clock of the Input
Frequency
Frequency Deviation: ±0.4% (Typ) @ 12 MHz Input Frequency
Available in 6−pin TSOT−23, 8−pin SOIC and 8−pin TSSOP
Packages
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
NC
XOUT
ModOUT
REFOUT
VSS
NC
8−Pin SOIC and TSSOP Packages
(Top View)
KEY SPECIFICATIONS
Specification
Description
Supply Voltages
VDD = 2.5 V / 3.3 V
Cycle−to−Cycle Jitter
200 pS (Typ)
Output Duty Cycle
45/55% (worst case)
Modulation Rate Equation
FIN/256
Frequency Deviation
±0.4% (Typ) @
12 MHz
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
August, 2011 − Rev. P2
1
Publication Order Number:
ASM3P2863A/D
ASM3P2863A
VDD
XIN / CLKIN
XOUT
PLL
Modulation
Frequency
Divider
Crystal
Oscillator
Phase
Detector
Feedback
Divider
Loop
Filter
VCO
Output
Divider
ModOUT
REFOUT
VSS
Figure 1. Block Diagram
Table 1. PIN DESCRIPTION (6−Pin TSOT−23 Package)
Pin#
Pin Name
Type
Description
1
REFOUT
O
Buffered output of the input frequency.
2
XOUT
O
Crystal connection. If using an external reference, this pin must be left unconnected.
3
XIN / CLKIN
I
Crystal connection or external reference frequency input. This pin has dual functions. It can be
connected either to an external crystal or an external reference clock.
4
VDD
P
Power supply for the entire chip.
5
ModOUT
O
Spread spectrum clock output.
6
VSS
P
Ground connection.
Table 2. PIN DESCRIPTION (8−Pin SOIC and TSSOP Packages)
Pin#
Pin Name
Type
1
XIN / CLKIN
I
Crystal connection or external reference frequency input. This pin has dual functions. It can be
connected either to an external crystal or an external reference clock.
Description
2
XOUT
O
Crystal connection. If using an external reference, this pin must be left unconnected.
3
REFOUT
O
Buffered output of the input frequency.
4
NC
−
No connect.
5
VSS
P
Ground connection.
6
ModOUT
O
Spread spectrum clock output.
7
NC
−
No connect.
8
VDD
P
Power supply for the entire chip.
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2
ASM3P2863A
Figure 2. Modulation Profile
Table 3. SPECIFICATIONS
Description
Specification
Input Frequency
12 MHz
Modulation Equation
FIN/256
Frequency Deviation
±0.4% (Typ) @ 12 MHz
Table 4. ABSOLUTE MAXIMUM RATINGS
Symbol
VDD, VIN
TSTG
Parameter
Rating
Unit
Voltage on any input pin with respect to Ground
−0.5 to +4.6
V
Storage temperature
−65 to +125
°C
Ts
Max. Soldering Temperature (10 sec)
260
°C
TJ
Junction Temperature
150
°C
2
KV
TDV
Static Discharge Voltage (As per JEDEC STD22− A114−B)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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3
ASM3P2863A
Table 5. DC ELECTRICAL CHARACTERISTICS FOR 2.5 V SUPPLY
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated.)
Parameter
Symbol
Min
Typ
Max
Unit
VIL
Input low voltage
VSS−0.3
−
0.8
V
VIH
Input high voltage
2.0
−
VDD+0.3
V
IIL
Input low current
−
−
−35
mA
IIH
Input high current
−
−
35
mA
IXOL
XOUT output low current (@ 0.5 V, VDD = 2.5 V)
−
3
−
mA
IXOH
XOUT output high current (@ 1.8 V, VDD = 2.5 V)
−
3
−
mA
VOL
Output low voltage (VDD = 2.5 V, IOL = 8 mA)
−
−
0.6
V
VOH
Output high voltage (VDD = 2.5 V, IOH = 8 mA)
1.8
−
−
V
IDD
Static supply current (Note 1)
−
0.8
−
mA
ICC
Dynamic supply current (2.5 V, 12 MHz and no load)
−
3
−
mA
2.375
2.5
2.625
V
Power−up time (first locked cycle after power−up)
−
−
5
mS
Output impedance
−
50
−
W
Min
Typ
Max
Unit
Input frequency
−
12
−
MHz
Output frequency
−
12
−
MHz
VDD
tON
ZOUT
Operating voltage
1. XIN / CLKIN pin is pulled low.
Table 6. AC ELECTRICAL CHARACTERISTICS FOR 2.5 V SUPPLY
Symbol
CLKIN
ModOUT
fd
Parameter
−
±0.4
−
%
tLH (Note 2)
Frequency Deviation
Output rise time (measured from 0.7 V to 1.7 V)
0.5
1.5
1.7
nS
tHL (Note 2)
Output fall time (measured from 1.7 V to 0.7 V)
0.5
1.0
1.2
nS
tJC
Jitter (Cycle−to−Cycle)
−
200
300
pS
tD
Output duty cycle
45
50
55
%
2. tLH and tHL are measured into a capacitive load of 15 pF.
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4
ASM3P2863A
Table 7. DC ELECTRICAL CHARACTERISTICS FOR 3.3 V SUPPLY
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated.)
Parameter
Symbol
Min
Typ
Max
Unit
VIL
Input low voltage
VSS−0.3
−
0.8
V
VIH
Input high voltage
2.0
−
VDD+0.3
V
IIL
Input low current
−
−
−35
mA
IIH
Input high current
−
−
35
mA
IXOL
XOUT output low current (@ 0.4 V, VDD = 3.3 V)
−
3
−
mA
IXOH
XOUT output high current (@ 2.5 V, VDD = 3.3 V)
−
3
−
mA
VOL
Output low voltage (VDD = 3.3 V, IOL = 8 mA)
−
−
0.4
V
VOH
Output high voltage (VDD = 3.3 V, IOH = 8 mA)
2.5
−
−
V
IDD
Static supply current (Note 3)
−
1
−
mA
ICC
Dynamic supply current (3.3 V, 12 MHz and no load)
−
3.5
−
mA
3.0
3.3
3.6
V
Power−up time (first locked cycle after power−up)
−
−
5
mS
Output impedance
−
45
−
W
Min
Typ
Max
Unit
Input frequency
−
12
−
MHz
Output frequency
−
12
−
MHz
VDD
tON
ZOUT
Operating Voltage
3. XIN / CLKIN pin is pulled low.
Table 8. AC ELECTRICAL CHARACTERISTICS FOR 3.3 V SUPPLY
Symbol
CLKIN
ModOUT
fd
Parameter
−
±0.4
−
%
tLH (Note 4)
Frequency Deviation
Output rise time (measured from 0.8 V to 2.0 V)
0.5
1.4
1.6
nS
tHL (Note 4)
Output fall time (measured at 2.0 V to 0.8 V)
0.4
1.0
1.2
nS
tJC
Jitter (Cycle−to−Cycle)
−
200
300
pS
tD
Output duty cycle
45
50
55
%
4. tLH and tHL are measured into a capacitive load of 15 pF.
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5
ASM3P2863A
Table 9. CRYSTAL SPECIFICATIONS
Fundamental AT Cut Parallel Resonant Crystal
Nominal frequency
12 MHz
Frequency tolerance
±50 ppm or better at 25°C
Operating temperature range
−25°C to +85°C
Storage temperature
−40°C to +85°C
Load capacitance (CP)
18 pF
Shunt capacitance
7 pF maximum
ESR
25 W
NOTE: CL is Load Capacitance and Rx is used to prevent oscillations at overtone frequency of the Fundamental frequency.
R
Crystal
XIN
Rx
XOUT
CL
CL
CL = 2*(CP – CS),
Where CP = Load capacitance of crystal from crystal vendor datasheet.
Where CS = Stray capacitance due to CIN, PCB, Trace, etc.
Figure 3. Typical Crystal Interface Circuit
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6
ASM3P2863A
PACKAGE DIMENSIONS
TSOT−23, 6 LEAD
CASE 419AF−01
ISSUE O
SYMBOL
D
MIN
NOM
A
e
E1
MAX
1.00
A1
0.01
0.05
0.10
A2
0.80
0.87
0.90
b
0.30
c
0.12
E
0.45
0.15
D
2.90 BSC
E
2.80 BSC
E1
1.60 BSC
e
0.95 TYP
L
0.30
L1
0.40
0.20
0.50
0.60 REF
L2
0.25 BSC
0º
θ
8º
TOP VIEW
A2 A
b
q
L
A1
c
L1
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-193.
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7
L2
ASM3P2863A
PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD−01
ISSUE O
E1
E
SYMBOL
MIN
A
1.35
1.75
A1
0.10
0.25
b
0.33
0.51
c
0.19
0.25
D
4.80
5.00
E
5.80
6.20
E1
3.80
4.00
MAX
1.27 BSC
e
PIN # 1
IDENTIFICATION
NOM
h
0.25
0.50
L
0.40
1.27
θ
0º
8º
TOP VIEW
D
h
A1
θ
A
c
e
b
L
END VIEW
SIDE VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
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8
ASM3P2863A
PACKAGE DIMENSIONS
TSSOP8, 4.4x3
CASE 948AL−01
ISSUE O
b
SYMBOL
MIN
NOM
A
E1
E
MAX
1.20
A1
0.05
A2
0.80
b
0.19
0.30
c
0.09
0.20
D
2.90
3.00
3.10
E
6.30
6.40
6.50
E1
4.30
4.40
4.50
0.15
0.90
e
0.65 BSC
L
1.00 REF
L1
0.50
θ
0º
0.60
1.05
0.75
8º
e
TOP VIEW
D
A2
c
q1
A
A1
L1
SIDE VIEW
L
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
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9
ASM3P2863A
Table 10. ORDERING INFORMATION
Part Number
Marking
ASM3P2863AF−06OR
V4LL
ASM3P2863AF−08TT
Package Type
Temperature
6−Pin TSOT−23, TAPE & REEL, Pb Free
Commercial
3P2863AF
8−Pin TSSOP, TUBE, Pb Free
Commercial
ASM3P2863AF−08TR
3P2863AF
8−Pin TSSOP, TAPE & REEL, Pb Free
Commercial
ASM3P2863AF−08ST
3P2863AF
8−Pin SOIC, TUBE, Pb Free
Commercial
ASM3P2863AF−08SR
3P2863AF
8−Pin SOIC, TAPE & REEL, Pb Free
Commercial
ASM3P2863AG−06OR
V3LL
6−Pin TSOT−23, TAPE & REEL, Green
Commercial
ASM3P2863AG−08TT
3P2863AG
8−Pin TSSOP, TUBE, Green
Commercial
ASM3P2863AG−08TR
3P2863AG
8−Pin TSSOP, TAPE & REEL, Green
Commercial
ASM3P2863AG−08ST
3P2863AG
8−Pin SOIC, TUBE, Green
Commercial
ASM3P2863AG−08SR
3P2863AG
8−Pin SOIC, TAPE & REEL, Green
Commercial
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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PUBLICATION ORDERING INFORMATION
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Sales Representative
ASM3P2863A/D
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