AMIS 41682 D

AMIS-41682, AMIS-41683
Fault Tolerant CAN
Transceiver
Description
Features
• Fully Compatible with ISO11898−3 Standard
• Optimized for In−Car Low−speed Communication
www.onsemi.com
PIN ASSIGNMENT
INH
1
14
VBAT
TxD
2
13
GND
RxD
3
12
CANL
ERR
4
11
CANH
STB
5
10
VCC
EN
6
9
RTL
WAKE
7
8
RTH
AMIS−4168x
The new AMIS−41682 and AMIS−41683 are interfaces between the
protocol controller and the physical wires of the bus lines in a control
area network (CAN). AMIS−41683 is identical to the AMIS−41682
but has a true 3.3 V digital interface to the CAN controller. The device
provides differential transmit capability but will switch in error
conditions to a single−wire transmitter and/or receiver. Initially it will
be used for low speed applications, up to 125 kB, in passenger cars.
Both AMIS−41682 and AMIS−41683 are implemented in I2T100
technology enabling both high−voltage analog circuitry and digital
functionality to co−exist on the same chip.
These products consolidate the expertise of ON Semiconductor for
in−car multiplex transceivers and support together with
0REMX−002−XTP (VAN), AMIS−30660 and AMIS−30663 (CAN
high speed) and AMIS−30600 (LIN) another widely used physical
layer.
♦
•
Baud Rate up to 125 kB
♦ Up to 32 Nodes can be Connected
PC20041029.1
(Top View)
♦ Due to Built−in Slope Control function and a very Good Matching
ORDERING INFORMATION
of the CANL and CANH bus outputs, this device realizes a very
See detailed ordering and shipping information in the package
low electromagnetic emission (EME)
dimensions section on page 14 of this data sheet.
♦ Fully Integrated Receiver Filters
♦ Permanent Dominant Monitoring of Transmit Data Input
♦ Differential Receiver with Wide Common−Mode
• Protection Issues
Range for High Electromagnetic Susceptibility
♦ Short Circuit Proof to Battery and Ground
(EMS) in Normal− and Low−Power Modes
♦ Thermal Protection
♦ True 3.3 V Digital I/O Interface to CAN Controller
♦ The Bus Lines are Protected Against Transients in
for AMIS−41683 Only
an Automotive Environment
Management in Case of Bus Failure
♦ An Unpowered Node Does not Disturb the
♦ In the Event of Bus Failures, Automatic Switching
Bus Lines
to Single−Wire Mode, even when the CANH Bus
• Support for Low Power Modes
Wire is Short−Circuited to VCC
♦ Low Current Sleep and Standby Mode with
♦ The Device will Automatically Reset to Differential
Wake−up via the Bus Lines
Mode if the Bus Failure is Removed
♦ Power−on Flag on the Output
♦ During Failure Modes There is Full Wake−up
♦ Two−Edge Sensitive Wake−up Input Signal via
Capability
Pin WAKE
♦ Unpowered Nodes do not Disturb Bus Lines
• I/Os
♦ Bus Errors and Thermal Shutdown Activation is
♦ The unpowered chip cannot be parasitically supplied
Flagged on ERR Pin
either from digital inputs or from digital outputs
• These are Pb−Free Devices*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2015
April, 2015 − Rev. 9
1
Publication Order Number:
AMIS−41682/D
AMIS−41682, AMIS−41683
Table 1. TECHNICAL CHARACTERISTICS
Symbol
Parameter
Condition
VCANH
DC Voltage at Pin CANH, CANL
0 < VCC < 5.25 V; No Time Limit
VBAT
Voltage at Pin Vbat
Load−Dump
VBAT
INH
1
WAKE
STB
EN
7
Max
Max
Unit
−40
+40
V
+40
V
VCC
10
14
POR
Mode &
wake-up
control
5
6
9
VCC (*)
TxD
GND
ERR
11
Thermal
shutdown
Driver
control
8
2
Timer
13
4
Failure
handling
Receiver
RxD
12
Filter
3
AMIS−4168x
(*) For AMIS-41682 pull up to VCC.
For AMIS-41683 pull up to VCC/2
AMIS−41683
AMIS−41682
VCC
ERR
ERR
Failure
handling
4
RxD
VCC
RxD
3
4
Failure
handling
3
Figure 1. Block Diagram
www.onsemi.com
2
RTL
CANH
CANL
RTH
AMIS−41682, AMIS−41683
Table 2. PIN DESCRIPTION
Pin
Name
1
INH
Inhibit Output for External Voltage Regulator
Description
2
TxD
Transmit Data Input; Internal Pullup Current
3
RxD
Receive Data Output
4
ERR
Error; Wake−up and Power−on Flag; Active Low
5
STB
Standby Digital Control Input; Active Low; Pulldown Resistor
6
EN
Standby Digital Control Input; Active High; Pulldown Resistor
7
WAKE
8
RTH
Pin for External Termination Resistor at CANH
9
RTL
Pin for External Termination Resistor at CANL
10
VCC
5 V Supply Input
11
CANH
Bus Line; High in Dominant State
12
CANL
Bus Line; Low in Dominant State
13
GND
Ground
14
VBAT
Battery Supply
Enable Digital Control Input; Falling and Rising Edges are Both Detected
Table 3. ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
Max
Unit
VCC
Supply Voltage on Pin VCC
−0.3
+6
V
VBAT
Battery Voltage on Pin VBAT
−0.3
+40
V
Vdig
DC Voltage on Pins EN, STB, ERR, TxD, RxD
−0.3
VCC + 0.3
V
VCANH−L
DC Voltage on Pin CANH, CANL
−40
+40
V
Vtran−CAN
−350
+350
V
VWAKE
Transient Voltage on Pins CANH and CANL (Figure 10) (Note 1)
DC Input Voltage on Pin WAKE
−40
+40
V
VINH
DC Output Voltage on Pin INH
−0.3
VBAT + 0.3
V
VRTH−L
DC Voltage on Pin RTH, RTL
−40
40
V
RRTH
Termination Resistance on Pin RTH
500
16000
W
RRTL
Termination Resistance on Pin RTL
500
16000
W
TJ
Maximum Junction Temperature
−40
+150
°C
Vesd
Electrostatic discharge voltage (CANH− and CANL Pin)
Human Body Model (Note 2)
−6
+6
kV
Electrostatic Discharge Voltage (Other Pins) Human Body Model (Note 2)
−2.0
+2.0
kV
Electrostatic Discharge Voltage; CDM (Note 3)
−500
+500
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The applied transients shall be in accordance with ISO 7637 part 1, test pulses 1, 2, 3a, and 3b. Class C operation
2. Human Body Model according Mil−Std−883C−Meth−3015.7
3. Charged Device Model according ESD−STM5.3.1−1999
Table 4. THERMAL CHARACTERISTICS
Symbol
Parameter
Conditions
Value
Unit
Rth(vj−a)
Thermal Resistance from Junction−to−Ambient in SSOP−14 Package
(Two Layer PCB)
In Free Air
140
K/W
Rth(vj−s)
Thermal Resistance from Junction−to−Substrate of Bare Die
In Free Air
30
K/W
www.onsemi.com
3
AMIS−41682, AMIS−41683
TYPICAL APPLICATION SCHEMATIC
OUT
5V−reg
IN
VBAT
*
VCC
VCC
INH
1
10
EN
ERR
CAN
STB
controller
RxD
TxD
WAKE
VBAT
14
7
9
6
4
12
AMIS−41682
5
11
3
2
8
13
GND
RTL
CANL
CANH
RTH
GND
CAN BUS LINE
PC20050610.1
* optional
Figure 2. Application Diagram AMIS−41682
OUT
3.3V−
IN
reg
OUT
5V−reg
IN
VBAT
*
4.7 k W
4.7 k W
VCC
VCC INH
10
1
EN 6
ERR 4
STB
5
RxD
3
TxD 2
3.3V CAN
controller
WAKE
7
9
RTL
12
AMIS−41683
11
13
GND
GND
* optional
VBAT
14
CANL
CANH
8 RTH
CAN BUS LINE
PC20050610.2
Figure 3. Application Diagram AMIS−41683
The functional description and characteristics are made for AMIS−41682 but are also valid for AMIS−41683. Differences
between the two devices will be explicitly mentioned in the text.
www.onsemi.com
4
AMIS−41682, AMIS−41683
FUNCTIONAL DESCRIPTION
Description
switches to the appropriate mode. The different wiring
failures are depicted in Figure 4. The figure also indicates
the effect of the different wiring failures on the transmitter
and the receiver. The detection circuit itself is not depicted.
The differential receiver threshold voltage is typically set
at 3 V (VCC = 5 V). This ensures correct reception with a
noise margin as high as possible in the normal operating
mode and in the event of failures 1, 2, 5, and 6a. These
failures, or recovery from them, do not destroy ongoing
transmissions. During the failure, reception is still done by
the differential receiver and the transmitter stays fully
active.
To avoid false triggering by external RF influences the
single−wire modes are activated after a certain delay time.
When the bus failure disappears for another time delay, the
transceiver switches back to the differential mode. When
one of the bus failures 3, 3a, 4, 6, and 7 is detected, the
defective bus wire is disabled by switching off the affected
bus termination and the respective output stage. A wake−up
from sleep mode via the bus is possible either by way of a
dominant CANH or CANL line. This ensures that a
wake−up is possible even if one of the failures 1 to 7 occurs.
If any of the wiring failure occurs, the output signal on pin
ERR will become low. On error recovery, the output signal
on pin ERR will become high again.
During all single−wire transmissions, the EMC
performance (both immunity and emission) is worse than in
the differential mode. The integrated receiver filters
suppress any HF noise induced into the bus wires. The
cut−off frequency of these filters is a compromise between
propagation delay and HF suppression. In the single−wire
mode, LF noise cannot be distinguished from the required
signal.
AMIS−41682 is a fault tolerant CAN transceiver which
works as an interface between the CAN protocol controller
and the physical wires of the CAN bus (see Figure 2). It is
primarily intended for low speed applications, up to 125 kB,
in passenger cars. The device provides differential transmit
capability to the CAN bus and differential receive capability
to the CAN controller.
The AMIS−41683 has open−drain outputs (RXD and
ERR Pins), which allow the user to use external pullup
resistors to the required supply voltage; this can be 5 V or
3.3 V.
To reduce EME, the rise and fall slope are limited.
Together with matched CANL and CANH output stages,
this allows the use of an unshielded twisted pair or a parallel
pair of wires for the bus lines.
The failure detection logic automatically selects a suitable
transmission mode, differential or single−wire transmission.
Together with the transmission mode, the failure detector
will configure the output stages in such a way that excessive
currents are avoided and the circuit returns to normal
operation when the error is removed.
A high common−mode range for the differential receiver
guarantees reception under worst case conditions and
together with the integrated filter the circuit realizes an
excellent immunity against EMS. The receivers connected
to pins CANH and CANL have threshold voltages that
ensure a maximum noise margin in single−wire mode.
A timer has been integrated at Pin TXD. This timer
prevents the AMIS−41682 from driving the bus lines to a
permanent dominant state.
Failure Detector
The failure detector is fully active in the normal operating
mode. After the detection of a single bus failure the detector
www.onsemi.com
5
AMIS−41682, AMIS−41683
Failure 1 : CANH wire interrupted
Failure 4 : CANL shorted to Gnd
Vbat Vcc
Vbat Vcc
RTL
RTL
RTL
0.6Vcc
RxD
CANL
CANL
CANH
CANH
CD
0.6Vcc
RxD
ERR
RTL
CANL
CANL
CANH
CANH
RTL
CD
RxD
CANL
CANL
CANH
CANH
CD
RxD
CH
ERR
ERR
0.4Vcc
RTH
RTH
Error−detection: CL= CH more then 4 pulses
RTH
Error−detection: CANL>7V
Failure 3 : CANH shorted to Vbat
Failure 6a : CANL shorted to Vcc
Vbat Vcc
Vbat Vcc
RTL
RTL
RTL
0.6Vcc
CANL
CANH
CANH
CD
TxD
CL
RxD
ERR
CANL
CANL
CANH
CANH
CD
RxD
CH
ERR
0.4Vcc
ERR
0.4Vcc
RTH
Vbat
RTL
0.6Vcc
TxD
RxD
CH
ERR
Vcc
TxD
CL
CANL
RTH
RTH
Error−detection: CL= CH more then 4 pulses
Error−detection: CANH > 2V longer then Tnd_f3
Failure 3a : CANH shorted to Vcc
Vcc
Vbat Vcc
Failure 7 : CANH shorted to CANL
Vbat Vcc
RTL
RTL
RTL
0.6Vcc
CANL
CANL
CANH
CANH
CD
0.6Vcc
TxD
RxD
RxD
CH
ERR
ERR
TxD
CL
CANL
CANL
CANH
CANH
CD
RxD
CH
ERR
0.4Vcc
RTH
Vcc
RTL
TxD
CL
RTH
TxD
CL
ERR
0.4Vcc
RTH
RTL
0.6Vcc
TxD
RxD
CH
ERR
RxD
RTH
TxD
CL
TxD
ERR
Error−detection: dominant longer then Tnd_f4
0.6Vcc
RTH
RxD
Failure 6 : CANL wire shorted to Vbat
Vbat Vcc
Vbat
RTL
RxD
CANH
RTH
Vbat Vcc
TxD
CANH
CD
0.4Vcc
RTH
Failure 2 : CANL wire interrupted
RxD
CANL
ERR
Error−detection: CL= CH more then 4 pulses
TxD
CANL
CH
0.4Vcc
RTH
TxD
CL
TxD
RxD
CH
ERR
RTL
TxD
CL
TxD
GND
RTH
Error−detection: CANH >2V longer then Tnd_f3
ERR
0.4Vcc
RTH
Error−detection: dominant longer then Tnd_f7
Failure 5 : CANH shorted to Gnd
Vbat Vcc
RTL
RTL
0.6Vcc
TxD
RxD
TxD
CL
CANL
CANL
CANH
CANH
CD
RxD
CH
ERR
ERR
0.4Vcc
RTH
GND
RTH
Error−detection: CL= CH more then 4 pulses
Figure 4. Different Types of Wiring Failure
Low Power Modes
The standby mode will react the same as the sleep mode
but with a high−level on pin INH.
The power−on standby mode is the same as the standby
mode with the battery power−on flag instead of the wake−up
interrupt signal on Pin ERR. The output on Pin RXD will
show the wake−up interrupt. This mode is only for reading
out the power−on flag.
Wake−up request is detected by the following events:
The transceiver provides three low power modes, which
can be entered and exited via Pins STBB and EN (see
Figure 5). (Go−to−sleep mode is only a transition mode.)
The sleep mode is the mode with the lowest power
consumption. Pin INH is switched to high−impedance for
deactivation of the external voltage regulator. Pin CANL is
biased to the battery voltage via Pin RTL. If the supply
voltage is provided, Pins RXD and ERR will signal the
wake−up interrupt signal.
www.onsemi.com
6
AMIS−41682, AMIS−41683
• Local Wake−up: Rising or falling edge on input WAKE
circuit can still go to another low−power mode. After this
time the circuit goes to the sleep−mode. In case of a wake up
request (from BUS or WAKE Pin) during this transition
time, the wake−up request has higher priority than
go−to−sleep and INH will not be deactivated.
(levels maintained for a certain period).
• Remote Wake−up from CAN Bus: A message with five
consecutive dominant bits.
On a wake−up request the transceiver will set the output
on Pin INH high which can be used to activate the external
supply voltage regulator. Note: Pin INH is also set similarly
as an after wake up event by VBAT voltage being below the
battery power on flag level. (See FLAG_VBAT in Figure 5)
If VCC is provided, the wake−up request can be read on the
ERR or RXD outputs so the external microcontroller can
wake−up the transceiver (switch to normal operating mode)
via Pins STB and EN.
In the low power modes the failure detection circuit
remains partly active to prevent increased power
consumption in the event of failures 3, 3a, 4, and 7.
The go−to−sleep−mode is only a transition mode. The Pin
INH stays active for a limited time. During this time the
Behavior in Case of Missing Supplies
If VCC is below the threshold level FLAG_VCC, the signals
on pins STB and EN will internally be set to low-level to
provide fail safe functionality. In this way, a low-power mode
will be forced in case of missing/failing VCC supply.
Similarly, missing/failing VBAT supply – i.e. VBAT being
below FLAG_VBAT level - will lead to a fail-safe behavior of
the transceiver by forcing a low-power mode.
A forced low-power in case of missing supplies
guarantees that the transceiver will in no way disturb the
other CAN nodes when the local electronic unit looses
ground or battery connection.
Power−On Stand−by
STB
EN change state
EN
INH
ERR RxD RTL
High Low
Act
POR−
flag
WU−
int
Vbat
EN, STB change state
STB change state
Normal Mode
STB
EN
High High
INH
Act
GoTo Sleep Mode
STB change state
ERR RxD RTL
Err−
flag
Rec.
out
STB
Vcc
EN
Low High
EN, STB change state
INH
ERR RxD
RTL
Act
2)
WU−
int
Vbat
WU−
int
Time−out GoToSleep mode
EN change state
Sleep Mode
Standby Mode
STB
Low
EN
Low
INH
ERR RxD RTL
Act
WU−
int
WU−
int
Vbat
Local or Remote
Wake−up 3)
1) Only when Vcc > POR_Vcc
2) INH active for a time = T_GoToSleep
3) Local Wake−up through pin Wake which change state Power−On
for a time > T_wake_min
Remote Wake−up through pin CANL or CANH when
dominant for a time >TCANH_min or TCANL_min
4) Mode Change through pins STB and EN is only
possible if Vcc > POR_Vcc
Figure 5. Low Power Modes
Power−On
STB
EN
INH
Low
Low
Hz
ERR RxD RTL
WU−
int 1)
WU−
int 1)
Vbat
Mode Change 4)
voltage. If the junction temperature exceeds a maximum
value, the transmitter output stages are disabled and flagged
on the ERR pin. Because the transmitter is responsible for
the major part of the power dissipation, this will result in
reduced power dissipation and hence a lower chip
temperature. All other parts of the IC will remain operating.
The Pins CANH and CANL are protected against
electrical transients that may occur in an automotive
environment.
After power−on (VBAT switched on) the signal on Pin INH
will become high and an internal power−on flag will be set.
This flag can be read in the power−on standby mode via pin
ERR (STB = 1; EN = 0) and will be reset by entering the
normal operating mode.
Protections
A current limiting circuit protects the transmitter output
stages against short circuit to positive and negative battery
www.onsemi.com
7
AMIS−41682, AMIS−41683
ELECTRICAL CHARACTERISTICS
Definitions
current is flowing into the pin. Sourcing current means that
the current is flowing out of the pin.
All voltages are referenced to GND (Pin 13). Positive
currents flow into the IC. Sinking current means that the
Table 5. CHARACTERISTICS AMIS−4168x VCC = 4.75 V to 5.25 V, VBAT = 5 V to 36 V, TJ = −40°C to +150°C; unless otherwise
specified.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Normal Operating Mode;
VTXD = VCC (Recessive)
1
3.7
6.3
mA
Normal Operating Mode;
VTXD = 0 V (Dominant); No Load
1
8
12
mA
4.5
V
110
230
mA
In Sleepmode
VCC = 0 V, VBAT = 12.5 V
TA = 70°C
35
42
mA
30
60
mA
80
mA
SUPPLIES VCC VBAT
ICC
FLAG_VCC
IBAT
Supply Current
Forced Low Power Mode
Battery Current on Pin BAT
VCC Rising
VCC Falling
In All Modes of Operation;
500 V between RTL − CANL
500 V between RTH − CANH
VBAT = WAKE = INH = 5 V to 36 V
2.45
10
ICC+ IBAT
Supply Current Plus Battery Current
Low power modes; VCC = 5 V;
TA = −40°C to 100°C
VBAT = WAKE = INH = 5 to 36V
ICC+ IBAT
Supply Current Plus Battery Current
Low power modes; VCC = 5 V;
TA = 100°C to 150°C
VBAT = WAKE = INH = 5 V to 36 V
FLAG_VBAT
Power−on Flag−Level for Pin VBAT
For Setting Power−on Flag
For Not Setting Power−on Flag
2.1
2.4
1
V
3.5
360
600
kW
PINS STB, EN AND TXD
RPD
Pulldown Resistor at Pin EN and STB
1V
190
TDisTxD
Dominant Time−out for TxD
Normal Mode; VtxD = 0 V
0.75
4
ms
TGoToSleep
Minimum Hold−Time for Go−To−Sleep
Mode
5
50
ms
PIN WAKE
IIL
Low−Level Input Current
VWAKE = 0 V; VBAT = 27V
−10
Vth(WAKE)
Wake−up Threshold Voltage
VSTB = 0 V
2.5
TWakeMin
Minimum Time on Pin Wake (Debounce Time)
VBAT = 12 V; Low Power Mode; for
Rising and Falling Edge
DVH
High−Level Voltage Drop
IINH = $0.18 mA
Ileak
Leakage Current
Sleep mode; VINH = 0 V
7
3.2
−1
mA
3.9
V
38
ms
0.8
V
1
mA
PIN INH
www.onsemi.com
8
AMIS−41682, AMIS−41683
Table 6. CHARACTERISTICS AMIS−41682 (5 V Version) VCC = 4.75 V to 5.25 V, VBAT = 5 V to 36 V, TJ = −40°C to +150°C;
unless otherwise specified.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
PINS STB, EN AND TXD
VIH
High−level input voltage
0.7 x
VCC
6.0
V
VIL
Low−level input voltage
−0.3
0.3 x
VCC
V
I−PU−H
High−level input current pin TXD
TXD = 0.7 * VCC
−10
−200
mA
I−PU−L
Low−level input current pin TXD
TXD = 0.3 * VCC
−80
−800
mA
VCC −
0.9
VCC
V
PINS RXD AND ERR
VOH
High−level output voltage
lsource = −1 mA
VOL
Low−level output voltage
Isink = 1.6 mA
0
0.4
V
Isink = 7.5 mA
0
1.5
V
Table 7. CHARACTERISTICS AMIS−41683 (3.3 Version) VCC = 4.75 V to 5.25 V, VBAT = 5 V to 36 V, TJ = −40°C to +150°C;
unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
6.0
V
PINS STB, EN AND TXD
VIH
High−Level Input Voltage
VIL
Low−Level Input Voltage
I−PU−H
High−Level Input Current Pin TXD
2
−0.3
TXD = 2 V
0.8
V
mA
−10
PINS RXD AND ERR
VOL
Low−Level Output Voltage Open Drain
lsink = 3.2 mA
Ileak
Leakage When Driver is Off
VERR = VRXD = 5 V
0.4
V
1
mA
Table 8. CHARACTERISTICS AMIS−4168x VCC = 4.75 V to 5.25 V, VBAT = 5 V to 36 V, TJ = −40°C to +150°C; unless otherwise
specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Pins CANH and CANL (Receiver)
Vdiff
VseCANH
VseCANL
Differential Receiver
Threshold Voltage
Single−Ended Receiver Threshold Voltage on Pin CANH
Single−Ended Receiver Threshold Voltage on Pin CANL
No Failures and Bus Failures 1, 2, 4,
and 6a (See Figure 4)
VCC = 5 V
VCC = 4.75 V to 5.25 V
Normal Operating Mode and Failures
4, 6 and 7
VCC = 5 V
VCC = 4.75 V to 5.25 V
Normal Operating Mode and Failures
3 and 3a
VCC = 5 V
VCC = 4.75 V to 5.25 V
Vdet(CANL)
Detection Threshold
Voltage for Short Circuit to Battery Voltage on Pin CANL
Normal Operating Mode
Vth(wake)
Wake−up Threshold Voltage
On Pin CANL
On Pin CANH
Low Power Modes
www.onsemi.com
9
V
−3.25
0.65 x
VCC
−3
0.6 x
VCC
−2.75
0.55 x
VCC
V
1.6
0.32 x
VCC
1.775
0.355
x VCC
1.95
0.39 x
VCC
3
0.61 x
VCC
3.2
0.645
x VCC
3.4
0.68 x
VCC
6.5
7.3
8
2.5
1.1
3.2
1.8
3. 9
2.25
V
V
V
V
AMIS−41682, AMIS−41683
Table 8. CHARACTERISTICS AMIS−4168x VCC = 4.75 V to 5.25 V, VBAT = 5 V to 36 V, TJ = −40°C to +150°C; unless otherwise
specified.
Symbol
Parameter
Conditions
Min
Typ
0.8
1.4
Max
Unit
Pins CANH and CANL (Receiver)
DVth(wake)
Difference of Wake−up Threshold Voltages
Low Power Modes
V
PINS CANH AND CANL (TRANSMITTER)
VO(reces)
VO(dom)
IO(CANH)
IO(CANL)
Recessive Output Voltage
On Pin CANH
On Pin CANL
VTXD = VCC
RRTH < 4 kW
RRTL < 4 kW
Dominant Output Voltage
On Pin CANH
On Pin CANL
VTXD = 0V; VEN = VCC
0 mA ≥ ICANH ≥ −40 mA
0 mA ≤ ICANL ≤ 40 mA
Output Current on Pin CANH
Normal Operating Mode;
VCANH = 0V; VTXD = 0 V
−110
−80
−45
mA
Low Power Modes;
VCANH = 0V; VCC = 5 V
−1.6
0.5
1.6
mA
Normal Operating Mode;
VCANL = 14 V; VTXD = 0 V
45
80
110
mA
Low Power Modes; VCANL = 12 V;
VBAT = 12 V
−1
0.5
1
mA
Output Current on Pin CANL
V
0.2
VCC −
0.2
V
VCC −
1.4
1.4
PINS RTH AND RTL
RSW(RTL)
Switch−on Resistance Between Pin
RTL and VCC
Normal operating mode; I(RTL) >
−10 mA
100
W
RSW(RTH)
Switch−on Resistance Between Pin
RTH and ground
Normal operating mode; I(RTH) <
10 mA
100
W
VO(RTH)
Output Voltage on Pin RTH
Low power modes; IO = 1 mA
IO(RTL)
Output Current on Pin RTL
Low power modes; VRTL = 0 V
Ipu(RTL)
Pullup Current on Pin RTL
Normal operating mode and failures
4, 6 and 7; VRTL = 0 V
−75
mA
Ipd(RTH)
Pulldown Current on Pin RTH
Normal operating mode and failures
3 and 3a
−75
mA
−1.25
1.0
V
−0.3
mA
THERMAL SHUTDOWN
TJ
Junction Temperature
For Shutdown
www.onsemi.com
10
150
180
°C
AMIS−41682, AMIS−41683
Table 9. TIMING CHARACTERISTICS AMIS−4168x VCC = 4.75 V to 5.25 V, VBAT = 5 V to 27 V, VSTB = VCC, TJ = −40°C to
+150°C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tt(r−d)
CANL and CANH Output
Transition Time for
Recessive−to−Dominant
10 to 90%;
C1 = 10 nF; C2 = 0; R1 = 125 W (See Figure 6)
0.35
0.60
1.4
ms
tt(d−r)
CANL and CANH Output
Transition Time for
Dominant−to−Recessive
10 to 90%;
C1 = 1 nF; C2 = 0; R1 = 125 W (See Figure 6)
0.2
0.3
0.7
ms
tPD(L)
Propagation Delay TXD to
RXD (LOW)
0.75
1.4
1.5
2.1
1.2
1.4
1.9
2.1
ms
No Failures
C1 = 1 nF; C2 = 0; R1 = 125 W
C1 = C2 = 3.3 nF; R1 = 125 W
ms
Failures 1, 2, 5, and 6a (See Figures 4 and 6)
ms
Failures 3, 3a, 4, 6, and 7 (See Figures 4 and 6)
C1 = 1 nF; C2 = 0; R1 = 125 W C1 = C2 = 3.3 nF;
R1 = 125 W
C1 = 1 nF; C2 = 0; R1 = 125 W
C1 = C2 = 3.3nF; R1 = 125 W
tPD(H)
Propagation Delay TXD to
RXD (HIGH)
1.2
1.5
1.9
2.2
0.75
2.5
1.5
3.0
Failures 1, 2, 5, and 6a (See Figures 4 and 6)
C1 = 1nF; C2 = 0; R1 = 125 W
C1 = C2 = 3.3nF; R1 = 125 W
1.2
2.5
1.9
3.0
Failures 3, 3a, 4, 6, and 7 (See Figures 4 and 6)
C1 = 1 nF; C2 = 0; R1 = 125 W
C1 = C2 = 3.3 nF; R1 = 125 W
1.2
1.5
1.9
2.2
ms
No Failures
C1 = 1 nF; C2 = 0; R1 = 125 W
C1 = C2 = 3.3nF; R1 = 125 W
ms
ms
tCANH(min)
Minimum Dominant Time for
Wake−up on Pin CANH
Low Power Modes; VBAT = 12 V
7
38
ms
tCANL(min)
Minimum Dominant Time for
Wake−up on Pin CANL
Low Power Modes; VBAT = 12 V
7
38
ms
tdet
Failure Detection Time
Normal Mode
Failure 3 and 3a
Failure 4, 6 and 7
1.6
0.3
8.0
1.6
Low Power Modes; VBAT = 12 V
Failure 3 and 3a
Failure 4 and 7
1.6
0.1
8.0
1.6
Normal Mode
Failure 3 and 3a
Failure 4 and 7
Failure 6
0.3
7
125
1.6
38
750
ms
ms
ms
0.3
1.6
ms
trec
Failure Recovery Time
ms
Low Power Modes; VBAT = 12 V
Failures 3, 3a, 4, and 7
Dpc
Pulse−Count Difference
Between CANH and CANL
Normal Mode and Failures 1, 2, 5, and 6a
Failure Detection (Pin ERR becomes LOW)
Failure Recovery (Pin ERR becomes HIGH)
www.onsemi.com
11
ms
−
4
4
AMIS−41682, AMIS−41683
BATTERY
+5V
EN
14
WAKE
7
9
6
ERR
4
STB
12
5
RxD
AMIS−4168x
11
3
TxD
20 pF
VBAT
2
8
13
R1
C1
RTL
500 W
INH
1
CANL
C2
CANH
500 W
VCC
10
RTH
C1
R1
GND
PC20080724.1
Figure 6. Test Circuit for Dynamic
dominant
recessive
recessive
TxD
50%
50%
tt(r−d)
VCANL
tt(d−r)
90%
90%
3.6V
10%
10%
1.4V
VCANH
5V
0V
RxD
0.7Vcc
0.3Vcc
tPD(L)
tPD(H)
PC20050511.3
Figure 7. Timing Diagram for AC Characteristics
www.onsemi.com
12
AMIS−41682, AMIS−41683
BATTERY
100 nF
10 k W
+5V
33 k W
100 nF
ERR
STB
TxD
Generator
RxD
20 pF
14
WAKE
7
9
6
4
5
12
AMIS−4168x
11
2
3
13
8
RTL
CANL
560 W
EN
VBAT
INH
1
120 W
4.7 nF
Active Probe
CANH
RTH
560 W
VCC
10
120 W
4.7 nF
GND
PC20050511.5
Figure 8. Test Set−up EME Measurements
Figure 9. EME Measurements (See Figure 8)
www.onsemi.com
13
Spectrum Anayzer
AMIS−41682, AMIS−41683
BATTERY
+5V
ERR
STB
RxD
20 pF
TxD
VBAT
14
WAKE
7
9
6
4
5
12
AMIS−4168x
11
3
2
8
13
1 nF
511 W
EN
INH
1
RTL
CANL
Transient
Generator
RTH
125 W
GND
1 nF
CANH
511 W
VCC
10
1 nF
1 nF
PC20041029.5
Figure 10. Test Circuit for Schaffner Tests (ISO 7637 part)
DEVICE ORDERING INFORMATION
Voltage
Temperature Range
Package Type
Shipping†
AMIS41682CANM1G
5V
−40°C − 125°C
SOIC−14
(Pb−Free)
55 Tube / Tray
AMIS41682CANM1RG
5V
−40°C − 125°C
SOIC−14
(Pb−Free)
3000 / Tape & Reel
AMIS41683CANN1G
3.3 V
−40°C − 125°C
SOIC−14
(Pb−Free)
55 Tube / Tray
AMIS41683CANN1RG
3.3 V
−40°C − 125°C
SOIC−14
(Pb−Free)
3000 / Tape & Reel
Part Number
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
14
AMIS−41682, AMIS−41683
PACKAGE DIMENSIONS
SOIC 14
CASE 751AP
ISSUE A
www.onsemi.com
15
AMIS−41682, AMIS−41683
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
www.onsemi.com
16
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
AMIS−41682/D
Similar pages