ADT7483A Dual Channel Temperature Sensor and Over Temperature Alarm The ADT7483A is a three-channel digital thermometer and under/over temperature alarm, intended for use in PCs and thermal management systems. It can measure the temperature in two remote locations, for example, the remote thermal diode in a CPU or GPU, or a discrete diode connected transistor. It can also measure its own ambient temperature. The temperature of the remote thermal diode and ambient temperature can be accurately measured to 1C. The temperature measurement range defaults to 0C to 127C, compatible with ADM1032, but can be switched to a wider measurement range, from −64C to +191C. The ADT7483A communicates over a 2-wire serial interface compatible with system management bus (SMBus) standards. The SMBus address is set by the ADD0 and ADD1 pins. As many as nine different SMBus addresses are possible. An ALERT output signals when the on-chip or remote temperature is outside the programmed limits. The THERM output is a comparator output that allows, for example, on/off control of a cooling fan. The ALERT output can be reconfigured as a second THERM output, if required. Features 1 Local and 2 Remote Temperature Sensors 0.25C Resolution/1C Accuracy on Remote Channels 1C Resolution/1C Accuracy on Local Channel Extended, Switchable Temperature Measurement Range 0C to 127C (Default) or –64C to +191C 2-wire SMBus Serial Interface with SMBus Alert Support Programmable Over/Under Temperature Limits Offset Registers for System Calibration Up to 2 Overtemperature Fail-safe THERM Outputs Small 16-lead QSOP Package 240 mA Operating Current, 5 mA Standby Current This Device is Pb-Free, Halogen Free and is RoHS Compliant Applications July, 2012 − Rev. 2 QSOP−16 CASE 492 PIN ASSIGNMENT ADD1 1 16 ADD0 VDD 2 15 SCLK D1+ 3 14 D1− 4 ADT7483A 13 THERM 5 (Top View) GND 6 11 D2− NC 7 10 NC NC 8 9 NC SDATA ALERT/ THERM2 12 D2+ NC = No Connect MARKING DIAGRAM ADT7483 AARQZ #YYWW ADT7483AARQZ = Specific Device Code # = Pb-Free Package YYWW = Date Code ORDERING INFORMATION Desktop and Notebook Computers Industrial Controllers Smart Batteries Automotive Embedded Systems Burn-in Applications Instrumentation Semiconductor Components Industries, LLC, 2012 http://onsemi.com See detailed ordering and shipping information in the package dimensions section on page 19 of this data sheet. 1 Publication Order Number: ADT7483A/D ADT7483A ADDRESS POINTER REGISTER 3 D1− 4 D2+ 12 D2− 11 ONE-SHOT REGISTER LOCAL TEMPERATURE VALUE REGISTER LOCAL TEMPERATURE THERM LIMIT REGISTER 11-BIT A-TO-D CONVERTER ANALOG MUX BUSY RUN/STANDBY LOCAL TEMPERATURE LOW LIMIT REGISTER LIMIT COMPARATOR D1+ CONVERSION RATE REGISTER DIGITAL MUX ON-CHIP TEMPERATURE SENSOR REMOTE 1 & 2 TEMP VALUE REGISTERS LOCAL TEMPERATURE HIGH LIMIT REGISTER REMOTE 1 & 2 TEMP. THERM LIMIT REG. REMOTE 1 & 2 TEMP. LOW LIMIT REGISTERS REMOTE 1 & 2 TEMP OFFSET REGISTERS REMOTE 1 & 2 TEMP. HIGH LIMIT REGISTERS CONFIGURATION REGISTER EXTERNAL DIODE OPEN-CIRCUIT INTERRUPT MASKING STATUS REGISTERS ADT7483A SMBUS INTERFACE 2 6 16 1 14 15 5 VDD GND ADD0 ADD1 SDATA SCLK THERM 13 ALERT/THERM2 Figure 1. Functional Block Diagram Table 1. PIN ASSIGNMENT Pin No. Mnemonic 1 ADD1 2 VDD 3 D1+ Positive Connection. Connects to the first remote temperature sensor. 4 D1− Negative Connection. Connects to the first remote temperature sensor. 5 THERM 6 GND 7 NC No Connect. 8 NC No Connect. 9 NC No Connect. 10 NC No Connect. 11 D2− Negative Connection. Connects to the second remote temperature sensor. 12 D2+ Positive Connection. Connects to the second remote temperature sensor. 13 ALERT/THERM2 14 SDATA Logic Input/Output, SMBus Serial Data. Open-drain output. Requires a pull-up resistor. 15 SCLK Logic Input, SMBus Serial Clock. Requires a pull-up resistor. 16 ADD0 Address 0 Pin. Tri-state input to set the SMBus address. B Description Address 1 Pin. Tri-state input to set the SMBus address. Positive Supply, 3 V to 3.6 V. Open-drain Output. Turns a fan on/off, or throttles a CPU clock in the event of an overtemperature condition. Supply Ground Connection. Open-drain Logic Output. Used as interrupt or SMBus alert. This may also be configured as a second THERM output. Requires a pull-up resistor. http://onsemi.com 2 ADT7483A Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Positive Supply Voltage (VDD) to GND D+ Rating Unit −0.3, +3.6 V −0.3 to VDD + 0.3 V D− to GND −0.3 to +0.6 V SCLK, SDATA, ALERT, THERM −0.3 to +3.6 V Input Current, SDATA, THERM −1, +50 mA 1 mA Input Current, D− ESD Rating, All Pins (Human Body Model) 1,500 V 150 C Storage Temperature Range −65 to +150 C IR Reflow Peak Temperature 220 C IR Reflow Peak Temperature Pb-Free 260 C Lead Temperature (Soldering 10 sec) 300 C Maximum Junction Temperature (TJ MAX) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NOTE: This device is ESD sensitive. Use standard ESD precautions when handling. Table 3. THERMAL CHARACTERISTICS Package Type 16-lead QSOP qJA qJC Unit 150 38.8 C/W Table 4. SMBus TIMING SPECIFICATIONS (Note 1) 1. 2. 3. 4. Parameter Limit at TMIN and TMAX Unit fSCLK 400 kHz max tLOW 4.7 ms min Clock Low Period, between 10% Points tHIGH 4.0 ms min Clock High Period, between 90% Points tR 1.0 ms max Clock/Data Rise Time Description tF 300 ns max Clock/Data Fall Time tSU; STA 4.7 ms min Start Condition Setup Time tHD; STA (Note 2) 4.0 ms min Start Condition Hold Time tSU; DAT (Note 3) 250 ns min Data Setup Time tSU; STO (Note 4) 4.0 ms min Stop Condition Setup Time tBUF 4.7 ms min Bus Free Time between Stop and Start Conditions Guaranteed by design, not production tested. Time from 10% of SDATA to 90% of SCLK. Time for 10% or 90% of SDATA to 10% of SCLK. Time for 90% of SCLK to 10% of SDATA. t LOW tF t HD; STA tR SCLK t HD; STA t HD; DAT t HIGH t SU; STA t SU; DAT t SU; STO SDATA t BUF STOP START START Figure 2. Serial Bus Timing http://onsemi.com 3 STOP ADT7483A Table 5. ELECTRICAL CHARACTERISTICS (TA = −40C to +125C, VDD = 3 V to 3.6 V, unless otherwise noted) (Note 1) Parameter Test Conditions Min Typ Max Unit Power Supply 3.0 3.3 3.6 V Average Operating Supply Current, IDD 0.0625 Conversions/sec Rate (Note 1) Standby Mode − − 240 5 350 30 mA Undervoltage Lockout Threshold VDD Input, Disables ADC, Rising Edge − 2.55 − V 1 − 2.5 V 0C TA 70C 0C TA 85C −40C TA +100C − − − − − − − 1 1 1.5 2.5 − C 0C TA 70C, −55C TD 150C (Note 3) 0C TA 85C, −55C TD 150C (Note 3) −40C TA +125C, −55C TD 150C (Note 3) − − − − − − 1 1.5 2.5 C − 0.25 − Remote Sensor Source Current (Note 3) High Level Low Level − − 233 14 − − mA Conversion Time from Stop Bit to Conversion Complete (All Channels), One-shot Mode with Averaging Switched On One-shot Mode with Averaging Off, (Conversion Rate = 16, 32, or 64 Conversions/sec) − 73 94 ms − 11 14 Supply Voltage, VDD Power-On-Reset Threshold Temperature-to-Digital Converter (Note 2) Local Sensor Accuracy Resolution Remote Diode Sensor Accuracy Resolution Open-drain Digital Outputs (THERM, ALERT/THERM2) Output Low Voltage, VOL IOUT = −6.0 mA − − 0.4 V High Level Output Current, IOH VOUT = VDD − 0.1 1 mA Logic Input High Voltage, VIH, SCLK, SDATA 2.1 − − V Logic Input Low Voltage, VIL, SCLK, SDATA − − 0.8 V Hysteresis − 500 − mV SMBus Interface (Notes 3 and 4) SDA Output Low Voltage, VOL 1. 2. 3. 4. 5. − − 0.4 V Logic Input Current, IIH, IIL IOUT = −6.0 mA −1 − +1 mA SMBus Input Capacitance, SCLK, SDATA − 5 − pF SMBus Clock Frequency − − 400 kHz SMBus Timeout (Note 5) User Programmable − 25 32 ms SCLK Falling Edge to SDATA Valid Time Master Clocking in Data − − 1 ms See Table 11 for information on other conversion rates. Averaging enabled. Guaranteed by design, not production tested. See SMBus Timing Specifications section for more information. Disabled by default. See the Serial Bus Interface section for details to enable it. http://onsemi.com 4 ADT7483A TYPICAL PERFORMANCE CHARACTERISTICS 3.5 DEV 1 DEV 2 DEV 3 DEV 4 DEV 5 DEV 6 DEV 7 3.0 2.5 2.0 DEV 8 DEV 9 DEV 10 DEV 11 DEV 12 DEV 13 DEV 14 DEV 15 DEV 16 MEAN HIGH 4S LOW 4S 1.5 1.0 0.5 0 −0.5 −1.0 −50 0 50 100 DEV 1 DEV 2 DEV 3 DEV 4 DEV 5 DEV 6 DEV 7 3.0 TEMPERATURE ERROR (C) TEMPERATURE ERROR (C) 3.5 2.5 2.0 1.0 0.5 0 −0.5 −1.0 −50 150 3.0 2.5 2.0 1.0 0.5 0 −0.5 0 5 50 100 0 −5 −10 D+ To VDD −15 −20 −25 150 10 1 100 LEAKAGE RESISTANCE (MW) Figure 5. Remote 2 Temperature Error vs. Temperature Figure 6. Temperature Error vs. D+/D− Leakage Resistance 0 1000 −2 900 −4 800 DEV 2BC 700 −6 IDD (mA) TEMPERATURE ERROR (C) 150 D+ To GND TEMPERATURE (C) −8 −10 DEV 3 −12 500 DEV 4BC 400 DEV 3BC 200 DEV 4 −16 600 300 DEV 2 −14 −18 100 10 DEV 15 DEV 16 MEAN HIGH 4S LOW 4S 1.5 −1.0 −50 50 Figure 4. Remote 1 Temperature Error vs. Temperature TEMPERATURE ERROR (C) TEMPERATURE ERROR (C) DEV 8 DEV 9 DEV 10 DEV 11 DEV 12 DEV 13 DEV 14 0 TEMPERATURE (C) Figure 3. Local Temperature Error vs. Temperature DEV 1 DEV 2 DEV 3 DEV 4 DEV 5 DEV 6 DEV 7 DEV 15 DEV 16 HIGH 4S LOW 4S 1.5 TEMPERATURE (C) 3.5 DEV 8 DEV 9 DEV 10 DEV 11 DEV 12 DEV 13 DEV 14 100 0 5 10 15 20 0 0.01 25 CAPACITANCE (nF) 0.1 1 10 CONVERTION RATE (Hz) Figure 7. Temperature Error vs. D+/D− Capacitance Figure 8. Operating Supply Current vs. Conversion Rate http://onsemi.com 5 100 ADT7483A 422 4.4 420 4.2 DEV 2BC 418 4.0 416 3.8 414 IDD (mA) IDD (mA) TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d) DEV 3BC DEV 4BC 412 DEV 2 DEV 3 DEV 4 3.6 3.4 3.2 410 408 3.0 3.1 3.2 3.3 3.4 3.5 3.0 3.0 3.6 3.1 3.2 Figure 9. Operating Supply Current vs. Voltage TEMPERATURE ERROR (C) 15 10 5 10 100 20 100 mV 15 10 50 mV 5 0 1000 20 mV 0 100 200 300 400 500 600 NOISE FREQUENCY (MHz) FSCL (kHz) Figure 11. Standby Supply Current vs. SCLK Frequency Figure 12. Temperature Error vs. Common-Mode Noise Frequency 80 TEMPERATURE ERROR (C) ISTBY (mA) 20 1 3.6 25 25 0 3.5 Figure 10. Standby Supply Current vs. Voltage DEV 2BC DEV 3BC DEV 4BC 30 3.4 VDD (V) VDD (V) 35 3.3 70 60 100 mV 50 40 30 50 mV 20 10 20 mV 0 −10 0 100 200 300 400 500 600 NOISE FREQUENCY (MHz) Figure 13. Temperature Error vs. Differential Mode Noise Frequency http://onsemi.com 6 ADT7483A Theory of Operation The ADT7483A is a local and 2 remote temperature sensor and over/under temperature alarm. When the ADT7483A is operating normally, the on-board ADC operates in a freerunning mode. The analog input multiplexer alternately selects either the on-chip temperature sensor or one of the remote temperature sensors to measure its local temperature. The ADC digitizes these signals, and the results are stored in the local, Remote 1, and Remote 2 temperature value registers. The local and remote measurement results are compared with the corresponding high, low, and THERM temperature limits stored in on-chip registers. Out-of-limit comparisons generate flags that are stored in the status register. A result that exceeds the high temperature limit, the low temperature limit, or a remote diode open circuit causes the ALERT output to assert low. Likewise, exceeding THERM temperature limits causes the THERM output to assert low. The ALERT output can be reprogrammed as a second THERM output. The limit registers can be programmed, and the device controlled and configured, via the serial SMBus. The contents of any register can also be read back via the SMBus. Control and configuration functions consist of: Switching the Device between Normal Operation and Standby Mode Selecting the Temperature Measurement Scale Masking or Enabling the ALERT Output Switching Pin 13 between ALERT and THERM2 Selecting the Conversion Rate the baseemitter voltage (VBE) of a transistor, operated at constant current. Unfortunately, this technique requires calibration to null the effect of the absolute value of VBE, which varies from device to device. The technique used in the ADT7483A is to measure the change in VBE when the device is operated at two different currents. Figure 14 shows the input signal conditioning used to measure the output of a remote temperature sensor. This figure shows the remote sensor as a substrate transistor, but it could equally be a discrete transistor. If a discrete transistor is used, the collector is not grounded and should be linked to the base. To prevent ground noise interfering with the measurement, the more negative terminal of the sensor is not referenced to ground but is biased above ground by an internal diode at the D− input. C1 can be optionally added as a noise filter (recommended maximum value 1,000 pF). To measure DVBE, the operating current through the sensor is switched among two related currents, I and N I. The currents through the temperature diode are switched between I and N I, giving DVBE. The temperature is then calculated using the DVBE measurement. The resulting DVBE waveforms pass through a 65 kHz low-pass filter to remove noise and then to a chopper-stabilized amplifier. This amplifies and rectifies the waveform to produce a dc voltage proportional to DVBE. The ADC digitizes this voltage and produces a temperature measurement. To reduce the effects of noise, digital filtering is performed by averaging the results of 16 measurement cycles for low conversion rates. At rates of 16, 32, and 64 conversions/second, no digital averaging takes place. Signal conditioning and measurement of the local temperature sensor is performed in the same manner. Temperature Measurement Method A simple method of measuring temperature is to exploit the negative temperature coefficient of a diode, measuring I NI IBIAS VDD D+ REMOTE SENSING TRANSISTOR VOUT+ To ADC C1* D− VOUT− BIAS DIODE LOW-PASS FILTER fC = 65 kHz *CAPACITOR C1 IS OPTIONAL. IT IS ONLY NECESSARY IN NOISY ENVIRONMENTS. C1 = 1,000 pF MAX Figure 14. Input Signal Conditioning Temperature Measurement Results The local temperature measurement is an 8-bit measurement with 1C resolution. The remote temperature measurements are 10-bit measurements, with eight MSBs stored in one register and two LSBs stored in another register. Table 6 lists the temperature measurement registers. The results of the local and remote temperature measurements are stored in the local and remote temperature value registers and are compared with limits programmed into the local and remote high and low limit registers. http://onsemi.com 7 ADT7483A registers themselves can have values from −64C to +191C. However, most temperature sensing diodes have a maximum temperature range of −55C to +150C. Note that although both local and remote temperature measurements can be made while the part is in extended temperature mode, the ADT7483A should not be exposed to temperatures greater than those specified in theAbsolute Maximum Ratings section. Further, the device is only guaranteed to operate as specified at ambient temperatures from −40C to +120C. Table 6. REGISTER ADDRESS FOR THE TEMPERATURE VALUES Temperature Channel Register Address, MSBs Register Address, LSBs Local 0x00 N/A Remote 1 0x01 0x10 (2 MSBs) Remote 2 0x30 0x33 (2 MSBs) By setting Bit 3 of the Configuration 1 Register to 1, the Remote 2 temperature values can be read from the following register addresses: Remote 2, MSBs = 0x01 Remote 2, LSBs = 0x10 Temperature Data Format The ADT7483A has two temperature data formats. When the temperature measurement range is from 0C to 127C (default), the temperature data format for both local and remote temperature results is binary. When the measurement range is in extended mode, an offset binary data format is used for both local and remote results. Temperature values in the offset binary data format are offset by +64. Examples of temperatures in both data formats are shown in Table 8. The above is true only when Bit 3 of the Configuration 1 register is set. To read the Remote 1 temperatures, this bit needs to be switched back to 0. Only the two MSBs in the remote temperature low byte are used. This gives the remote temperature measurement a resolution of 0.25C. Table 7 shows the data format for the remote temperature low byte. Table 8. TEMPERATURE DATA FORMAT (LOCAL AND REMOTE TEMPERATURE HIGH BYTE) Table 7. EXTENDED TEMPERATURE RESOLUTION (REMOTE TEMPERATURE LOW BYTE) Offset Binary (Note 1) Extended Resolution Remote Temperature Low Byte 0.00C 0 000 0000 0.25C 0 100 0000 0C 0 000 0000 0 100 0000 0.50C 1 000 0000 +1C 0 000 0001 0 100 0001 0.75C 1 100 0000 +10C 0 000 1010 0 100 1010 +25C 0 001 1001 0 101 1001 +50C 0 011 0010 0 111 0010 +75C 0 100 1011 1 000 1011 +100C 0 110 0100 1 010 0100 +125C 0 111 1101 1 011 1101 +127C 0 111 1111 1 011 1111 +150C 0 111 1111 (Note 3) 1 101 0110 When reading the full remote temperature value, both the high and low byte, the two registers should be read LSB first and then the MSB. This is because reading the LSB will cause the MSB to be locked until it is read, guaranteeing that the two values read are a result of the same temperature measurement. Temperature Measurement Range The temperature measurement range for both local and remote measurements is, by default, 0C to 127C. However, the ADT7483A can be operated using an extended temperature range from −64C to +191C. This means, the ADT7483A can measure the full temperature range of a remote thermal diode, from −55C to +150C. The user can switch between these two temperature ranges by setting or clearing Bit 2 in the Configuration 1 register. A valid result is available in the next measurement cycle after changing the temperature range. In extended temperature mode, the upper and lower temperatures that can be measured by the ADT7483A are limited by the remote diode selection. The temperature Temperature Binary −55C 0 000 0000 (Note 2) 0 000 1001 1. Offset binary scale temperature values are offset by +64. 2. Binary scale temperature measurement returns 0 for all temperatures < 0C. 3. Binary scale temperature measurement returns 127 for all temperatures > 127C. The user may switch between measurement ranges at any time. Switching the range also switches the data format. The next temperature result following the switching is reported back to the register in the new format. However, the contents of the limit registers do not change. It is up to the user to ensure that when the data format changes, the limit registers are reprogrammed as necessary (for more information, see the Limit Registers section). http://onsemi.com 8 ADT7483A Registers The registers in the ADT7483A are eight bits wide. These registers are used to store the results of remote and local temperature measurements, and high and low temperature limits, and to configure and control the device. A description of these registers is provided in this section. Temperature Value Registers The ADT7483A has five registers to store the results of local and remote temperature measurements. These registers can only be written to by the ADC and can be read by the user over the SMBus. The local temperature value register is at Address 0x00 The Remote 1 temperature value high byte register is at Address 0x01, with the Remote 1 low byte register at Address 0x10 The Remote 2 temperature value high byte register is at Address 0x30, with the Remote 2 low byte register at Address 0x33 The Remote 2 temperature values can be read from Address 0x01 for the high byte and Address 0x10 for the low byte if Bit 3 of Configuration Register 1 is set to 1 To read the Remote 1 temperature values, Bit 3 of Configuration Register 1 should be set to 0 The power-on default for all five registers is 0x00 Address Pointer Register The address pointer register does not have, nor does it require, an address because the first byte of every write operation is automatically written to this register. The data in this first byte always contains the address of another register on the ADT7483A, which is stored in the address pointer register. It is to this other register address that the second byte of a write operation is written, or to which a subsequent read operation is performed. The power-on default value of the address pointer register is 0x00, so if a read operation is performed immediately after power-on without first writing to the address pointer, the value of the local temperature will be returned, since its register address is 0x00. Table 9. CONFIGURATION 1 REGISTER (READ ADDRESS = 0x03, WRITE ADDRESS = 0x09) Bit Mnemonic Function 7 Mask 6 Mon/STBY 5 AL/TH 4 Reserved Reserved for future use. 3 Remote 1/ Remote 2 Setting this bit to 1 enables the user to read the Remote 2 values from the Remote 1 registers. Default = 0 = Remote 1 temperature values and limits are read from these registers. This bit is not lockable. 2 Temp Range 1 Mask R1 Setting this bit to 1 masks ALERTs due to the Remote 1 temperature exceeding a programmed limit. Default = 0. 0 Mask R2 Setting this bit to 1 masks ALERTs due to the Remote 2 temperature exceeding a programmed limit. Default = 0. Setting this bit to 1 masks all ALERTs on the ALERT pin. Default = 0 = ALERT enabled. This applies only if Pin 13 is configured as ALERT, otherwise it has no effect. Setting this bit to 1 places the ADT7483A in standby mode, that is, suspends all temperature measurements (ADC). The SMBus remains active and values can be written to, and read from, the registers. THERM and ALERT are also active in standby mode. Changes made to the limit registers in standby mode that affect the THERM or ALERT outputs will cause these signals to be updated. Default = 0 = temperature monitoring enabled. This bit selects the function of Pin 13. Default = 0 = ALERT. Setting this bit to 1 configures Pin 13 as the THERM2 pin. Setting this bit to 1 enables the extended temperature measurement range (−50C to +150C). Default = 0 = 0C to +127C. Table 10. CONFIGURATION 2 REGISTER (ADDRESS = 0x24) Bit Mnemonic 7 Lock Bit <6:0> Res Function Setting this bit to 1 locks all lockable registers to their current values. This prevents settings being tampered with until the device is powered down. Default = 0. Reserved for future use. http://onsemi.com 9 ADT7483A Conversion Rate/Channel Selector Register This register can be written to and read back over the SMBus. The default value of this register is 0x07, giving a rate of 8 conversions/second. Bit 7 in this register can be used to disable averaging of the temperature measurements. The ADT7483A can be configured to take temperature measurements of either a single temperature channel or all temperature channels. Bit 5 and Bit 4 can be used to specify which temperature channel or channels are measured. The conversion rate/channel selector register is at Address 0x04 for reads, and Address 0x0A for writes. The four LSBs of this register are used to program the conversion times from 15.5 ms (Code 0x0A) to 16 seconds (Code 0x00). To program the ADT7483A to perform continuous measurements, set the conversion rate register to 0x0B. For example, a conversion rate of 8 conversions/ second means that beginning at 125 ms intervals, the device performs a conversion on the local and the remote temperature channels. Table 11. CONVERSION RATE/CHANNEL SELECTOR REGISTER Bit Mnemonic Function 7 Averaging Setting this bit to 1 disables averaging of the temperature measurements at the slower conversion rates (averaging cannot take place at the three faster rates, so setting this bit has no effect). When default = 0, averaging is enabled. Reserved for future use. Do not write to this bit. 6 Reserved <5:4> Channel Selector These bits are used to select the temperature measurement channels: 00 = Round Robin = Default = All Channels 01 = Local Temperature 10 = Remote 1 Temperature 11 = Remote 2 Temperature <3:0> Conversion Rates These bits set how often the ADT7483A measures each temperature channel. Conversions/second Time 0000 = 0.0625 0001 = 0.125 0010 = 0.25 0011 = 0.5 0100 = 1 0101 = 2 0110 = 4 0111 = 8 = Default 1000 = 16 1001 = 32 1010 = Continuous Measurements Limit Registers 16 s 8s 4s 2s 1s 500 ms 250 ms 125 ms 62.5 ms 31.25 ms provided that applies to both THERM channels. This hysteresis value may be reprogrammed to any value after power-up using Register Address 0x21. It is important to remember that the data format for temperature limits is the same as the temperature measurement data format. Thus, if the temperature measurement uses the default (binary), then the temperature limits also use the binary scale. If the temperature measurement scale is switched, however, the temperature limits do not automatically switch. The user must reprogram the limit registers to the desired value in the correct data format. For example, if the remote low limit is set at 10C and the default binary scale is being used, the limit register value should be 0000 1010b. If the scale is switched to offset binary, the value in the low temperature limit register should be reprogrammed to be 0100 1010b. The ADT7483A has three limits for each temperature channel: high, low, and THERM temperature limits for local, Remote 1, and Remote 2 temperature measurements. The remote temperature high and low limits span two registers each to contain an upper and lower byte for each limit. There is also a THERM hysteresis register. All limit registers can be written to and read back over the SMBus. See Table 16 for details of the limit registers’ addresses and their power-on default values. When Pin 13 is configured as an ALERT output, the high limit registers perform a > comparison while the low limit registers perform a comparison. For example, if the high limit register is programmed with 80C, then measuring 81C will result in an out-of-limit condition, setting a flag in the status register. If the low limit register is programmed with 0C, measuring 0C or lower will result in an out-of-limit condition. Exceeding either the local or remote THERM limit asserts THERM low. When Pin 13 is configured as THERM2, exceeding either the local limit or remote high limit asserts THERM2 low. A default hysteresis value of 10C is Status Registers The status registers are read-only registers, at Address 0x02 (Status Register 1) and Address 0x23 (Status Register 2). They contain status information for the ADT7483A. http://onsemi.com 10 ADT7483A serviced by the master reading the device address, provided the error condition has gone away and the status register flag bits have been reset. When Flag 1 and/or Flag 0 of Status Register 1, or Flag 1 of Status Register 2 are set, the THERM output goes low to indicate that the temperature measurements are outside the programmed limits. The THERM output does not need to be reset, unlike the ALERT output. Once the measurements are within the limits, the corresponding status register bits are automatically reset and the THERM output goes high. The user may add hysteresis by programming Register 0x21. The THERM output will be reset only when the temperature falls below the THERM limit minus hysteresis. When Pin 13 is configured as THERM2, only the high temperature limits are relevant. If Flag 6, Flag 4 of Status Register 1, or Flag 4 of Status Register 2 are set, the THERM2 output goes low to indicate that the temperature measurements are outside the programmed limits. Flag 5 and Flag 3 of Status Register 1, and Flag 3 of Status Register 2 have no effect on THERM2. The behavior of THERM2 is otherwise the same as THERM. Bit 0 of Status Register 2 is set whenever the ALERT output of the ADT7483A is asserted low. This means that the user need only read Status Register 2 to determine if the ADT7483A is responsible for the ALERT. Bit 0 of Status Register 2 is reset when the ALERT output is reset. If the ALERT output is masked, then this bit is not set. Table 12. STATUS REGISTER 1 BIT ASSIGNMENTS Bit Mnemonic 7 BUSY 6 Function ALERT 1 when ADC Converting No LHIGH (Note 1) 1 when Local High Temperature Limit Tripped Yes 5 LLOW (Note 1) 1 when Local Low Temperature Limit Tripped Yes 4 R1HIGH (Note 1) 1 when Remote 1 High Temperature Limit Tripped Yes 3 R1LOW (Note 1) 1 when Remote 1 Low Temperature Limit Tripped Yes 2 D1 OPEN (Note 1) 1 when Remote 1 Sensor Open Circuit Yes 1 R1THRM1 1 when Remote1 THERM Limit Tripped No 0 LTHRM1 1 when Local THERM Limit Tripped No 1. These flags stay high until the status register is read, or they are reset by POR. Table 13. STATUS REGISTER 2 BIT ASSIGNMENTS Bit Mnemonic Function ALERT 7 Res Reserved for Future Use No 6 Res Reserved for Future Use No 5 Res Reserved for Future Use No 4 R2HIGH (Note 1) 1 when Remote 2 High Temperature Limit Tripped Yes 3 R2LOW (Note 1) 1 when Remote 2 Low Temperature Limit Tripped Yes 2 D2 OPEN (Note 1) 1 when Remote 2 Sensor Open Circuit Yes 1 R2THRM1 1 when Remote 2 THERM Limit Tripped No 0 ALERT 1 when ALERT Condition Exists No Offset Register Offset errors may be introduced into the remote temperature measurement by clock noise or by the thermal diode being located away from the hot spot. To achieve the specified accuracy on this channel, these offsets must be removed. The offset values are stored as 10-bit, twos complement values: The Remote 1 offset MSBs are stored in Register 0x11, and the LSBs are stored 0x12 (low byte, left justified). The Remote 2 offset MSBs are stored in Register 0x34, and the LSBs are stored 0x35 (low byte, left justified). The Remote 2 offset can be written to, or read from, the Remote 1 offset registers if Bit 3 of the Configuration 1 register is set to 1. This bit should be set to 0 (default) to read the Remote 1 offset values. 1. These flags stay high until the status register is read, or they are reset by POR. The eight flags that can generate an ALERT are NOR’d together, so if any of them are high, the ALERT interrupt latch is set and the ALERT output goes low (provided they are not masked out). Reading the Status 1 register will clear the five flags, Bit 6 to Bit 2 in Status Register 1, provided the error conditions that caused the flags to be set have gone away. Reading the Status 2 register will clear the three flags, Bit 4 to Bit 2 in Status Register 2, provided the error conditions that caused the flags to be set have gone away. A flag bit can only be reset if the corresponding value register contains an in-limit measurement or if the sensor is good. The ALERT interrupt latch is not reset by reading the status register. It is reset when the ALERT output has been Only the upper 2 bits of the LSB registers are used. The MSB of the MSB offset registers is the sign bit. The minimum offset that can be programmed is −128C, and the maximum is +127.75C. The value in the offset register is added or subtracted to the measured value of the remote temperature. The offset register powers up with a default value of 0C and will have no effect unless the user writes a different value to it. http://onsemi.com 11 ADT7483A Consecutive ALERT Register Table 14. SAMPLE OFFSET REGISTER CODES Offset Value 0x11/0x34 0x12/0x35 −128C 1000 0000 00 00 0000 −4C 1111 1100 00 00 0000 −1C 1111 1111 00 000000 −0.25C 1111 1111 10 00 0000 0C 0000 0000 00 00 0000 +0.25C 0000 0000 01 00 0000 +1C 0000 0001 00 00 0000 +4C 0000 0100 00 00 0000 +127.75C 0111 1111 11 00 0000 The value written to this register determines how many out-of-limit measurements must occur before an ALERT is generated. The default value is that one out-of-limit measurement generates an ALERT. The maximum value that can be chosen is 4. The purpose of this register is to allow the user to perform some filtering of the output. This is particularly useful at the fastest three conversion rates, where no averaging takes place. This register is at Address 0x22. Table 15. CONSECUTIVE ALERT REGISTER BIT Register Value Amount of Out-of-Limit Measurements Required One-shot Register yzax 000x 1 The one-shot register is used to initiate a conversion and comparison cycle when the ADT7483A is in standby mode, after which the device returns to standby. Writing to the one-shot register address (0x0F) causes the ADT7483A to perform a conversion and comparison on both the local and the remote temperature channels. This is not a data register as such, and it is the write operation to Address 0x0F that causes the one-shot conversion. The data written to this address is irrelevant and is not stored. yzax 001x 2 yzax 011x 3 yzax 111x 4 NOTES: y = SMBus SCL timeout bit. Default = 0. See the Serial Bus Interface section for more information. z = SMBus SDA timeout bit. Default = 0. See the Serial Bus Interface section for more information. a = Mask Internal ALERTs. x = Don’t care bit. Table 16. LIST OF REGISTERS Read Address (Hex) Write Address (Hex) N/A N/A Address Pointer Undefined 00 N/A Local Temperature Value 0000 0000 (0x00) 01 N/A Remote 1 Temperature Value High Byte 0000 0000 (0x00) Bit 3 Conf. Reg. = 0 No 01 N/A Remote 2 Temperature Value High Byte 0000 0000 (0x00) Bit 3 Conf. Reg. = 1 No 02 N/A Status Register 1 Undefined No 03 09 Configuration Register 1 0000 0000 (0x00) Yes 04 0A Conversion Rate 0000 0111 (0x07) Yes 05 0B Local Temperature High Limit 0101 0101 (0x55) (85C) Yes 06 0C Local Temperature Low Limit 0000 0000 (0x00) (0C) Yes 07 0D Remote 1 Temperature High Limit High Byte 0101 0101 (0x55) (85C) Bit 3 Conf. Reg. = 0 Yes 07 0D Remote 2 Temperature High Limit High Byte 0101 0101 (0x55) (85C) Bit 3 Conf. Reg. = 1 Yes 08 0E Remote 1 Temperature Low Limit High Byte 0000 0000 (0x00) (0C) Bit 3 Conf. Reg. = 0 Yes 08 0E Remote 2 Temperature Low Limit High Byte 0000 0000 (0x00) (0C) Bit 3 Conf. Reg. = 1 N/A 0F (Note 1) 10 N/A Remote 1 Temperature Value Low Byte 0000 0000 Bit 3 Conf. Reg. = 0 10 N/A Remote 2 Temperature Value Low Byte 0000 0000 Bit 3 Conf. Reg. = 1 No 11 11 Remote 1 Temperature Offset High Byte 0000 0000 Bit 3 Conf. Reg. = 0 Yes 11 11 Remote 2 Temperature Offset High Byte 0000 0000 Bit 3 Conf. Reg. = 1 Yes 12 12 Remote 1 Temperature Offset Low Byte 0000 0000 Bit 3 Conf. Reg. = 0 Yes 12 12 Remote 2 Temperature Offset Low Byte 0000 0000 Bit 3 Conf. Reg. = 1 Yes 13 13 Remote 1 Temperature High Limit Low Byte 0000 0000 Bit 3 Conf. Reg. = 0 Yes 13 13 Remote 2 Temperature High Limit Low Byte 0000 0000 Bit 3 Conf. Reg. = 1 Yes 14 14 Remote 1 Temperature Low Limit Low Byte 0000 0000 Bit 3 Conf. Reg. = 0 Yes Mnemonic Power-On Default Comment Lock No No One Shot Yes N/A http://onsemi.com 12 No ADT7483A Table 16. LIST OF REGISTERS (continued) Read Address (Hex) Write Address (Hex) Comment Lock 14 14 Remote 2 Temperature Low Limit Low Byte 0000 0000 Bit 3 Conf. Reg. = 1 Yes 19 19 Remote 1 THERM Limit 0101 0101 (0x55) (85C) Bit 3 Conf. Reg. = 0 Yes 19 19 Remote 2 THERM Limit 0101 0101 (0x55) (85C) Bit 3 Conf. Reg. = 1 Yes 20 20 Local THERM Limit 0101 0101 (0x55) (85C) Yes 21 21 THERM Hysteresis 0000 1010 (0x0A) (10C) Yes 22 22 Consecutive ALERT 0000 0001 (0x01) Yes 23 N/A Status Register 2 0000 0000 (0x00) No 24 24 Configuration 2 Register 0000 0000 (0x00) Yes 30 N/A Remote 2 Temperature Value High Byte 0000 0000 (0x00) No 31 31 Remote 2 Temperature High Limit High Byte 0101 0101 (0x55) (85C) Yes 32 32 Remote 2 Temperature Low Limit High Byte 0000 0000 (0x00) (0C) Yes 33 N/A Remote 2 Temperature Value Low Byte 0000 0000 (0x00) No 34 34 Remote 2 Temperature Offset High Byte 0000 0000 (0x00) Yes 35 35 Remote 2 Temperature Offset Low Byte 0000 0000 (0x00) Yes 36 36 Remote 2 Temperature High Limit Low Byte 0000 0000 (0x00) (0C) Yes 37 37 Remote 2 Temperature Low Limit Low Byte 0000 0000 (0x00) (0C) Yes Mnemonic Power-On Default 39 39 Remote 2 THERM Limit 0101 0101 (0x55) (85C) Yes FE N/A Manufacturer ID 0100 0001 (0x41) N/A FF N/A Die Revision Code 1001 0100 (0x94) N/A 1. Writing to address 0F causes the ADT7482 to perform a single measurement. It is not a data register as such and it does not matter what data is written to it. Serial Bus Interface The ADT7483A has two address pins, ADD0 and ADD1, to allow selection of the device address, so that several ADT7483As can be used on the same bus, and/or to avoid conflict with other devices. Although only two address pins are provided, these are threestate, and can be grounded, left unconnected, or tied to VDD, so that a total of nine different addresses are possible, as shown in Table 17. It should be noted that the state of the address pins is only sampled at power-up, so changing them after power-up has no effect. Control of the ADT7483A is carried out via the serial bus. The ADT7483A is connected to the serial bus as a slave device, under the control of a master device. The ADT7483A has an SMBus timeout feature. When this is enabled, the SMBus typically times out after 25 ms of no activity. However, this feature is not enabled by default. Bit 7 (SCL timeout bit) of the consecutive ALERT register (Address = 0x22) should be set to enable the SCL timeout. Bit 6 (SDA timeout bit) of the consecutive ALERT register (Address = 0x22) should be set to enable the SDA timeout. The ADT7483A supports packet error checking (PEC) and its use is optional. It is triggered by supplying the extra clock for the PEC byte. The PEC byte is calculated using CRC−8. The frame check sequence (FCS) conforms to CRC−8 by the polynomial: C(x) + x 8 ) x 2 ) x 1 ) 1 Consult the SMBus 1.1 specification information (www.smbus.org). Table 17. SAMPLE OFFSET REGISTER CODES (eq. 1) for more Addressing the Device In general, every SMBus device has a 7-bit device address (except for some devices that have extended, 10-bit addresses). When the master device sends a device address over the bus, the slave device with that address will respond. http://onsemi.com 13 ADD1 ADD0 Device Address 0 0 0011 000 0 NC 0011 001 0 1 0011 010 NC 0 0101 001 NC NC 0101 010 NC 1 0101 011 1 0 1001 100 1 NC 1001 101 1 1 1001 110 ADT7483A 3. When all data bytes have been read or written, stop conditions are established. In write mode, the master will pull the data line high during the tenth clock pulse to assert a stop condition. In read mode, the master device will override the acknowledge bit by pulling the data line high during the low period before the ninth clock pulse. This is known as no acknowledge. The master will then take the data line low during the low period before the tenth clock pulse, then high during the tenth clock pulse to assert a stop condition. The serial bus protocol operates as follows: 1. The master initiates data transfer by establishing a start condition, defined as a high-to-low transition on the serial data line (SDATA), while the serial clock line (SCLK) remains high. This indicates that an address/data stream follows. All slave peripherals connected to the serial bus respond to the start condition and shift in the next eight bits, consisting of a 7-bit address (MSB first) plus an R/W bit, which determines the direction of the data transfer, that is, whether data will be written to, or read from, the slave device. The peripheral whose address corresponds to the transmitted address responds by pulling the data line low during the low period before the ninth clock pulse, known as the acknowledge bit. All other devices on the bus now remain idle while the selected device waits for data to be read from or written to it. If the R/W bit is a 0, the master writes to the slave device. If the R/W bit is a 1, the master reads from the slave device. 2. Data is sent over the serial bus in a sequence of nine clock pulses, eight bits of data followed by an acknowledge bit from the slave device. Transitions on the data line must occur during the low period of the clock signal and remain stable during the high period, since a low-to-high transition when the clock is high may be interpreted as a stop signal. The number of data bytes that can be transmitted over the serial bus in a single read or write operation is limited only by what the master and slave devices can handle. 1 Any number of bytes of data may be transferred over the serial bus in one operation, but it is not possible to mix read and write in one operation because the type of operation is determined at the beginning and cannot subsequently be changed without starting a new operation. For the ADT7483A, write operations contain either one or two bytes, while read operations contain one byte. To write data to one of the device data registers, or to read data from it, the address pointer register must be set so that the correct data register is addressed. The first byte of a write operation always contains a valid address that is stored in the address pointer register. If data is to be written to the device, the write operation contains a second data byte that is written to the register selected by the address pointer register (see Figure 15). The device address is sent over the bus followed by R/W set to 0. This is followed by two data bytes. The first data byte is the address of the internal data register to be written to, which is stored in the address pointer register. The second data byte is the data to be written to the internal data register. 9 9 1 SCLK SDATA START BY MASTER 1 0 0 1 1 0 1 FRAME 1 SERIAL BUS ADDRESS BYTE R/W D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY ADT7483A FRAME 2 ADDRESS POINTER REGISTER BYTE ACK. BY ADT7483A 1 9 SCLK (CONTINUED) SDATA (CONTINUED) D7 D6 D5 D4 D3 D2 FRAME 3 DATA BYTE D1 D0 ACK. BY STOP BY ADT7483A MASTER Figure 15. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register http://onsemi.com 14 ADT7483A 1 9 9 1 SCLK SDATA 1 START BY MASTER 0 0 1 1 0 1 FRAME 1 SERIAL BUS ADDRESS BYTE D7 R/W ACK. BY ADT7483A D6 D5 D4 D3 D2 D1 D0 ACK. BY ADT7483A FRAME 2 ADDRESS POINTER REGISTER BYTE STOP BY MASTER Figure 16. Writing to the Address Pointer Register Only 9 1 1 9 SCLK SDATA START BY MASTER 1 0 0 1 1 0 1 FRAME 1 SERIAL BUS ADDRESS BYTE R/W D7 D6 ACK. BY ADT7483A D5 D4 D3 D2 D1 FRAME 2 DATA BYTE FROM ADT7483A D0 ACK. BY MASTER STOP BY MASTER Figure 17. Reading Data from a Previously Selected Register be wire-OR’ed together, so that the common line will go low if one or more of the ALERT outputs goes low. The ALERT output can be used as an interrupt signal to a processor, or it can be used as an SMBALERT. Slave devices on the SMBus cannot normally signal to the bus master that they want to talk, but the SMBALERT function allows them to do so. One or more ALERT outputs can be connected to a common SMBALERT line connected to the master. When the SMBALERT line is pulled low by one of the devices, the following procedure occurs, as shown in Figure 18. When reading data from a register there are two possibilities: 1. If the address pointer register value of the ADT7483A is unknown or not the desired value, it is first necessary to set it to the correct value before data can be read from the desired data register. This is done by performing a write to the ADT7483A as before, but only the data byte containing the register read address is sent, as data is not to be written to the register (see Figure 16). A read operation is then performed consisting of the serial bus address, R/W bit set to 1, followed by the data byte read from the data register (see Figure 17). 2. If the address pointer register is known to be already at the desired address, data can be read from the corresponding data register without first writing to the address pointer register and the bus transaction shown in Figure 16 can be omitted. MASTER RECEIVES SMBALERT START ALERT RESPONSE ADDRESS MASTER SENDS ARA AND READ COMMAND RD ACK DEVICE ADDRESS NO STOP ACK DEVICE SENDS ITS ADDRESS Figure 18. Use of SMBALERT 1. SMBALERT is pulled low. 2. Master initiates a read operation and sends the alert response address (ARA = 0001 100). This is a general call address that must not be used as a specific device address. 3. The device whose ALERT output is low responds to the alert response address, and the master reads its device address. The device address is seven bits, so an LSB of 1 is added. The address of the device is now known and it can be interrogated in the usual way. 4. If more than one device’s ALERT output is low, the one with the lowest device address will have priority, in accordance with normal SMBus arbitration. 5. Once the ADT7483A has responded to the alert response address, it will reset its ALERT output, provided that the error condition that caused the ALERT no longer exists. If the SMBALERT line NOTES:It is possible to read a data byte from a data register without first writing to the address pointer register. However, if the address pointer register is already at the correct value, it is not possible to write data to a register without writing to the address pointer register because the first data byte of a write is always written to the address pointer register. Remember that some of the ADT7483A registers have different addresses for read and write operations. The write address of a register must be written to the address pointer if data is to be written to that register, but it may not be possible to read data from that address. The read address of a register must be written to the address pointer before data can be read from that register. ALERT Output This is applicable when Pin 13 is configured as an ALERT output. The ALERT output goes low whenever an out-of-limit measurement is detected, or if the remote temperature sensor is open circuit. It is an open-drain output and requires a pull-up to VDD. Several ALERT outputs can http://onsemi.com 15 ADT7483A together to prevent the OPEN flag from being continuously set. Most temperature sensing diodes have an operating temperature range of −55C to +150C. Above 150C, they lose their semiconductor characteristics and approximate conductors instead. This results in a diode short, setting the OPEN flag. The remote diode in this case no longer gives an accurate temperature measurement. A read of the temperature result register will give the last good temperature measurement. The user should be aware that, while the diode fault is triggered, the temperature measurement on the remote channels may not be accurate. remains low, the master will send the ARA again, and so on, until all devices whose ALERT outputs were low have responded. Masking the ALERT Output The ALERT output can be masked for local, Remote 1, Remote 2, or all three channels. This is done by setting the appropriate mask bits in either the Configuration 1 register (read address = 0x03, write address = 0x09) or in the consecutive ALERT register (address = 0x22) To mask ALERTs due to local temperature, set Bit 5 of the consecutive ALERT register to 1. Default = 0. To mask ALERTs due to Remote 1 temperature, set Bit 1 of the Configuration 1 register to 1. Default = 0. To mask ALERTs due to Remote 2 temperature, set Bit 0 of the Configuration 1 register to 1. Default = 0. To mask ALERTs due to any channel, set Bit 7 of the Configuration 1 register to 1. Default = 0. Interrupt System The ADT7483A has two interrupt outputs, ALERT and THERM. Both outputs have different functions and behavior. ALERT is maskable and responds to violations of software programmed temperature limits or an open-circuit fault on the remote diode. THERM is intended as a fail-safe interrupt output that cannot be masked. If the Remote 1, Remote 2, or local temperature exceeds the programmed high temperature limits, or equals or exceeds the low temperature limits, the ALERT output is asserted low. An open-circuit fault on the remote diode also causes ALERT to assert. ALERT is reset when serviced by a master reading its device address, provided the error condition has gone away and the status register has been reset. Similarly, the THERM output asserts low if the Remote 1, Remote 2, or local temperature exceeds the programmed THERM limits. The THERM temperature limits should normally be equal to or greater than the high temperature limits. THERM is automatically reset when the temperature falls back within the (THERM − Hysteresis) limit. The local and remote THERM limits are set by default to 85C. An hysteresis value can be programmed, in which case, THERM resets when the temperature falls to the limit value minus the hysteresis value. This applies to both local and remote measurement channels. The power-on hysteresis default value is 10C, but this may be reprogrammed to any value after power-up. The hysteresis loop on the THERM outputs is useful when THERM is used for on/off control of a fan. The user’s system can be set up so that when THERM asserts, a fan can be switched on to cool the system. When THERM goes high again, the fan can be switched off. Programming an hysteresis value protects from fan jitter, wherein the temperature hovers around the THERM limit and the fan is constantly being switched. Low Power Standby Mode The ADT7483A can be put into low power standby mode by setting Bit 6 (Mon/STBY bit) of the Configuration 1 register (read address = 0x03, write address = 0x09) to 1. When Bit 6 is 0, the ADT7483A operates normally. When Bit 6 is 1, the ADC is inhibited, and any conversion in progress is terminated without writing the result to the corresponding value register. The SMBus is still enabled. Power consumption in the standby mode is reduced to less than 5 mA. When the device is in standby mode, it is still possible to initiate a one-shot conversion of both channels by writing to the oneshot register (Address 0x0F), after which the device will return to standby. It does not matter what is written to the one-shot register, all data written to it is ignored. It is also possible to write new values to the limit register while in standby mode. If the values stored in the temperature value registers are now outside the new limits, an ALERT is generated, even though the ADT7483A is still in standby. Sensor Fault Detection The ADT7483A has internal sensor fault detection circuitry located at its D+ input. This circuit can detect situations where a remote diode is not connected, or is incorrectly connected, to the ADT7483A. A simple voltage comparator trips if the voltage at D+ exceeds VDD − 1 V (typical), signifying an open circuit between D+ and D−. The output of this comparator is checked when a conversion is initiated. Bit 2 (D1 OPEN flag) of the Status Register 1 (Address 0x02) is set if a fault is detected on the Remote 1 channel. Bit 2 (D2 OPEN flag) of the Status Register 2 (Address 0x23) is set if a fault is detected on the Remote 2 channel. If the ALERT pin is enabled, setting this flag will cause ALERT to assert low. If a remote sensor is not used with the ADT7483A, then the D+ and D− inputs of the ADT7483A need to be tied Table 18. THERM HYSTERESIS THERM Hysteresis Binary Representation 0C 0 000 0000 1C 0 000 0001 10C 0 000 1010 http://onsemi.com 16 ADT7483A Figure 19 shows how the THERM and ALERT outputs operate. The ALERT output can be used as an SMBALERT to signal to the host via the SMBus that the temperature has risen. If the temperature continues to increase, the THERM output can be used to turn on a fan to cool the system. This method ensures that there is a fail-safe mechanism to cool the system, without the need for host intervention. programmed local and/or remote high temperature limits. It is reset in the same manner as THERM, and it is not maskable. The programmed hysteresis value also applies to THERM2. Figure 20 shows how THERM and THERM2 might operate together to implement two methods of cooling the system. In this example, the THERM2 limits are set lower than the THERM limits. The THERM2 output can be used to turn on a fan. If the temperature continues to rise and exceeds the THERM limits, the THERM output can provide additional cooling by throttling the CPU. TEMPERATURE 1005C 905C THERM LIMIT 805C TEMPERATURE THERM LIMIT − HYSTERESIS 705C 905C HIGH TEMP LIMIT 605C 705C 505C 605C 405C RESET BY MASTER ALERT 1 405C 4 305C 2 3 Figure 19. Operation of the ALERT and THERM Interrupts THERM2 THERM If the measured temperature exceeds the high THERM2 LIMIT 505C THERM THERM LIMIT 805C 1 4 2 3 Figure 20. Operation of the THERM and THERM2 Interrupts temperature limit, the ALERT output asserts low. If the temperature continues to increase and exceeds the THERM limit, the THERM output asserts low. This can be used to throttle the CPU clock or switch on a fan. The THERM output deasserts (goes high) when the temperature falls to THERM limit minus hysteresis. In Figure 19, the default hysteresis value of 10C is shown. The ALERT output deasserts only when the temperature has fallen below the high temperature limit, and the master has read the device address and cleared the status register. When the THERM2 limit is exceeded, the THERM2 signal asserts low. If the temperature continues to increase and exceeds the Pin 13 on the ADT7483A can be configured as either an ALERT output or as an additional THERM output. THERM2 will assert low when the temperature exceeds the THERM limit, the THERM output asserts low. The THERM output deasserts (goes high) when the temperature falls to THERM limit minus hysteresis. In Figure 20, there is no hysteresis value shown. As the system cools further, and the temperature falls below the THERM2 limit, the THERM2 signal resets. Again, no hysteresis value is shown for THERM2. The temperature measurement can be either the local or the remote temperature measurement. http://onsemi.com 17 ADT7483A Applications Base resistance less than 100 W. Small variation in hFE (50 to 150) that indicates tight Noise Filtering control of VBE characteristics. For temperature sensors operating in noisy environments, previous practice was to place a capacitor across the D+ and D− pins to help combat the effects of noise. However, large capacitances affect the accuracy of the temperature measurement, leading to a recommended maximum capacitor value of 1,000 pF. Transistors such as 2N3904, 2N3906, or equivalents in SOT−23 packages, are suitable devices to use. Thermal Inertia and Self-heating Accuracy depends on the temperature of the remote sensing diode and/or the local temperature sensor being at the same temperature as that being measured. A number of factors can affect this. Ideally, the sensor should be in good thermal contact with the part of the system being measured. If it is not, the thermal inertia caused by the sensor’s mass causes a lag in the response of the sensor to a temperature change. In the case of the remote sensor, this should not be a problem, since it will either be a substrate transistor in the processor or a small package device, such as SOT−23, placed in close proximity to it. The on-chip sensor, however, is often remote from the processor and only monitors the general ambient temperature around the package. In practice, the ADT7483A package will be in electrical, and hence thermal, contact with a PCB and may also be in a forced airflow. How accurately the temperature of the board and/or the forced airflow reflects the temperature to be measured will also affect the accuracy. Self-heating, due to the power dissipated in the ADT7483A or the remote sensor, causes the chip temperature of the device or remote sensor to rise above ambient. However, the current forced through the remote sensor is so small that self-heating is negligible. In the case of the ADT7483A, the worst-case condition occurs when the device is converting at 64 conversions per second while sinking the maximum current of 1 mA at the ALERT and THERM output. In this case, the total power dissipation in the device is about 4.5 mW. The thermal resistance, qJA, of the QSOP−16 package is about 150C/W. Factors Affecting Diode Accuracy Remote Sensing Diode The ADT7483A is designed to work with substrate transistors built into processors or with discrete transistors. Substrate transistors will generally be PNP types with the collector connected to the substrate. Discrete types can be either a PNP or NPN transistor connected as a diode (base shorted to collector). If an NPN transistor is used, the collector and base are connected to D+ and the emitter to D−. If a PNP transistor is used, the collector and base are connected to D− and the emitter to D+. To reduce the error due to variations in both substrate and discrete transistors, the following factors should be taken into consideration: The ideality factor, nf , of the transistor is a measure of the deviation of the thermal diode from ideal behavior. The ADT7483A is trimmed for an nf value of 1.008. Use the following equation to calculate the error introduced at a temperature,T (C) when using a transistor whose nf does not equal 1.008. Consult the processor data sheet for the nf values. DT + ǒn f * 1.008Ǔń1.008 ǒ273.15 Kelvin ) TǓ (eq. 2) To factor this in, write the DT value to the offset register. It is then automatically added to, or subtracted from, the temperature measurement by the ADT7483A. Some CPU manufacturers specify the high and low current levels of the substrate transistors. The high current level of the ADT7483A, IHIGH, is 200 mA, and the low level current, ILOW, is 12 mA. If the ADT7483A current levels do not match the current levels specified by the CPU manufacturer, it may be necessary to remove an offset. Refer to the CPU data sheet to determine whether this offset needs to be removed and how to calculate it. This offset is programmed to the offset register. It is important to note that if more than one offset must be considered, program the algebraic sum of these offsets to the offset register. Layout Considerations Digital boards can be electrically noisy environments, and the ADT7483A measures very small voltages from the remote sensor, so care must be taken to minimize noise induced at the sensor inputs. Follow these precautions: 1. Place the ADT7483A as close as possible to the remote sensing diode. Provided that the worst noise sources such as clock generators, data/address buses, and CRTs are avoided, this distance can be 4 inches to 8 inches. 2. Route the D+ and D– tracks close together, in parallel, with grounded guard tracks on each side. To minimize inductance and reduce noise pickup, a 5 mil track width and spacing is recommended. Provide a ground plane under the tracks, if possible. If a discrete transistor is used with the ADT7483A, the best accuracy is obtained by choosing devices according to the following criteria: Base-emitter voltage greater than 0.25 V at 6 mA, at the highest operating temperature. Base-emitter voltage less than 0.95 V at 100 mA, at the lowest operating temperature. http://onsemi.com 18 ADT7483A GND to ensure that any capacitance seen at D+ and D− is a maximum of 1,000 pF. This maximum value includes the filter capacitance, plus any cable or stray capacitance between the pins and the sensor diode. 5. If the distance to the remote sensor is more than 8 inches, the use of twisted pair cable is recommended. A total of 6 feet to 12 feet is needed. 6. For very long distances (up to 100 feet), use shielded twisted pair, such as Belden No. 8451 microphone cable. Connect the twisted pair to D+ and D−, and the shield to GND close to the ADT7483A. Leave the remote end of the shield unconnected to avoid ground loops. 5 MIL 5 MIL D+ 5 MIL 5 MIL 5 MIL D− 5 MIL GND 5 MIL Figure 21. Typical Arrangement of Signal Tracks 3. Minimize the number of copper/solder joints that can cause thermocouple effects. Where copper/solder joints are used, make sure that they are in both the D+ and D− path and at the same temperature. Thermocouple effects should not be a major problem as 1C corresponds to approximately 200 mV, and thermocouple voltages are about 3 mV/C of temperature difference. Unless there are two thermocouples with a large temperature differential between them, thermocouple voltages should be much less than 200 mV. 4. Place a 0.1 mF bypass capacitor close to the VDD pin. In extremely noisy environments, place an input filter capacitor across D+ and D− close to the ADT7483A. This capacitance can effect the temperature measurement, so care must be taken Because the measurement technique uses switched current sources, excessive cable or filter capacitance can affect the measurement. When using long cables, the filter capacitance can be reduced or removed. Application Circuit Figure 22 shows a typical application circuit for the ADT7483A, using discrete sensor transistors. The pull-ups on SCLK, SDATA, and ALERT are required only if they are not already provided elsewhere in the system. The SCLK and SDATA pins of the ADT7483A can be interfaced directly to the SMBus of an I/O controller, such as the Intel 820 chipset. VDD ADT7483A D1+ 2N3904/06 or CPU THERMAL DIODE D1− D2+ 3.0 V to 3.6 V 0.1 mF TYP 10 kW SCLK SMBUS CONTROLLER SDATA ALERT D2− VDD ADD0 5.0 V or 12 V THERM TYP 10 kW ADD1 GND FAN ENABLE FAN CONTROL CIRCUIT Figure 22. Typical Application Circuit Table 19. ORDERING INFORMATION Device Number* ADT7483AARQZ−RL Temperature Range Package Type Package Option Shipping† −40C to +125C 16-lead QSOP RQ−16 2,500 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *The “Z’’ suffix indicates Pb-Free part. http://onsemi.com 19 ADT7483A PACKAGE DIMENSIONS QSOP16 CASE 492−01 ISSUE A 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. 4. DIMENSION D DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EX CEED 0.005 PER SIDE. DIMENSION E1 DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. IN TERLEAD FLASH OR PROTRUSION SHALL NOT EX CEED 0.005 PER SIDE. D AND E1 ARE DETERMINED AT DATUM H. 5. DATUMS A AND B ARE DETERMINED AT DATUM H. 0.20 C D D 16 L2 D A 9 GAUGE PLANE SEATING PLANE E E1 C L C DETAIL A 2X 2X 10 TIPS 0.20 C D 1 8 16X e B A2 0.10 C 0.10 C 16X b 0.25 A1 C DIM A A1 A2 b c D E E1 e h L L2 M 0.25 C D M C A-B D h x 45 _ H A SEATING PLANE DETAIL A M INCHES MIN MAX 0.053 0.069 0.004 0.010 0.049 ---0.008 0.012 0.007 0.010 0.193 BSC 0.237 BSC 0.154 BSC 0.025 BSC 0.009 0.020 0.016 0.050 0.010 BSC 0_ 8_ MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 1.24 ---0.20 0.30 0.19 0.25 4.89 BSC 6.00 BSC 3.90 BSC 0.635 BSC 0.22 0.50 0.40 1.27 0.25 BSC 0_ 8_ SOLDERING FOOTPRINT* 16X 16X 0.42 16 1.12 9 6.40 1 8 0.635 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. 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