CM1248 04QG D

CM1248-04QG
Low Capacitance Transient
Voltage Suppressors / ESD
Protectors
Features
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• Low I/O Capacitance at 10 pF at 0 V
• In−System ESD Protection to ±15 kV Contact Discharge,
•
•
•
per the IEC 61000−4−2 International Standard
Compact SMT Package Saves Board Space and Facilitates Layout
in Space−Critical Applications
Each I/O Pin Can Withstand over 1000 ESD Strikes
These Devices are Pb−Free and are RoHS Compliant
UDFN−6
QG SUFFIX
CASE 517BM
BLOCK DIAGRAM
CM1248−04QG
Pin 6
VN
Pin 4
Pin 1
VN
Pin 3
MARKING DIAGRAM
LR
LR = Specific Device Code
ORDERING INFORMATION
Device
Package
Shipping†
CM1248−04QG uDFN−0.4 mm 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2011
February, 2011 − Rev. 4
1
Publication Order Number:
CM1248−04QG/D
CM1248−04QG
PACKAGE / PINOUT DIAGRAMS
Top View
Pin 1
Pin 6
Pin 2
Pin 5
Pin 3
Pin 4
6−Lead uDFN (.4 mm)
CM1248−04QG
Table 1. PIN DESCRIPTIONS
Pins
Name
(Refer to package / pinout diagrams)
CHx
(Refer to package / pinout diagrams)
VN
Description
The cathode of the respective TVS diode, which should be connected to the node
requiring transient voltage protection.
The anode of the TVS diodes.
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Storage Temperature Range
Rating
Units
−65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. STANDARD OPERATING CONDITIONS
Parameter
Operating Temperature
Rating
Units
−40 to +85
°C
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Symbol
CIN
Parameter
Conditions
Channel Input Capacitance
TA = 25°C, 0 VDC, 1 MHz; Note 2
0 VDC, 1 MHz; Note 1
Typ
Max
10
7
Units
pF
15
Differential Channel I/O to GND Capacitance
TA = 25°C, 2.5 VDC, 1 MHz; Note 2
VRSO
Reverse Stand−off Voltage
IR = 10 mA, TA = 25°C
5.5
V
IR = 1 mA, TA = 25°C
6.1
V
ILEAK
Leakage Current
VSIG
Small Signal Clamp Voltage
Positive Clamp
Negative Clamp
I = 10 mA, TA = 25°C
I = −10 mA, TA = 25°C
VESD
ESD Withstand Voltage
Contact Discharge per IEC 61000−4−2 standard
TA = 25°C
(Notes 2, 4 and 5)
Diode Dynamic Resistance
Forward Conduction
Reverse Conduction
TA = 25°C
(Notes 2 and 3)
0.19
pF
DCIN
RD
1.
2.
3.
4.
5.
Min
pF
VIN = 5.0 VDC, TA = 25°C
0.25
mA
VIN = 5.0 VDC, Note 1
0.75
mA
6.8
−0.89
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2
kV
±15
All parameters specified at TA = −40°C to +85°C unless otherwise noted.
These parameters guaranteed by design and characterization.
Human Body Model per MIL−STD−883, Method 3015, CDischarge = 100 pF, RDischarge = 1.5 KW, VN grounded.
Standard IEC 61000−4−2 with CDischarge = 150 pF, RDischarge = 330 W, VN grounded.
These measurements performed with no external capacitor on PinX.
V
0.57
1.36
W
CM1248−04QG
PERFORMANCE INFORMATION
Diode Capacitance
Typical diode capacitance with respect to positive TVS cathode voltage (reverse voltage across the diode) is given in Diode
Capacitance vs. Reverse Voltage.
Figure 1. Diode Capacitance vs. Reverse Voltage
Typical High Current Diode Characteristics
Measurements are made in pulsed mode with a nominal pulse width of 0.7 ms.
Figure 2. Typical Input VI Characteristics
(Pulse−mode Measurements, Pulse Width = 0.7 ms nominal)
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3
CM1248−04QG
PACKAGE DIMENSIONS
UDFN6, 1.25x1, 0.4P
CASE 517BM−01
ISSUE O
PIN ONE
REFERENCE
2X
ÉÉ
ÉÉ
L1
E
0.10 C
2X
DETAIL A
ALTERNATE TERMINAL
CONSTRUCTIONS
0.10 C
ÉÉÉ
ÉÉÉ
ÇÇÇ
TOP VIEW
EXPOSED Cu
DETAIL B
(A3)
0.10 C
A1
SIDE VIEW
DETAIL A
C
6X
1
6
MOLD CMPD
ÉÉ
ÉÉ
ÇÇ
A3
DIM
A
A1
A3
b
D
E
e
L
L1
A1
DETAIL B
A
0.08 C
NOTE 4
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L
L
A B
D
SEATING
PLANE
ALTERNATE
CONSTRUCTIONS
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.15 REF
0.15
0.25
1.25 BSC
1.00 BSC
0.40 BSC
0.20
0.40
−−−
0.15
L
3
RECOMMENDED
SOLDERING FOOTPRINT*
4
6X
6X b
e
6X
0.25
0.53
0.10 C A B
0.05 C
NOTE 3
1.30
BOTTOM VIEW
PACKAGE
OUTLINE
1
0.40
PITCH
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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PUBLICATION ORDERING INFORMATION
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Phone: 81−3−5773−3850
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ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
CM1248−04QG/D
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