CM1263 02SE D

CM1263-02SE
Low Capacitance ESD
Protection for High-Speed
Serial Interfaces
Features
• 2 Channels of ESD Protection
• 0.85 pF Loading Capacitance per Channel Typical
• Provides ESD Protection to IEC61000−4−2 Level 4:
• ±8 kV Contact Discharge
• ±15 kV Air Discharge
• 5−Pin SOT−553 Package
• These Devices are Pb−Free and are RoHS Compliant
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Applications
BLOCK DIAGRAM
SOT−553
SE SUFFIX
CASE 463B
• LCD and Camera Data Lines in Wireless Handsets that Use
•
•
•
•
High−speed Serial Interfaces such as MDDI, MIPI, MVI and MPL
I/O Port Protection for Mobile Handsets, Notebook Computers,
PDAs, etc.
Wireless Handsets
Handheld PCs/PDAs
LCD and Camera Modules
VP
CH1
CH2
VN
MARKING DIAGRAM
L63 M
L63
M
= Specific Device Code
= Date Code
ORDERING INFORMATION
Device
Package
Shipping†
CM1263−02SE
SOT−553
(Pb−Free)
5000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2011
March, 2011 − Rev. 3
1
Publication Order Number:
CM1263−02SE/D
CM1263−02SE
PACKAGE / PINOUT DIAGRAM
Table 1. PIN DESCRIPTIONS
5−Pin, SOT−553 Package
Pin
Description
1
VP
2
VN
3
NC
4
(CH1) ESD Channel #1
5
(CH2) ESD Channel #2
5
4
L63
1
1
2
3
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Operating Supply Voltage (VP − VN)
Operating Temperature Range
Storage Temperature Range
DC Voltage at any channel input
Rating
Units
6.0
V
–40 to +85
°C
–65 to +150
°C
(VN − 0.5) to (VP + 0.5)
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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2
CM1263−02SE
Table 3. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Symbol
Parameter
Conditions
VP
Operating Supply Voltage (VP − VN)
IP
Operating Supply Current
(VP − VN) = 3.3 V
VF
Diode Forward Voltage
Top Diode
Bottom Diode
IF = 8 mA; TA = 25°C
Channel Leakage Current
Min
Max
Units
3.3
5.5
V
8.0
mA
V
0.80
0.80
0.95
0.95
TA = 25°C; VP = 5 V, VN = 0 V,
VTEST = 0 to 5 V
0.1
1.0
mA
Channel Input Capacitance
At 1 MHz, VP = 3.3 V, VN = 0 V, VIN = 1.65 V
0.85
1.2
pF
ΔCIN
Channel Input Capacitance Matching
At 1 MHz, VP = 3.3 V, VN = 0 V, VIN = 1.65 V
0.02
VESD
ESD Protection
Peak Discharge Voltage at any
channel input, in system:
a) Contact Discharge per
IEC 61000−4−2 standard
b) Air Discharge per
IEC 61000−4−2 standard
ILEAK
CIN
VCL
RDYN
0.60
0.60
Typ
pF
kV
TA = 25°C; (Notes 2 and 3)
±8
TA = 25°C; (Note 3)
±15
Channel Clamp Voltage
Positive Transients
Negative Transients
TA = 25°C, IPP = 1 A, tP = 8/20 mS
(Note 3)
Dynamic Resistance
Positive Transients
Negative Transients
IPP = 1 A, tP = 8/20 mS
Any I/O pin to Ground;
(Note 3)
1. All parameters specified at TA = –40°C to +85°C unless otherwise noted.
2. Standard IEC 61000−4−2 with CDischarge = 150pF, RDischarge = 330 W, VP = 3.3 V, VN grounded.
3. These measurements performed with no external capacitor on VP (VP floating).
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3
+9.96
–1.6
0.96
0.5
V
W
CM1263−02SE
PACKAGE DIMENSIONS
SOT−553, 5 LEAD
CASE 463B−01
ISSUE B
D
−X−
5
A
4
1
2
b
e
L
E
−Y−
3
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
HE
DIM
A
b
c
D
E
e
L
HE
c
5 PL
0.08 (0.003)
M
X Y
MILLIMETERS
NOM
MAX
0.55
0.60
0.22
0.27
0.13
0.18
1.60
1.70
1.20
1.30
0.50 BSC
0.10
0.20
0.30
1.50
1.60
1.70
MIN
0.50
0.17
0.08
1.50
1.10
INCHES
NOM
0.022
0.009
0.005
0.063
0.047
0.020 BSC
0.004
0.008
0.059
0.063
MIN
0.020
0.007
0.003
0.059
0.043
MAX
0.024
0.011
0.007
0.067
0.051
0.012
0.067
SOLDERING FOOTPRINT*
STYLE 8:
PIN 1. CATHODE
2. COLLECTOR
3. N/C
4. BASE
5. EMITTER
0.3
0.0118
0.45
0.0177
1.35
0.0531
1.0
0.0394
0.5
0.5
0.0197 0.0197
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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CM1263−02SE/D
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