CM2020 01TR D

CM2020-01TR
HDMI Transmitter Port
Protection and Interface
Device
Product Description
The CM2020−01TR HDMI Transmitter Port Protection and
Interface Device is specifically designed for next generation HDMI
Source interface protection.
An integrated package provides all ESD, level shift, overcurrent
output protection and backdrive protection for an HDMI port in
a single 38−Pin TSSOP package.
The CM2020−01TR part is specifically designed to complement the
CM2021 protection part in HDMI receivers (displays, DTV,
CE devices, etc.)
The CM2020−01TR also incorporates a silicon overcurrent
protection device for +5 V supply voltage output to the connector.
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TSSOP 38
TR SUFFIX
CASE 948AG
Features
•
•
•
•
•
•
•
•
•
HDMI 1.3 Compliant
0.05 pF Matching Capacitance between the TMDS Intra−Pair
Overcurrent Output Protection
Level Shifting/Isolation Circuitry
±8 kV ESD Protection on all External Lines
Matched 0.5 mm Trace Spacing (TSSOP)
Simplified Layout for HDMI Connectors
Backdrive Protection
These Devices are Pb−Free and are RoHS Compliant
Applications
•
•
•
•
April, 2011 − Rev. 5
CM2020−01TR
CM2020−01TR = Specific Device Code
ORDERING INFORMATION
Device
Package
Shipping†
CM2020−01TR
TSSOP−38
(Pb−Free)
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
PC
Consumer Electronics
Set Top Box
DVD/RW Players
© Semiconductor Components Industries, LLC, 2011
MARKING DIAGRAM
1
Publication Order Number:
CM2020−01TR/D
CM2020−01TR
ELECTRICAL SCHEMATIC
ESD_BYP
5V_SUPPLY
TMDS_D2+
TMDS_GND
TMDS_D2−
TMDS_D1+
TMDS_D0+
TMDS_CK+
TMDS_GND
TMDS_GND
TMDS_GND
TMDS_D1−
TMDS_D0−
TMDS_CK−
LV SUPPLY
CE_REMOTE_IN
LV SUPPLY
LV SUPPLY
DDC_CLK_IN
DDC_DAT_OUT
DDC_DAT_IN
CE_REMOTE_OUT
LV SUPPLY
DDC_CLK_OUT
55 mA
Overcurrent
Switch
5V_SUPPLY
HOTPLUG_DET_OUT
HOTPLUG_DET_IN
5V_OUT
PACKAGE / PINOUT DIAGRAM
Top View
5V_SUPPLY
1
38
5V_OUT
LV_SUPPLY
2
37
ESD_BYP
GND
3
36
GND
TMDS_D2+
4
35
TMDS_D2+
TMDS_GND
5
34
TMDS_GND
TMDS_D2−
6
33
TMDS_D2−
TMDS_D1+
7
32
TMDS_D1+
TMDS_GND
8
31
TMDS_GND
TMDS_D1−
9
30
TMDS_D1−
TMDS_D0+
10
29
TMDS_D0+
TMDS_GND
11
28
TMDS_GND
TMDS_D0−
12
27
TMDS_D0−
TMDS_CK+
13
26
TMDS_CK+
TMDS_GND
14
25
TMDS_GND
TMDS_CK−
15
24
TMDS_CK−
CE_REMOTE_IN
16
23
CE_REMOTE_OUT
DDC_CLK_IN
17
22
DDC_CLK_OUT
DDC_DAT_IN
18
21
DDC_DAT_OUT
HOTPLUG_DET_IN
19
20
HOTPLUG_DET_OUT
38−Pin TSSOP Package
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CM2020−01TR
Table 1. PIN DESCRIPTIONS
Pins
Name
ESD Level
4, 35
TMDS_D2+
8 kV (Note 2)
TMDS 0.9 pF ESD Protection (Note 1)
Description
6, 33
TMDS_D2−
8 kV (Note 2)
TMDS 0.9 pF ESD Protection (Note 1)
7, 32
TMDS_D1+
8 kV (Note 2)
TMDS 0.9 pF ESD Protection (Note 1)
9, 30
TMDS_D1−
8 kV (Note 2)
TMDS 0.9 pF ESD Protection (Note 1)
10, 29
TMDS_D0+
8 kV (Note 2)
TMDS 0.9 pF ESD Protection (Note 1)
12, 27
TMDS_D0−
8 kV (Note 2)
TMDS 0.9 pF ESD Protection (Note 1)
13, 26
TMDS_CK+
8 kV (Note 2)
TMDS 0.9 pF ESD Protection (Note 1)
15, 24
TMDS_CK−
8 kV (Note 2)
TMDS 0.9 pF ESD Protection (Note 1)
16
CE_REMOTE_IN
2 kV (Note 3)
LV_SUPPLY Referenced Logic Level into ASIC
23
CE_REMOTE_OUT
8 kV(Note 2)
5V_SUPPLY Referenced Logic Level Out plus 3.5 pF ESD to Connector
17
DDC_CLK_IN
2 kV (Note 3)
LV_SUPPLY Referenced Logic Level into ASIC
22
DDC_CLK_OUT
8 kV (Note 2)
5V_SUPPLY Referenced Logic Level Out plus 3.5 pF ESD to Connector
18
DDC_DAT_IN
2 kV (Note 3)
LV_SUPPLY Referenced Logic Level into ASIC
21
DDC_DAT_OUT
8 kV (Note 2)
5V_SUPPLY Referenced Logic Level Out plus 3.5 pF ESD to Connector
19
HOTPLUG_DET_IN
2 kV (Note 3)
LV_SUPPLY Referenced Logic Level into ASIC
20
HOTPLUG_DET_OUT
8 kV (Note 2)
5V_SUPPLY Referenced Logic Level Out plus 3.5 pF ESD to Connector
2
LV_SUPPLY
2 kV (Note 3)
Bias for CE / DDC / HOTPLUG Level Shifters
1
5V_SUPPLY
2 kV (Note 3)
Current Source for 5V_OUT
38
5V_OUT
8 kV (Note 2)
55 mA Minimum Overcurrent Protected 5 V Output. This Output Must be
Bypassed with a 0.1 mF Ceramic Capacitor.
37
ESD_BYP
2 kV (Note 3)
This Pin may be Connected to a 0.1 mF Ceramic Capacitor, but it is not necessary.
3, 36
GND
N/A
Supply GND Reference
5, 34, 8,
31, 11, 28,
14, 25
TMDS_GND
N/A
TMDS ESD and Parasitic GND Return (Note 4)
1. These 2 pins need to be connected together in−line on the PCB.
2. Standard IEC 61000−4−2, CDISCHARGE = 150 pF, RDISCHARGE = 330 W, 5V_SUPPLY and LV_SUPPLY within recommended operating
conditions, GND = 0 V, 5V_OUT (pin 38), each bypassed with a 0.1 mF ceramic capacitor connected to GND.
3. Human Body Model per MIL−STD−883, Method 3015, CDISCHARGE = 100 pF, RDISCHARGE = 1.5 kW, 5V_SUPPLY and LV_SUPPLY within
recommended operating conditions, GND = 0 V and 5V_OUT (pin 38), and each bypassed with a 0.1 mF ceramic capacitor connected to
GND.
4. These pins should be routed directly to the associated GND pins on the HDMI connector with single point ground vias at the connector.
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3
CM2020−01TR
BACKDRIVE PROTECTION
In a more serious scenario, if any SOC devices are
incorporated in the design which have built−in level shifter
and DRC diodes for ESD protection, there is even a risk for
permanent damage. In this case, if there is a pullup resistor
(such as with DDC) on the other end of the cable, that
resistance will pull the SOC chips “output” up to a high
level. This will forward bias the upper ESD diode in the
DRC and charge the bulk capacitance in a similar fashion as
described in the first example. If this current flow is high
enough, even as little as a few milliamps, it could destroy
one of the SOC chip’s internal DRC diodes, as they are not
designed for passing DC.
To avoid either of these situations, the CM2020−01TR
was designed to block backdrive current, guaranteeing no
more than 5 mA on any I/O pin when the I/O pin voltage is
greater than the CM2020−01TR supply voltage.
Below, two scenarios are discussed to illustrate what can
happen when a powered device is connected to an
unpowered device via a HDMI interface, substantiating the
need for backdrive protection on this type of interface.
In the first example a DVD player is connected to a TV via
an HDMI interface. If the DVD player is switched off and
the TV is left on, there is a possibility of reverse current flow
back into the main power supply rail of the DVD player.
Typically, the DVD’s power supply has some form of bulk
supply capacitance associated with it. Because all CMOS
logic exhibits a very high impedance on the power rail node
when “off”, if there may be very little parasitic shunt
resistance, and even with as little as a few milliamps of
“backdrive” current flowing into the power rail, it is possible
over time to charge that bulk supply capacitance to some
intermediate level. If this level rises above the
power−on−reset (POR) voltage level of some of the
integrated circuits in the DVD player, these devices may not
reset properly when the DVD player is turned back on.
Figure 1. Backdrive Protection Diagram.
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
Units
VCC5V, VCCLV
6.0
V
DC Voltage at any Channel Input
6.0
V
−65 to +150
°C
Storage Temperature Range
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. STANDARD (RECOMMENDED) OPERATING CONDITIONS
Symbol
Parameter
5V_SUPPLY
Operating Supply Voltage
LV_SUPPLY
Bias Supply Voltage
−
Operating Temperature Range
Min
Typ
Max
Units
GND
5
5.5
V
1
3.3
5.5
V
–40
−
85
°C
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CM2020−01TR
SPECIFICATIONS (Cont’d)
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
ICC5V
Operating Supply Current
5V_SUPPLY = 5.0 V
110
130
mA
ICCLV
Bias Supply Current
LV_SUPPLY = 3.3 V
1
5
mA
VDROP
5V_OUT Overcurrent Output Drop
5V_SUPPLY = 5.0 V,
IOUT = 55 mA
65
100
mV
ISC
5V_OUT Short Circuit Current Limit
5V_SUPPLY = 5.0 V,
5V_OUT = GND
135
175
mA
IOFF
OFF State Leakage Current, Level Shifting
NFET
LV_SUPPLY = 0 V
0.1
5.0
mA
IBACKDRIVE
Current Conducted from Output Pins to
V_SUPPLY Rails when Powered Down
5V_SUPPLY < VCH_OUT
Signal Pins: TMDS_D[2:0]+/−,
TMDS_CK+/−, CE_REMOTE_OUT,
DDC_DAT_OUT, DDC_CLK_OUT,
HOTPLUG_DET_OUT, 5V_OUT
Only
0.1
5.0
mA
IBACKDRIVE,
CEC
Current through CE−REMOTE_OUT when
Powered Down
CE−REMOTE_IN = CE_SUPPLY <
CE_REMOTE_OUT
0.1
1.0
mA
VOLTAGE Drop Across Level Shifting NFET
when ON
LV_SUPPLY = 2.5 V, VS = GND,
IDS = 3 mA
75
95
140
mV
Diode Forward Voltage
Top Diode
Bottom Diode
IF = 8 mA, TA = 25°C
0.60
0.60
0.85
0.85
0.95
0.95
ESD Withstand Voltage
Contact Discharge per
IEC 61000−4−2 Standard
Pins 4, 7, 10, 13, 20, 21, 22, 23, 24,
27, 30, 33, 38
(Note 2)
Channel Clamp Voltage
Positive Transients
Negative Transients
TA = 25°C, IPP = 1 A, tP = 8/20 ms
(Note 3)
RDYN
Dynamic Resistance
Positive Transients
Negative Transients
TA = 25°C, IPP = 1 A, tP = 8/20 ms
(Note 3)
ILEAK
TMDS Channel Leakage Current
TA = 25°C
0.01
1
mA
TMDS Channel Input Capacitance
5V_SUPPLY = 5.0 V, Measured at
1 MHz, VBIAS = 2.5 V
0.9
1.2
pF
TMDS Channel Input Capacitance Matching
5V_SUPPLY = 5.0 V, Measured at
1 MHz, VBIAS = 2.5 V (Note 4)
0.05
CIN, DDC
Level Shifting Input Capacitance, Capacitance
to GND
5V_SUPPLY = 5 V, Measured at
100 kHz, VBIAS = 2.5 V
3.5
4
pF
CIN, CEC
Level Shifting Input Capacitance, Capacitance
to GND
5V_SUPPLY = 5 V, Measured at
100 kHz, VBIAS = 2.5 V
3.5
4
pF
CIN, HP
Level Shifting Input Capacitance, Capacitance
to GND
5V_SUPPLY = 5 V, Measured at
100 kHz, VBIAS = 2.5 V
3.5
4
pF
VON
VF
VESD
VCL
CIN, TMDS
DCIN, TMDS
90
V
kV
±8
V
11.0
−2.0
W
1.2
0.9
pF
1. Operating Characteristics are over Standard Operating Conditions unless otherwise specified.
2. Standard IEC 61000−4−2, CDISCHARGE = 150 pF, RDISCHARGE = 330 W, 5V_SUPPLY and LV_SUPPLY within recommended operating
conditions, GND = 0 V, 5V_OUT (pin 38), each bypassed with a 0.1 mF ceramic capacitor connected to GND.
3. These measurements performed with no external capacitor on ESD_BYP.
4. Intra−pair matching, each TMDS pair (i.e. D+, D−).
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CM2020−01TR
PERFORMANCE INFORMATION
Typical Filter Performance (TA = 25°C, DC Bias = 0 V, 50 W Environment)
Figure 2. Insertion Loss vs. Frequency (TMDS_D1− to GND)
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CM2020−01TR
APPLICATION INFORMATION
LAYOUT NOTES
NOTE 1) Differential TMDS Pairs should be
designed as normal 100 W HDMI microstrip.
Single Ended TMDS traces underneath CM2020
and between CM2020 and Connector should be
tuned to match chip/connector parasitics. (See
MediaGuardt Application Notes.)
NOTE 2) Level Shifter signals should be biased
with a weak pullup to the desired local
LV_SUPPLY. If the local ASIC includes sufficient
pullups to register a logic high when the CM2020
NFET is “off”, then external pullups are not needed.
NOTE 3) Place CM2020 as close to conector as possible,
and as with any controlled impedance line avoid ANY
silkscreening over TMDS lines.
NOTE 4) CBYP (Bypass Capacitor) is optional for the
CM2020−01TR.
NOTE 5) CEC pullup isolation. The 27k RCEC and a Schottky DCEC
provide the necessary isolation for the CEC pullup.
Figure 3. Typical Application for CM2020−01TR
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CM2020−01TR
APPLICATION INFORMATION (Cont’d)
Design Considerations
5V Overcurrent Output
Maximum Overcurrent Protection output drop at 55 mA on 5V_OUT is 100 mV. To meet HDMI output requirements of
4.8 − 5.3 V, an input of greater than 4.9 V should be used (i.e. 5.1 V ±4%). A 0.1 mF ceramic bypass capacitor on this output
is also recommended.
Hotplug Detect Input
To meet the requirements of HDMI CTS TID7−12, the following pullup/pulldown configuration is recommended for a 3.3 V
±10% internal VCC rail (See Figure 4 below). A 0.1 mF ceramic capacitor is recommended for additional edge debounce and
ESD bypass.
DUT On vs. DUT Off
Many HDMI CTS tests require a power off condition on the System Under Test. Many Dual Rail Clamp (DRC) ESD diode
configurations will be forward biased when their VDD rail is lower than the I/O pin bias, thereby exhibiting extremely high
apparent capacitance measurements, for example. The MediaGuardt backdrive isolation circuitry limits this current to
< 5 mA, and will help ensure compliance.
LV_SUPPLY
5V_SUPPLY
3.3 V
RPU
47K
D2+
D2−
D1+
D1−
D0+
D0−
CK+
CK−
CEC
DOC_CLK
DOC_DAT
HOTPLUG
HDMI ASIC
RPU
47K
RPU
47K
RPU
47K
OPTIONAL
CM2020
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
VOUT 38
5V
LV
BYPASS 37
GND 36
GND
D2+ 35
D2+
GND 34
GND
D2− 33
D2−
D1+ 32
D1+
GND 31
GND
D1− 30
D1−
D0+ 29
D0+
GND 28
GND
D0− 27
D0−
CK+ 26
CK+
GND 25
GND
CK− 24
CK−
CEC_I CEC−O 23
SCK_I SCK−O 22
SDA_I SDA−O 21
HPD_I HPD−O 20
RCEC
27K
CBYP
100 nF
1
2
3
4
5
6
7
8
9
10
11
RSCL
4.7K
RSDA
4.7K
RPD
15K
LV DOMAIN
“IN” TO ASIC
5V DOMAIN
“OUT” TO CABLE
Figure 4. Design Example
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TP1
HDMI
COUT
100 nF
12
13
14
15
16
17
18
19
D2+
GND
D2−
D1+
GND
D1−
D0+
GND
D0−
CK+
GND
CK−
CEC
N/C
SCL
SDA
DDC GND
+5V
HOTPLUG
CM2020−01TR
PACKAGE DIMENSIONS
TSSOP 38
CASE 948AG−01
ISSUE O
MediaGuard is a trademark of Nagra France.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
Sales Representative
CM2020−01TR/D
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