ESD5384 D

ESD5384
5-Line HDMI Control Line
ESD Protection
Functional Description
The ESD5384 chip is a low capacitance ESD protection for HDMI
control pins. It also integrates pull−up resistor for I2C bus and
pull−down resistor for hot plug detect and pull−up resistor for CEC
line.
The ESD protection circuitry prevents damage to the protected
device when subjected to ESD surges up to 15 kV.
The ESD5384 is available in 9 bump CSP package.
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MARKING
DIAGRAM
WLCSP9
CASE 567CX
Features
• Line Capacitance: 12 pF max
• IEC 61000−4−2 Level 4
53
M
±15 kV (air discharge)
±8 kV (contact discharge)
This is a Pb−Free Device
♦
•
53M
= Specific Device Code
= Date Code
♦
PINOUT
3
2
1
A
SCL
CEC
5V
B
SDA
GND
RPU2
C
HPD
GND
RPU
Applications
• HDMI Control Line Interfaces
♦
♦
♦
Smart Phones
Tablets
Consumer Electronics
(Bump Side)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
A1
C3
HPD
5V
B3
SDA
A3
SCL
A2
CEC
1.75KW
C1
1.75KW
100KW
B1
27KW
B2, C2
ESD5384
Figure 1. Electrical Schematic
© Semiconductor Components Industries, LLC, 2011
October, 2011 − Rev. 0
1
Publication Order Number:
EMD5384/D
ESD5384
ABSOLUTE MAXIMUM RATINGS
Symbol
VPP
Parameter
Value
External pins (A1, A2, A3, B3 and C3):
ESD IEC 61000−4−2, level 4 – air discharge
ESD IEC 61000−4−2, level 4 – contact discharge
Internal pins (B1, C1):
ESD IEC 61000−4−2, level 1 – air discharge
ESD IEC 61000−4−2, level 1 – contact discharge
Unit
kV
± 15
±8
±2
±2
Top
Operating Temperature Range
−30 to +85
°C
Tstg
Storage Temperature Range
−55 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
ELECTRICAL CHARACTERISTICS (Note 1)
Symbol
Test Condition
Min
VBR
Breakdown Voltage (Ir = 1mA)
IRM
Leakage Current @ Vrm (Vrm = 3 V per line), excluding HPD line
IRM
Leakage Current @ Vrm (Vrm = 3 V per line), HPD line
R1, R2
Typ
Max
20
V
50
200
nA
32
mA
6
Resistance
Unit
1575
1750
1925
W
R3
Pull−up Resistance
80
100
120
kW
R4
Pull−up Resistance
22
27
32
kW
Vline = 0 V, Vosc = 30 mV, F = 1 MHz, A2 with B1 not connected
14
17
pF
Vline = 0 V, Vosc = 30 mV, F = 1 MHz, A3, B3 with C1 not connected.
24
29
Vline = 0 V, Vosc = 30 mV, F = 1 MHz, A2, A3, B3 with C1 and B1 grounded
10
12
Cline
1. All parameters specified at TA = 25°C unless otherwise noted.
TYPICAL CHARACTERISTICS
Figure 2. Crosstalk Measurements
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ESD5384
TYPICAL CHARACTERISTICS
Figure 3. ESD Clamping Voltage Screenshot Positive
8 kV Contact per IEC61000−4−2, CEC line
Figure 4. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2, CEC line
Figure 5. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2, SCL line
Figure 6. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2, SCL line
Figure 7. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2, SDA line
Figure 8. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2, SDA line
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ESD5384
TYPICAL CHARACTERISTICS
Figure 9. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2, HPD line
Figure 10. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2, HPD line
Figure 11. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2, 5 V line
Figure 12. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2, 5 V line
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ESD5384
IEC61000−4−2 Waveform
IEC61000−4−2 Spec.
Ipeak
Level
Test
Voltage
(kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1
2
7.5
4
2
2
4
15
8
4
3
6
22.5
12
6
4
8
30
16
8
100%
90%
I @ 30 ns
I @ 60 ns
10%
tP = 0.7 ns to 1 ns
Figure 13. IEC61000−4−2 Spec
ESD Gun
Oscilloscope
TVS
50 W
Cable
50 W
Figure 14. Diagram of ESD Clamping Voltage Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
% OF PEAK PULSE CURRENT
100
PEAK VALUE IRSM @ 8 ms
tr
90
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
80
70
60
HALF VALUE IRSM/2 @ 20 ms
50
40
30
tP
20
10
0
0
20
40
t, TIME (ms)
60
Figure 15. 8 x 20 ms Pulse Waveform
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5
80
ESD5384
Figure 16. Positive TLP I−V Curve
Figure 17. Negative TLP I−V Curve
Transmission Line Pulse (TLP) Measurement
L
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 18. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 19 where an 8 kV IEC61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels. A typical TLP I−V
curve for the ESD7383 is shown in Figures 16 and 17.
50 W Coax
Cable
S Attenuator
÷
50 W Coax
Cable
10 MW
IM
VM
DUT
VC
Oscilloscope
Figure 18. Simplified Schematic of a Typical TLP
System
Figure 19. Comparison Between 8 kV IEC61000−4−2 and 8 A and 16 A TLP Waveforms
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6
ESD5384
TYPICAL APPLICATION SCHEMATIC
ESD7484
ESD7484
HDMI Type C
Connector
Data2 Shield 1
Data2 + 2
A3 A1 C3 C1 B2
A3 A1 C3 C1 B2
D3 D1 F3 F1 E2
D3 D1 F3 F1 E2
Data2 +
Data2 −
Data2 − 3
Data1 Shield 4
Data1 + 5
Data1 +
Data1 − 6
Data1 −
Data0 Shield 7
Data0 + 8
Data0 +
Data0 − 9
Data0 −
CLK Shield 10
CLK + 11
CLK +
CLK − 12
CLK −
DDC GROUND 13
CEC
CEC
14
SCL
15
SCL
SDA
16
SDA
+5 Power
Reserved 17
HPD
+5 Power 18
HPD
A1
19
C3
HPD
5V
B3
SDA
A3
SCL
A2
CEC
1.75KW
C1
5V
1.75KW
100KW
B1
VDD_CEC
27KW
B2, C2
ESD5384
Figure 20. Typical Application Schematic
ORDERING INFORMATION
Part Number
ESD5384
Chip Size (mm)
Package
Shipping†
1.14 x 1.14 x 0.605
WLCSP9
(Pb−Free)
5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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7
ESD5384
PACKAGE DIMENSIONS
WLCSP9, 1.14x1.14
CASE 567CX−01
ISSUE O
D
PIN A1
REFERENCE
2X
0.05 C
2X
0.05 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
A B
ÈÈ
ÈÈ
E
DIM
A
A1
A2
b
D
E
e
TOP VIEW
A2
0.05 C
RECOMMENDED
SOLDERING FOOTPRINT*
A
A1
0.05 C
NOTE 3
9X
A1
0.03 C
SEATING
PLANE
PACKAGE
OUTLINE
9X
e
b
0.05 C A B
C
SIDE VIEW
MILLIMETERS
MIN
MAX
0.57
0.63
0.17
0.24
0.41 REF
0.24
0.29
1.14 BSC
1.14 BSC
0.40 BSC
e
0.40
PITCH
C
B
0.25
0.40
PITCH
DIMENSIONS: MILLIMETERS
A
1
2
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
3
BOTTOM VIEW
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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Phone: 81−3−5773−3850
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
ESD5384/D
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