EMD4DXV6 D

EMD4DXV6
Dual Bias Resistor
Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
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The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the EMD4DXV6T1 series,
two complementary BRT devices are housed in the SOT−563 package
which is ideal for low power surface mount applications where board
space is at a premium.
(3)
(2)
R1
(1)
R2
Q1
Q2
R2
R1
(4)
(5)
(6)
Features
•
•
•
•
•
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These are Pb−Free Devices
6
1
SOT−563
CASE 463A
STYLE 1
MARKING DIAGRAM
MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1
and Q2, − minus sign for Q1 (PNP) omitted)
Symbol
Value
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
IC
100
mAdc
Symbol
Max
Unit
Total Device Dissipation
TA = 25°C (Note 1)
Derate above 25°C (Note 1)
PD
357
2.9
mW
mW/°C
Thermal Resistance,
Junction-to-Ambient (Note 1)
RqJA
350
°C/W
PD
500
4.0
mW
mW/°C
RqJA
250
°C/W
TJ, Tstg
−55 to +150
°C
Rating
Collector Current
1
U7 M G
G
U7 = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Total Device Dissipation
TA = 25°C (Note 1)
Derate above 25°C
Thermal Resistance,
Junction-to-Ambient (Note 1)
Junction and Storage Temperature
ORDERING INFORMATION
Package
Shipping†
EMD4DXV6T1G
SOT−563
(Pb−Free)
4000 / Tape &
Reel
EMD4DXV6T5G
SOT−563
(Pb−Free)
8000 / Tape &
Reel
NSVEMD4DXV6T5G
SOT−563
(Pb−Free)
8000 / Tape &
Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR−4 board with minimum mounting pad.
© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 2
1
Publication Order Number:
EMD4DXV6/D
EMD4DXV6
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Collector-Base Cutoff Current (VCB = 50 V, IE = 0)
ICBO
−
−
100
nAdc
Collector-Emitter Cutoff Current (VCB = 50 V, IB = 0)
ICEO
−
−
500
nAdc
Emitter-Base Cutoff Current (VEB = 6.0, IC = 5.0 mA)
IEBO
−
−
0.2
mAdc
Collector-Base Breakdown Voltage (IC = 10 mA, IE = 0)
V(BR)CBO
50
−
−
Vdc
Collector-Emitter Breakdown Voltage (IC = 2.0 mA, IB = 0)
V(BR)CEO
50
−
−
Vdc
hFE
80
140
−
VCE(SAT)
−
−
0.25
Vdc
Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL
−
−
0.2
Vdc
Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
Characteristic
Q1 TRANSISTOR: PNP
OFF CHARACTERISTICS
ON CHARACTERISTICS
DC Current Gain (VCE = 10 V, IC = 5.0 mA)
Collector−Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA)
VOH
4.9
−
−
Vdc
Input Resistor
R1
7.0
10
13
kW
Resistor Ratio
R1/R2
0.17
0.21
0.25
Collector-Base Cutoff Current (VCB = 50 V, IE = 0)
ICBO
−
−
100
nAdc
Collector-Emitter Cutoff Current (VCB = 50 V, IB = 0)
ICEO
−
−
500
nAdc
Emitter-Base Cutoff Current (VEB = 6.0, IC = 0 mA)
IEBO
−
−
0.1
mAdc
Collector-Base Breakdown Voltage (IC = 10 mA, IE = 0)
V(BR)CBO
50
−
−
Vdc
Collector-Emitter Breakdown Voltage (IC = 2.0 mA, IB = 0)
V(BR)CEO
50
−
−
Vdc
Q2 TRANSISTOR: NPN
OFF CHARACTERISTICS
ON CHARACTERISTICS
DC Current Gain (VCE = 10 V, IC = 5.0 mA)
hFE
80
140
−
VCE(SAT)
−
−
0.25
Vdc
Output Voltage (on) (VCC = 5.0 V, VB = 3.5 V, RL = 1.0 kW)
VOL
−
−
0.2
Vdc
Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
VOH
4.9
−
−
Vdc
Input Resistor
R1
32.9
47
61.1
kW
Resistor Ratio
R1/R2
0.8
1.0
1.2
Collector−Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA)
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
PD , POWER DISSIPATION (MILLIWATTS)
250
200
150
100
50
0
-50
RqJA = 833°C/W
0
50
100
TA, AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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2
150
EMD4DXV6
180
1
IC/IB = 10
hFE , DC CURRENT GAIN (NORMALIZED)
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS — EMD4DXV6 PNP TRANSISTOR
TA=-25°C
25°C
0.1
75°C
0.01
0.001
0
20
40
60
IC, COLLECTOR CURRENT (mA)
25°C
140
-25°C
120
100
80
60
40
20
0
80
TA=75°C
VCE = 10 V
160
2
1
4
6
Figure 2. VCE(sat) versus IC
100
TA=75°C
3.5
IC, COLLECTOR CURRENT (mA)
f = 1 MHz
lE = 0 V
TA = 25°C
4
3
2.5
2
1.5
1
0.5
0
2
4
6 8 10 15 20 25 30 35
VR, REVERSE BIAS VOLTAGE (VOLTS)
40
45
10
VO = 5 V
0
2
4
6
Vin, INPUT VOLTAGE (VOLTS)
VO = 0.2 V
25°C
TA=-25°C
75°C
1
0
10
8
Figure 5. Output Current versus Input Voltage
10
0.1
25°C
-25°C
1
50
Figure 4. Output Capacitance
V in , INPUT VOLTAGE (VOLTS)
Cob , CAPACITANCE (pF)
80 90 100
Figure 3. DC Current Gain
4.5
0
8 10 15 20 40 50 60 70
IC, COLLECTOR CURRENT (mA)
20
30
IC, COLLECTOR CURRENT (mA)
40
Figure 6. Input Voltage versus Output Current
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3
50
10
EMD4DXV6
10
IC/IB = 10
TA = −25°C
75°C
25°C
1
0.1
0.01
0
20
40
60
80
hFE, DC CURRENT GAIN (NORMALIZED)
VCE(sat), MAXIMUM COLLECTOR VOLTAGE
(VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS — EMD4DXV6 NPN TRANSISTOR
TA = 75°C
25°C
−25°C
100
10
1
10
100
IC, COLLECTOR CURRENT (mA)
Figure 7. VCE(sat) vs. IC
Figure 8. DC Current Gain
100
0.8
IC, COLLECTOR CURRENT (mA)
f = 1 MHz
lE = 0 A
TA = 25°C
0.6
0.4
0.2
10
20
30
25°C
10
TA = −25°C
1
0.1
0.01
VO = 5 V
0.001
50
40
75°C
0
2
VR, REVERSE BIAS VOLTAGE (VOLTS)
Figure 9. Output Capacitance
4
6
8
Vin, INPUT VOLTAGE (VOLTS)
Figure 10. Output Current vs. Input Voltage
100
VO = 0.2 V
Vin, INPUT VOLTAGE (VOLTS)
Cob, CAPACITANCE (pF)
VCE = 10 V
IC, COLLECTOR CURRENT (mA)
1
0
0
1000
TA = −25°C
25°C
75°C
10
1
0.1
0
10
20
30
40
IC, COLLECTOR CURRENT (mA)
Figure 11. Input Voltage vs. Output Current
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4
50
10
EMD4DXV6
PACKAGE DIMENSIONS
SOT−563, 6 LEAD
CASE 463A
ISSUE F
D
−X−
5
6
1
2
L
4
E
−Y−
3
b
e
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
A
HE
DIM
A
b
C
D
E
e
L
HE
C
5 PL
6
0.08 (0.003)
M
X Y
MILLIMETERS
MIN
NOM MAX
0.50
0.55
0.60
0.17
0.22
0.27
0.08
0.12
0.18
1.50
1.60
1.70
1.10
1.20
1.30
0.5 BSC
0.10
0.20
0.30
1.50
1.60
1.70
INCHES
NOM MAX
0.021 0.023
0.009 0.011
0.005 0.007
0.062 0.066
0.047 0.051
0.02 BSC
0.004 0.008 0.012
0.059 0.062 0.066
MIN
0.020
0.007
0.003
0.059
0.043
STYLE 1:
PIN 1. EMITTER 1
2. BASE 1
3. COLLECTOR 2
4. EMITTER 2
5. BASE 2
6. COLLECTOR 1
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.35
0.0531
1.0
0.0394
0.5
0.5
0.0197 0.0197
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
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or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
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EMD4DXV6/D
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