MC100ELT23 5 V Dual Differential PECL to TTL Translator Description The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The PECL inputs are differential; therefore, the MC100ELT23 can accept any standard differential PECL input referenced from a VCC of 5.0 V. www.onsemi.com MARKING DIAGRAMS* 8 8 1 Features • • • • • • • 3.5 ns Typical Propagation Delay 24 mA TTL Outputs Flow Through Pinouts The 100 Series Contains Temperature Compensation Operating Range VCC = 4.75 V to 5.25 V with GND = 0 V Internal Input 50 KW Pulldown Resistors These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant SOIC−8 D SUFFIX CASE 751 KLT23 ALYW G 1 8 8 1 TSSOP−8 DT SUFFIX CASE 948R 1 A L Y W G KT23 ALYWG G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. © Semiconductor Components Industries, LLC, 2015 August, 2015 − Rev. 17 1 Publication Order Number: MC100ELT23/D MC100ELT23 Table 1. PIN DESCRIPTION D0 D0 1 8 2 7 PECL VCC Pin Q0 TTL D1 3 6 Q1 D1 4 5 GND Function Qn TTL Outputs Dn, Dn PECL Differential Inputs VCC Positive Supply GND Ground Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 50 kW Internal Input Pullup Resistor ESD Protection N/A Human Body Model Machine Model > 2 kV > 400 V Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb−Free Pkg SOIC−8 TSSOP−8 Flammability Rating Oxygen Index: 28 to 34 Level 1 Level 3 UL 94 V−0 @ 0.125 in Transistor Count 91 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit 7 V VCC Power Supply GND = 0 V VI Input Voltage GND = 0 V TA Operating Temperature Range Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm SOIC−8 SOIC−8 190 130 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board SOIC−8 41 to 44 °C/W qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm TSSOP−8 TSSOP−8 185 140 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board TSSOP−8 41 to 44 ± 5% °C/W Tsol Wave Solder <2 to 3 sec @ 260°C 265 °C Pb−Free VI VCC 0 to 6 V −40 to +85 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2 MC100ELT23 Table 4. PECL INPUT DC CHARACTERISTICS VCC = 5.0 V; GND = 0.0 V (Note 2) −40°C Max Min Max Min Max Unit Input HIGH Voltage (Single−Ended) (Note 3) 3835 4120 3835 4120 3835 4120 mV VIL Input LOW Voltage (Single−Ended) 3190 3525 3190 3525 3190 3525 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 4) 2.2 5.0 2.2 5.0 2.2 5.0 V IIH Input HIGH Current 175 mA IIL Input LOW Current Characteristic Typ Typ 85°C VIH Symbol Min 25°C 255 0.5 Typ 175 0.5 mA 0.5 NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 2. Input parameters vary 1:1 with VCC. VCC can vary ± 0.25 V. 3. TTL output RL = 500 W to GND. 4. VIHCMR min varies 1:1 with GND, VIHCMR max varies 1:1 with VCC Table 5. TTL OUTPUT DC CHARACTERISTICS VCC = 4.75 V to 5.25 V; TA = −40°C to 85°C Symbol Characteristic Condition VOH Output HIGH Voltage IOH = −3.0 mA VOL Output LOW Voltage IOL = 24 mA ICCH Power Supply Current ICCL Power Supply Current IOS Output Short Circuit Current Min Typ 2.4 Max Unit (Note 5) V 0.5 V 33 mA 36 mA −60 mA 23 26 −150 NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 5. Max level is VCC − 0.7 V by design. Table 6. AC CHARACTERISTICS VCC= 5.0 V; GND= 0.0 V (Note 6 and Note 7) −40°C Symbol Characteristic Min Typ 25°C Max Min Typ 85°C Max Min Typ Max Unit fmax Maximum Toggle Frequency 100 MHz tJITTER Random Clock Jitter (RMS) 35 ps tPLH Propagation Delay @ 1.5 V 2.0 5.5 2.0 5.5 2.0 5.5 ns tPHL Propagation Delay @ 1.5 V 2.0 5.5 2.0 5.5 2.0 5.5 ns VPP Input Swing (Note 8) 200 1000 200 1000 200 1000 mV tr/tf Output Rise Time (10−90%) Output Fall Time (10−90%) 1.6 1.1 ns ns NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 6. VCC can vary ± 0.25 V. 7. TTL output RL = 500 W to GND, and CL = 20 pF to GND. Refer to Figure 2. 8. VPP(min) is the minimum input swing for which AC parameters are guaranteed. The device has a DC gain of ≈ 40. www.onsemi.com 3 MC100ELT23 APPLICATION TTL RECEIVER CHARACTERISTIC TEST *CL includes fixture capacitance CL * RL AC TEST LOAD GND Figure 2. TTL Output Loading Used for Device Evaluation ORDERING INFORMATION Package Shipping† MC100ELT23DG SOIC−8 (Pb−Free) 98 Units / Rail MC100ELT23DR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel MC100ELT23DTG TSSOP−8 (Pb−Free) 100 Units / Rail MC100ELT23DTR2G TSSOP−8 (Pb−Free) 2500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices www.onsemi.com 4 MC100ELT23 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. −X− A 8 5 S B 0.25 (0.010) M Y M 1 4 K −Y− G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 5 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 MC100ELT23 PACKAGE DIMENSIONS TSSOP−8 DT SUFFIX CASE 948R−02 ISSUE A 8x 0.15 (0.006) T U K REF 0.10 (0.004) S 2X L/2 8 1 PIN 1 IDENT S T U V S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. S 5 0.25 (0.010) B −U− L 0.15 (0.006) T U M M 4 A −V− F DETAIL E C 0.10 (0.004) −T− SEATING PLANE D −W− G DETAIL E DIM A B C D F G K L M MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_ ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. 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