NLSV4T3144 D

NLSV4T3144
4-Bit Dual-Supply
Non-Inverting Level
Translator
The NLSV4T3144 is a 4−bit configurable dual−supply bus buffer
level translator. The input (IN_xn) and output (OUT_xn) ports are
designed to track two different power supply rails, VCCA and VCCB
respectively. Both supply rails are configurable from 1.6 V to 3.6 V
allowing low−voltage translation from the input to the output port.
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1
Features
•
•
•
•
•
•
•
Wide VCCA and VCCB Operating Range: 1.6 V to 3.6 V
High−Speed w/ Balanced Propagation Delay
Inputs and Outputs have OVT Protection to 5.5 V
Outputs at 3−State until Active VCCA and VCCB are Reached
Power−Off Protection
Ultra−Small Packaging: 1.7 mm x 2.0 mm UQFN−12
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• Mobile Phones, PDAs, Other Portable Devices
• SPIt Bus Voltage Translation
UQFN12
MU SUFFIX
CASE 523AE
MARKING DIAGRAM
WG MG
G
WG = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
Important Information
PIN ASSIGNMENTS
• ESD Protection for All Pins:
OE
HBM (Human Body Model) > 3000 V
VCCA
VCCB
IN_A1
OUT_B1
IN_A2
OUT_B2
IN_A3
OUT_B3
OUT_A4
Figure 1. Logic Diagram
June, 2015 − Rev. 1
2
10
OUT_B1
IN_A2
3
9
OUT_B2
IN_A3
4
8
OUT_B3
OUT_A4
5
7
IN_B4
IN_A1
6
ORDERING INFORMATION
GND
© Semiconductor Components Industries, LLC, 2015
VCCB
12
GND
(Top View)
IN_B4
OE
11
VCCA
1
Device
Package
Shipping†
NLSV4T3144MUTAG
UQFN−12
(Pb−Free)
3000/Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
1
Publication Order Number:
NLSV4T3144/D
NLSV4T3144
1.8 V
3.3 V
mC
VCCA
CE
SCK
SDO
SDI
AN0
NLSV4T3144
Temperature
Sensor
VCCB
IN_A1
OUT_B1
IN_A2
OUT_B2
IN_A3
OUT_B3
CE
SCK
SDI
IN_B4
OUT_A4
OE
SDO
GND
Figure 2. Typical Application: SPI Bus Voltage Translator
PIN NAMES
TRUTH TABLE
Pins
Description
Inputs
VCCA
‘A’ DC Power Supply
VCCB
‘B’ DC Power Supply
GND
Ground
IN_A1,
IN_A2,
IN_A3
Input (Referenced to VCCA)
IN_B4
Input (Referenced to VCCB)
OUT_B1,
OUT_B2,
OUT_B3
Output (Referenced to VCCB)
OUT_A4
Output (Referenced to VCCA)
OE
Output Enable (Referenced to VCCA)
OE
IN_A1, IN_A2,
IN_A3, IN_B4
OUT_B1, OUT_B2,
OUT_B3, OUT_A4
H
X
3−State
L
L
L
H
H
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Outputs
NLSV4T3144
MAXIMUM RATINGS
Symbol
VCCA, VCCB
VI
VC
VO
Parameter
Value
DC Supply Voltage, VCCA ≤ VCCB
DC Input Voltage
Control Input
DC Output Voltage
Condition
Unit
−0.5 to +5.5
V
IN_xn
−0.5 to +5.5
V
OE
−0.5 to +5.5
V
(Power Down) OUT_xn
−0.5 to +5.5
(Active Mode) OUT_xn
−0.5 to +5.5
(Tri−State Mode) OUT_xn
−0.5 to +5.5
VCCA = VCCB = 0
V
IIK
DC Input Diode Current
−20
VI < GND
mA
IOK
DC Output Diode Current
−50
VO < GND
mA
IO
DC Output Source/Sink Current
±50
mA
ICCA, ICCB
DC Supply Current Per Supply Pin
±100
mA
IGND
DC Ground Current per Ground Pin
±100
mA
TSTG
Storage Temperature
−65 to +150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCCA, VCCB
Parameter
Min
Max
Unit
1.6
3.6
V
GND
3.6
V
OE
GND
3.6
V
(Power Down) OUT_xn
GND
3.6
V
−40
+85
°C
0
10
ns
Positive DC Supply Voltage, VCCA ≤ VCCB
VI
Bus Input Voltage
VC
Control Input
VIO
DC Output Voltage
(Active Mode) OUT_xn
(Tri−State Mode) OUT_xn
TA
Dt / DV
Operating Temperature Range
Input Transition Rise or Rate
VI, from 30% to 70% of VCCA and VCCB;
VCCA = VCCB = 3.3 V ±0.3 V
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NLSV4T3144
DC ELECTRICAL CHARACTERISTICS
−405C to + 855C
Symbol
Parameter
VIH
(IN_A1,
IN_A2,
IN_A3, OE)
Input HIGH Voltage
VIH
(IN_B4)
Input HIGH Voltage
VIL
(IN_B4)
Input LOW Voltage
Max
Unit
2.7 – 3.6
≥ VCCA
2.0
−
V
1.6
−
0.65 * VCCA
−
2.0
−
2.3 – 2.7
1.6
−
1.6 −2.3
0.65 * VCCB
−
≥ VCCA
−
0.8
Output HIGH Voltage
2.7 – 3.6
IOH = −100 mA; VI = VIH
IOH = −6 mA; VI = VIH
Output HIGH Voltage
0.7
−
0.35 * VCCA
2.7 – 3.6
−
0.8
2.3 – 2.7
−
0.7
1.6 −2.3
−
0.35 * VCCB
≤ VCCB
1.6 – 3.6
VCCB – 0.2
−
1.6
1.6
1.25
−
2.3
2.3
2.0
−
2.3
2.3
1.8
−
2.7
2.7
2.2
−
2.3
2.3
1.7
−
3.0
3.0
2.4
−
3.0
3.0
2.2
−
IOH = −100 mA; VI = VIH
1.6 – 3.6
≥ VCCA
VCCA – 0.2
−
1.6
1.6
1.25
−
2.3
2.3
2.0
−
2.3
2.3
1.8
−
2.7
2.7
2.2
−
2.3
2.3
1.7
−
3.0
3.0
2.4
−
IOH = −12 mA; VI = VIH
IOH = −18 mA; VI = VIH
IOH = −24 mA; VI = VIH
3.0
3.0
2.2
−
IOL = 100 mA; VI = VIH
≤ VCCB
1.6 – 3.6
−
0.2
IOL = 6 mA; VI = VIH
1.6
1.6
−
0.3
IOL = 12 mA; VI = VIH
2.3
2.3
−
0.4
2.7
2.7
−
0.4
2.3
2.3
−
0.6
3.0
3.0
−
0.5
IOL = 18 mA; VI = VIH
Output LOW Voltage
−
1.6 −2.3
IOH = −24 mA; VI = VIH
IOH = −6 mA; VI = VIH
Output LOW Voltage
2.7 – 3.6
2.3 – 2.7
≤ VCCB
IOH = −18 mA; VI = VIH
VOL
(OUT_A4)
Min
≤ VCCB
IOH = −12 mA; VI = VIH
VOL
(OUT_B1,
OUT_B2,
OUT_B3)
VCCB (V)
1.6 −2.3
Input LOW Voltage
VOH
(OUT_A4)
VCCA (V)
2.3 – 2.7
VIL
(IN_A1,
IN_A2,
IN_A3, OE)
VOH
(OUT_B1,
OUT_B2,
OUT_B3)
Test Conditions
IOL = 24 mA; VI = VIH
3.0
3.0
−
0.6
IOL = 100 mA; VI = VIH
1.6 – 3.6
≥ VCCA
−
0.2
IOL = 6 mA; VI = VIH
1.6
1.6
−
0.3
IOL = 12 mA; VI = VIH
2.3
2.3
−
0.4
2.7
2.7
−
0.4
2.3
2.3
−
0.6
3.0
3.0
−
0.5
3.0
3.0
−
0.6
IOL = 18 mA; VI = VIH
IOL = 24 mA; VI = VIH
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V
V
V
V
V
V
V
NLSV4T3144
DC ELECTRICAL CHARACTERISTICS
−405C to + 855C
Symbol
Parameter
Test Conditions
VCCA (V)
VCCB (V)
Min
Max
Unit
IIN
Input Leakage Current
VIN_A1 = VIN_A2 = VIN_A3 =
VCCA or GND;
VIN_B4 = VCCB or GND
≤ VCCB
1.6 – 3.6
−1.0
+1.0
mA
IOZ
I/O Tri*State Output
Leakage Current
TA = 25_C, OE = VCCA
≤ VCCB
1.6 – 3.6
−
1.0
mA
ICCA
Quiescent Supply Current VIN_A1 = VIN_A2 = VIN_A3 =
VCCA or GND;
VIN_B4 = VCCB or GND
OE = GND, IO = 0
≤ VCCB
1.6 – 3.6
−
3.0
mA
ICCB
Quiescent Supply Current VIN_A1 = VIN_A2 = VIN_A3 =
VCCA or GND;
VIN_B4 = VCCB or GND
OE = GND, IO = 0
≤ VCCB
1.6 – 3.6
−
3.0
mA
ICCA + ICCB
Quiescent Supply Current VIN_A1 = VIN_A2 = VIN_A3 =
VCCA or GND;
VIN_B4 = VCCB or GND
OE = GND, IO = 0
≤ VCCB
1.6 – 3.6
−
6.0
mA
NOTE:
Connect ground before applying supply voltage VCCA or VCCB. This device is designed with the feature that the power−up
sequence of VCCA and VCCB will not damage the IC.
AC ELECTRICAL CHARACTERISTICS
−405C to +855C
VCCB (V)
3.6
Symbol
tPLH, tPHL
Parameter
VCCA (V)
Propagation
Delay,
tPHZ, tPLZ
NOTE:
Min
Max
2.8
3.1
3.3
1.6
4.3
4.5
Output Enable,
3.6
8.7
OE to Output
2.8
10.3
10.7
1.6
17.2
18
3.6
7.8
2.8
8.2
8.4
1.6
9.5
9.8
3.6
0.25
2.8
0.25
0.25
1.6
0.25
0.25
Output
Disable,
Output to Output Skew
Min
Max
Unit
ns
3
OE to Output
tOSHL,
tOSLH
Max
1.6
3.6
Input to Output
tPZH, tPZL
Min
2.8
6.1
ns
20
ns
10.5
ns
0.25
Propagation delays defined per Figure 3.
CAPACITANCE
Symbol
Parameter
CI
Control Pin (OE) Input Capacitance
CIN
Test Conditions
Typ (Note 1)
Unit
VCCA = VCCB = 3.3 V, VI = 0 V or VCCA/B
3.5
pF
Input Pin Capacitance
VCCA = VCCB = 3.3 V, VI = 0 V or VCCA/B
5.0
pF
COUT
Output Pin Capacitance
VCCA = VCCB = 3.3 V, VI = 0 V or VCCA/B
5.0
pF
CPD
Power Dissipation Capacitance
VCCA = VCC2 = 3.3 V, VI = 0 V or 3.3 V, f = 10 MHz
10
pF
1. Typical values are at TA = +25°C.
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NLSV4T3144
VCC
RL
Pulse
Generator
DUT
CL
RL
Figure 3. AC (Propagation Delay) Test Circuit
Test
Switch
tPLH, tPHL
OPEN
tPLZ, tPZL
VCCO x 2 at VCCO = 3.0 V − 3.6 V, 2.3 V − 2.7 V,
1.65 V − 1.95 V, 1.4 V − 1.6 V
tPHZ, tPZH
GND
CL = 15 pF or equivalent (includes probe and jig capacitance)
RL = 2 kW or equivalent
ZOUT of pulse generator = 50 W
VCCO is the supply voltage referenced to by the output being tested
VIH
Input
Vm
Vm
0V
tPHL
tPLH
Output
Vm
VOH
Vm
VOL
Waveform 1 − Propagation Delays
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
VIH
OEn
Vm
Vm
0V
tPZH
Output
tPHZ
VOH
VY
Vm
≈0V
tPZL
tPLZ
≈ VCC
Vm
Output
VX
VOL
Waveform 2 − Output Enable and Disable Times
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Figure 4. AC (Propagation Delay) Test Circuit Waveforms
Symbol
Input Pin
Output Pin
Vm
VCCX/2
VX
VOL x 0.1
VY
VOH x 0.9
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VCCO x 2
OPEN
GND
NLSV4T3144
PACKAGE DIMENSIONS
UQFN12 1.7x2.0, 0.4P
CASE 523AE
ISSUE A
D
ÉÉ
ÉÉ
ÉÉ
PIN 1 REFERENCE
2X
0.10 C
2X
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND 0.30 MM
FROM TERMINAL TIP.
4. MOLD FLASH ALLOWED ON TERMINALS
ALONG EDGE OF PACKAGE. FLASH 0.03
MAX ON BOTTOM SURFACE OF
TERMINALS.
5. DETAIL A SHOWS OPTIONAL
CONSTRUCTION FOR TERMINALS.
A B
L1
DETAIL A
E
NOTE 5
TOP VIEW
DIM
A
A1
A3
b
D
E
e
K
L
L1
L2
DETAIL B
A
0.05 C
DETAIL B
OPTIONAL
CONSTRUCTION
12X
0.05 C
A1
A3
8X
C
SIDE VIEW
SEATING
PLANE
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.15
0.25
1.70 BSC
2.00 BSC
0.40 BSC
0.20
---0.45
0.55
0.00
0.03
0.15 REF
K
5
MOUNTING FOOTPRINT
SOLDERMASK DEFINED
7
DETAIL A
e
2.00
1
12X
11
L
12X
L2
BOTTOM VIEW
1
b
0.10
M
C A B
0.05
M
C
0.32
NOTE 3
0.40
PITCH
2.30
11X
0.22
12X
0.69
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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NLSV4T3144/D