2N6071 D

2N6071A/B Series
Preferred Device
Sensitive Gate Triacs
Silicon Bidirectional Thyristors
Designed primarily for full‐wave AC control applications, such as
light dimmers, motor controls, heating controls and power supplies; or
wherever full‐wave silicon gate controlled solid‐state devices are
needed. Triac type thyristors switch from a blocking to a conducting
state for either polarity of applied anode voltage with positive or
negative gate triggering.
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TRIACS
4.0 A RMS, 200 - 600 V
Features
•Sensitive Gate Triggering Uniquely Compatible for Direct Coupling
to TTL, HTL, CMOS and Operational Amplifier Integrated Circuit
Logic Functions
•Gate Triggering: 4 Mode - 2N6071A, B; 2N6073A, B; 2N6075A, B
•Blocking Voltages to 600 V
•All Diffused and Glass Passivated Junctions for Greater Parameter
Uniformity and Stability
•Small, Rugged, Thermopad Construction for Low Thermal
Resistance, High Heat Dissipation and Durability
•Device Marking: Device Type, e.g., 2N6071A, Date Code
MT2
MT1
G
REAR VIEW
SHOW TAB
3
TO-225
CASE 077
STYLE 5
2 1
MARKING DIAGRAM
1. Cathode
2. Anode
3. Gate
x
y
Y
WW
G
YWW
2N
607xyG
= 1, 3, 5
= A, B
= Year
= Work Week
= Pb-Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
*For additional information on our Pb-Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2008
March, 2008 - Rev. 8
1
Publication Order Number:
2N6071/D
2N6071A/B Series
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Rating
Value
Unit
*Peak Repetitive Off‐State Voltage (Note 1)
(TJ = *40 to 110°C, Sine Wave, 50 to 60 Hz, Gate Open)
2N6071A,B
2N6073A,B
2N6075A,B
VDRM,
VRRM
*On‐State RMS Current (TC = 85°C) Full Cycle Sine Wave 50 to 60 Hz
IT(RMS)
4.0
A
ITSM
30
A
I2t
3.7
A2s
PGM
10
W
PG(AV)
0.5
W
*Peak Non-repetitive Surge Current (One Full cycle, 60 Hz, TJ = +110°C)
Circuit Fusing Considerations (t = 8.3 ms)
*Peak Gate Power (Pulse Width ≤ 1.0 ms, TC = 85°C)
*Average Gate Power (t = 8.3 ms, TC = 85°C)
*Peak Gate Voltage (Pulse Width ≤ 1.0 ms, TC = 85°C)
V
200
400
600
VGM
5.0
V
*Operating Junction Temperature Range
TJ
-40 to +110
°C
*Storage Temperature Range
Tstg
-40 to +150
°C
-
8.0
in. lb.
Mounting Torque (6‐32 Screw) (Note 2)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such
that the voltage ratings of the devices are exceeded.
2. Torque rating applies with use of a compression washer. Mounting torque in excess of 6 in. lb. does not appreciably lower case‐to‐sink thermal
resistance. Main terminal 2 and heatsink contact pad are common.
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
*Thermal Resistance, Junction-to-Case
RqJC
3.5
°C/W
Thermal Resistance, Junction-to-Ambient
RqJA
75
°C/W
TL
260
°C
Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds
*Indicates JEDEC Registered Data.
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2
2N6071A/B Series
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted; Electricals apply in both directions)
Symbol
Characteristic
Min
Typ
Max
Unit
-
-
10
2
mA
mA
-
-
2
V
-
1.4
2.5
0.2
-
-
OFF CHARACTERISTICS
*Peak Repetitive Blocking Current
(VD = VDRM = VRRM; Gate Open)
IDRM,
IRRM
TJ = 25°C
TJ = 110°C
ON CHARACTERISTICS
*Peak On‐State Voltage (Note 3) (ITM = "6.0 A Peak)
VTM
*Gate Trigger Voltage (Continuous DC), All Quadrants
(Main Terminal Voltage = 12 Vdc, RL = 100 W, TJ = -40°C)
VGT
Gate Non-Trigger Voltage, All Quadrants
(Main Terminal Voltage = 12 Vdc, RL = 100 W, TJ = 110°C)
VGD
*Holding Current
(Main Terminal Voltage = 12 Vdc, Gate Open, Initiating Current = "1 Adc)
TJ = -40°C
TJ = 25°C
IH
Turn‐On Time (ITM = 14 Adc, IGT = 100 mAdc)
tgt
V
V
mA
-
-
30
15
-
1.5
-
ms
QUADRANT
(Maximum Value)
Gate Trigger Current (Continuous DC)
(Main Terminal Voltage = 12 Vdc, RL = 100 W)
Type
IGT @ TJ
I
mA
II
mA
III
mA
IV
mA
2N6071A
2N6073A
2N6075A
+25°C
5
5
5
10
-40°C
20
20
20
30
2N6071B
2N6073B
2N6075B
+25°C
3
3
3
5
-40°C
15
15
15
20
dv/dt(c)
-
5
-
V/ms
DYNAMIC CHARACTERISTICS
Critical Rate of Rise of Commutation Voltage
@ VDRM, TJ = 85°C, Gate Open, ITM = 5.7 A, Exponential Waveform,
Commutating di/dt = 2.0 A/ms
3. Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.
*Indicates JEDEC Registered Data.
SAMPLE APPLICATION:
TTL‐SENSITIVE GATE 4 AMPERE TRIAC
TRIGGERS IN MODES II AND III
0V
-VEE
14
MC7400
4
7
VEE = 5.0 V
+
510
W
2N6071A
Trigger devices are recommended for gating on Triacs. They provide:
1. Consistent predictable turn‐on points.
2. Simplified circuitry.
3. Fast turn‐on time for cooler, more efficient and reliable operation.
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3
LOAD
115 VAC
60 Hz
2N6071A/B Series
Voltage Current Characteristic of Triacs
(Bidirectional Device)
Symbol
Parameter
VDRM
Peak Repetitive Forward Off State Voltage
IDRM
Peak Forward Blocking Current
VRRM
Peak Repetitive Reverse Off State Voltage
IRRM
Peak Reverse Blocking Current
VTM
Maximum On State Voltage
IH
Holding Current
+ Current
Quadrant 1
MainTerminal 2 +
VTM
on state
IH
IRRM at VRRM
off state
IH
Quadrant 3
MainTerminal 2 -
+ Voltage
IDRM at VDRM
VTM
Quadrant Definitions for a Triac
MT2 POSITIVE
(Positive Half Cycle)
+
(+) MT2
Quadrant II
(+) MT2
Quadrant I
(+) IGT
GATE
(-) IGT
GATE
MT1
MT1
REF
REF
IGT -
+ IGT
(-) MT2
Quadrant III
(-) MT2
Quadrant IV
(+) IGT
GATE
(-) IGT
GATE
MT1
MT1
REF
REF
MT2 NEGATIVE
(Negative Half Cycle)
All polarities are referenced to MT1.
With in-phase signals (using standard AC lines) quadrants I and III are used.
SENSITIVE GATE LOGIC REFERENCE
IC Logic Functions
Firing Quadrant
I
TTL
HTL
CMOS (NAND)
III
2N6071A Series
2N6071A Series
2N6071A Series
2N6071A Series
2N6071B Series
2N6071B Series
2N6071A Series
2N6071A Series
2N6071B Series
IV
2N6071B Series
CMOS (Buffer)
Operational Amplifier
II
2N6071A Series
2N6071A Series
Zero Voltage Switch
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4
2N6071A/B Series
110
110
α = 30°
TC , CASE TEMPERATURE (° C)
TC , CASE TEMPERATURE (° C)
60°
100
α = 30°
60°
90°
90
120°
180°
dc
a
80
α
70
120°
90
180°
a
80
70
1.0
2.0
3.0
IT(AV), AVERAGE ON‐STATE CURRENT (AMP)
4.0
α = CONDUCTION ANGLE
0
1.0
2.0
3.0
IT(RMS), RMS ON‐STATE CURRENT (AMP)
Figure 1. Average Current Derating
8.0
a
a
180°
a
6.0
P(AV) , AVERAGE POWER (WATTS)
P(AV) , AVERAGE POWER (WATTS)
4.0
Figure 2. RMS Current Derating
8.0
dc
120°
α = CONDUCTION ANGLE
90°
60°
4.0
α = 30°
2.0
0
dc
a
6.0
α = 180°
α = CONDUCTION ANGLE
120°
4.0
30°
2.0
60°
90°
0
0
1.0
2.0
3.0
IT(AV), AVERAGE ON‐STATE CURRENT (AMP)
4.0
1.0
2.0
3.0
IT(RMS), RMS ON‐STATE CURRENT (AMP)
0
Figure 3. Power Dissipation
3.0
OFF‐STATE VOLTAGE = 12 Vdc
ALL MODES
2.0
1.0
0.7
0.5
0.3
-60
-40
-20
0
20
40
60
80
100
TJ, JUNCTION TEMPERATURE (°C)
4.0
Figure 4. Power Dissipation
I GT , GATE TRIGGER CURRENT (NORMALIZED)
V GT , GATE TRIGGER VOLTAGE (NORMALIZED)
dc
a
α = CONDUCTION ANGLE
0
90°
100
120
140
3.0
OFF‐STATE VOLTAGE = 12 Vdc
ALL MODES
2.0
1.0
0.7
0.5
0.3
-60
Figure 5. Typical Gate-Trigger Voltage
-40
-20
0
20
40
60
80
100
TJ, JUNCTION TEMPERATURE (°C)
120
Figure 6. Typical Gate-Trigger Current
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5
140
2N6071A/B Series
40
IH, HOLDING CURRENT (NORMALIZED)
3.0
30
20
10
ITM , ON‐STATE CURRENT (AMP)
7.0
5.0
2.0
1.0
0.7
0.5
0.3
-60
TJ = 110°C
3.0
GATE OPEN
APPLIES TO EITHER DIRECTION
-40
-20
0
20
40
60
80
100
120
140
TJ, JUNCTION TEMPERATURE (°C)
2.0
Figure 8. Typical Holding Current
TJ = 25°C
1.0
34
32
PEAK SINE WAVE CURRENT (AMP)
0.7
0.5
0.3
0.2
30
28
26
24
TJ = -40 to +110°C
f = 60 Hz
22
20
18
16
0.1
0
1.0
2.0
3.0
4.0
14
1.0
5.0
2.0
4.0
5.0
7.0
10
NUMBER OF FULL CYCLES
VTM, ON‐STATE VOLTAGE (VOLTS)
Figure 7. Maximum On-State Characteristics
Z θJC(t), TRANSIENT THERMAL IMPEDANCE (°C/W)
3.0
Figure 9. Maximum Allowable Surge Current
10
5.0
MAXIMUM
3.0
2.0
TYPICAL
1.0
0.5
0.3
0.2
0.1
0.1
0.2
0.5
1.0
2.0
5.0
10
20
50
100
200
t, TIME (ms)
Figure 10. Thermal Response
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6
500
1.0 k
2.0 k
5.0 k
10 k
2N6071A/B Series
ORDERING INFORMATION
Device
2N6071A
Package
Shipping†
TO-225
2N6071AG
TO-225
(Pb-Free)
500 Units / Box
2N6071AT
TO-225
50 Units / Tube
2000 Units / Box
TO-225
(Pb-Free)
50 Units / Tube
2000 Units / Box
2N6071ATG
2N6071B
TO-225
2N6071BG
TO-225
(Pb-Free)
500 Units / Box
2N6071BT
TO-225
50 Units / Tube
2000 Units / Box
TO-225
(Pb-Free)
50 Units / Tube
2000 Units / Box
2N6071BTG
2N6073A
2N6073AG
2N6073B
2N6073BG
2N6075A
2N6075AG
2N6075B
2N6075BG
TO-225
TO-225
(Pb-Free)
TO-225
TO-225
(Pb-Free)
TO-225
500 Units / Box
TO-225
(Pb-Free)
TO-225
TO-225
(Pb-Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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7
2N6071A/B Series
PACKAGE DIMENSIONS
TO-225
CASE 77-09
ISSUE Z
-BU
F
Q
-A-
C
M
1 2 3
H
DIM
A
B
C
D
F
G
H
J
K
M
Q
R
S
U
V
K
J
V
G
S
R
0.25 (0.010)
A
M
M
B
M
D 2 PL
0.25 (0.010)
M
A
M
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 077-01 THRU -08 OBSOLETE, NEW STANDARD
077-09.
M
INCHES
MIN
MAX
0.425
0.435
0.295
0.305
0.095
0.105
0.020
0.026
0.115
0.130
0.094 BSC
0.050
0.095
0.015
0.025
0.575
0.655
5 _ TYP
0.148
0.158
0.045
0.065
0.025
0.035
0.145
0.155
0.040
---
MILLIMETERS
MIN
MAX
10.80
11.04
7.50
7.74
2.42
2.66
0.51
0.66
2.93
3.30
2.39 BSC
1.27
2.41
0.39
0.63
14.61
16.63
5 _ TYP
3.76
4.01
1.15
1.65
0.64
0.88
3.69
3.93
1.02
---
STYLE 5:
PIN 1. MT 1
2. MT 2
3. GATE
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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For additional information, please contact your local
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2N6071/D
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