74LVC06A D

74LVC06A
Low-Voltage CMOS Hex
Inverter with Open Drain
Outputs
With 5 V − Tolerant Inputs
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The 74LVC06A is a high performance hex inverter operating from a
1.2 V to 5.5 V supply. High impedance TTL compatible inputs
significantly reduce current loading to input drivers. These LCX
devices have open drain outputs which provide the ability to set output
levels, or do active−HIGH AND or active−LOW OR functions. A VI
specification of 5.5 V allows 74LVC06A inputs to be safely driven
from 5.0 V devices.
MARKING
DIAGRAMS
14
14
1
Features
•
•
•
•
LVC06A
AWLYWW
1
Designed for 1.2 V to 5.5 V VCC Operation
5.0 V Tolerant Inputs/Outputs
14
32 mA Output Sink Capability
Near Zero Static Supply Current (10 mA) Substantially Reduces
System Power Requirements
Latchup Performance Exceeds 250 mA
•
• Wired−OR, Wired−AND
• Output Level Can Be Set Externally Without Affecting Speed of
LVC
06A
ALYWG
G
TSSOP−14
DT SUFFIX
CASE 948G
14
1
1
Device
Functionally Compatible with LCX05
•
• ESD Performance:
•
SOIC−14
D SUFFIX
CASE 751A
Human Body Model >2000 V;
Machine Model >200 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
VCC
A3
O3
A4
O4
A5
O5
14
13
12
11
10
9
8
1
2
3
4
5
6
7
A0
O0
A1
O1
A2
O2
GND
A
WL, L
Y
WW, W
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Figure 1. Pinout: 14−Lead (Top View)
© Semiconductor Components Industries, LLC, 2015
December, 2015 − Rev. 0
1
Publication Order Number:
74LVC06A/D
74LVC06A
A0
A1
A2
A3
A4
A5
1
*
2
3
*
4
5
*
6
13
*
12
*
10
*
8
11
9
Table 1. PIN NAMES
O0
O1
Pins
Function
An
On
Data Inputs
Outputs
O2
Table 2. TRUTH TABLE
O3
O4
An
On
L
H
Z
L
O5
* OD
Figure 2. Logic Diagram
MAXIMUM RATINGS
Symbol
VCC
Parameter
DC Supply Voltage
Value
Condition
Unit
−0.5 to +6.5
V
V
VI
DC Input Voltage
−0.5 ≤ VI ≤ +6.5
VO
DC Output Voltage
−0.5 ≤ VO ≤ +6.5
Output in 3−State
−0.5 ≤ VO ≤ VCC + 0.5
Output in HIGH or LOW State (Note 1)
V
IIK
DC Input Diode Current
−50
VI < GND
mA
IOK
DC Output Diode Current
−50
VO < GND
mA
+50
VO > VCC
mA
IO
DC Output Source/Sink Current
±50
mA
ICC
DC Supply Current Per Supply Pin
±100
mA
IGND
DC Ground Current Per Ground Pin
±100
mA
TSTG
Storage Temperature Range
−65 to +150
°C
TL
Lead Temperature, 1 mm from Case for
10 Seconds
TL = 260
°C
TJ
Junction Temperature Under Bias
TJ = 135
°C
qJA
Thermal Resistance (Note 2)
SOIC = 85
TSSOP = 100
°C/W
MSL
Moisture Sensitivity
ILATCHUP
Level 1
±250
Latch−up Performance at VCC = 3.6 V
and 125°C (Note 3)
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. IO absolute maximum rating must be observed.
2. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
3. Tested to EIA/JES078.
ORDERING INFORMATION
Package
Shipping†
74LVC06ADR2G
SOIC−14
(Pb−Free)
2500 / Tape & Reel
74LVC06ADTR2G
TSSOP−14
(Pb−Free)
2500 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
74LVC06A
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Supply Voltage
VI
Input Voltage
VO
Output Voltage
IOL
LOW Level Output Current
TA
Operating Free−Air Temperature
Dt/DV
Input Transition Rise or Fall Rate
Min
Operating
Functional
Active Mode
3−State
Typ
Max
Unit
1.65
1.2
5.5
5.5
V
0
5.5
V
0
0
VCC
5.5
V
+32
+24
+12
+8
mA
−40
+125
°C
0
0
20
10
ns/V
VCC = 4.5 V − 5.5 V
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
VCC = 1.65 to 2.7 V
VCC = 2.7 to 5.5 V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
−40 to +855C
Symbol
VIH
VIL
VOL
Parameter
HIGH−level input voltage
LOW−level input voltage
LOW−level output voltage
−40 to +1255C
Conditions
Min
Typ
(Note 4)
Max
Min
Typ
(Note 4)
Max
Unit
VCC = 1.2 V
1.08
−
−
1.08
−
−
V
VCC = 1.65 V to 1.95 V
0.65 x
VCC
−
−
0.65 x
VCC
−
−
VCC = 2.3 V to 2.7 V
1.7
−
−
1.7
−
−
VCC = 2.7 V to 3.6 V
2.0
−
−
2.0
−
−
VCC = 4.5 V to 5.5 V
0.7 x
VCC
−
−
0.7 x
VCC
−
−
VCC = 1.2 V
−
−
0.12
−
−
0.12
VCC = 1.65 V to 1.95 V
−
−
0.35 x
VCC
−
−
0.35 x
VCC
VCC = 2.3 V to 2.7 V
−
−
0.7
−
−
0.7
VCC = 2.7 V to 3.6 V
−
−
0.8
−
−
0.8
VCC = 4.5 V to 5.5 V
−
−
0.3 x
VCC
−
−
0.3 x
VCC
−
−
−
VI = VIH or VIL
V
V
IO = 100 mA;
VCC = 1.65 V to 3.6 V
−
−
0.2
−
−
0.3
IO = 4 mA; VCC = 1.65 V
−
−
0.45
−
−
0.65
IO = 8 mA; VCC = 2.3 V
−
−
0.6
−
−
0.8
IO = 12 mA; VCC = 2.7 V
−
−
0.4
−
−
0.6
IO = 24 mA; VCC = 3.0 V
−
−
0.55
−
−
0.8
IO = 32 mA; VCC = 4.5 V
−
−
0.55
−
−
0.8
VI = 5.5 V or GND
VCC = 1.65 to 5.5 V
−
±0.1
±5
−
±0.1
±20
mA
II
Input leakage current
IOZ
OFF−state output current
VI = VIH; VO = 5.5 V or GND;
VCC = 1.65 to 5.5 V
−
±0.1
±5
−
±0.1
±20
mA
IOFF
Power−off leakage current
VI or VO = 5.5 V; VCC = 0 V
−
±0.1
±10
−
±0.1
±20
mA
4. All typical values are measured at TA = 25°C and VCC = 3.3 V, unless stated otherwise.
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74LVC06A
DC ELECTRICAL CHARACTERISTICS
−40 to +855C
Symbol
Conditions
Min
Typ
(Note 4)
Max
Min
Typ
(Note 4)
Max
Unit
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
−
0.1
10
−
0.1
40
mA
per input pin; VI = VCC − 0.6 V;
IO = 0 A; VCC = 2.7 V to 5.5 V
−
5
500
−
5
5000
mA
Parameter
ICC
Supply current
DICC
Additional supply current
−40 to +1255C
4. All typical values are measured at TA = 25°C and VCC = 3.3 V, unless stated otherwise.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC ELECTRICAL CHARACTERISTICS (tR = tF = 2.5 ns)
−40 to +855C
Symbol
tpZL
tpLZ
Parameter
OFF−state to LOW
propagation delay An
to On
LOW to OFF−state
propagation delay An
to On
−40 to +1255C
Conditions
Min
Typ
(Note 5)
Max
Min
Typ
(Note 5)
Max
Unit
VCC = 1.2 V
−
9.0
−
−
−
−
ns
VCC = 1.65 V to 1.95 V
0.5
2.8
5.7
0.5
−
6.7
VCC = 2.3 V to 2.7 V
0.5
1.9
3.1
0.5
−
4.0
VCC = 2.7 V
0.5
1.8
3.9
0.5
−
5.0
VCC = 3.0 V to 3.6 V
0.5
1.8
3.7
0.5
−
5.0
VCC = 4.5 V to 5.5 V
0.5
1.5
2.5
0.5
−
5.0
VCC = 1.2 V
−
10.0
−
−
−
−
VCC = 1.65 V to 1.95 V
0.5
2.6
5.7
0.5
−
6.7
VCC = 2.3 V to 2.7 V
0.5
1.4
3.1
0.5
−
4.0
VCC = 2.7 V
0.5
2.6
3.9
0.5
−
5.0
VCC = 3.0 V to 3.6 V
0.5
2.2
3.7
0.5
−
5.0
VCC = 4.5 V to 5.5 V
0.5
1.5
2.6
−
−
3.5
Typ
Max
ns
5. Typical values are measured at TA = 25°C and VCC = 3.3 V, unless stated otherwise.
DYNAMIC SWITCHING CHARACTERISTICS
Symbol
Characteristic
Condition
Min
Unit
VOLP
Dynamic LOW Peak Voltage (Note 6)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
0.8
0.6
V
VOLV
Dynamic LOW Valley Voltage (Note 6)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
−0.8
−0.6
V
6. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS (TA = +25°C)
Parameter
Symbol
Condition
Typical
Unit
CIN
Input Capacitance
VCC = 3.3 V, VI = 0 V or VCC
5.0
pF
COUT
Output Capacitance
VCC = 3.3 V, VI = 0 V or VCC
6.0
pF
CPD
Power Dissipation Capacitance (Note 7)
pF
Per input; VI = GND or VCC
VCC = 1.65 V to 1.95 V
6.5
VCC = 2.3 V to 2.7 V
6.9
VCC = 3.0 V to 3.6 V
7.2
7. CPD is used to determine the dynamic power dissipation (PD in mW)
PD = CPD * VCC2 x fi * N + L (CL x VCC2 x fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF VCC = supply voltage in Volts
N = number of outputs switching L (CL * VCC2)
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4
74LVC06A
VCC
Vmi
An
Vmi
0V
tPZL
tPLZ
On
Vmo
VLZ
VOL
PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Table 3. AC WAVEFORMS
VCC
Symbol
VCC . 4.5 to 5.5 V
VCC . 2.7 to 3.6 V
VCC < 2.7 V
VCC / 2
1.5 V
VCC / 2
Vmi
Vmo
VCC / 2
1.5 V
VCC / 2
VLZ
VOL + 0.3 V
VOL + 0.3 V
VOL + 0.15 V
VCC
6 V or VCC × 2
R1
PULSE
GENERATOR
GND
DUT
RT
CL
RL
CL includes jig and probe capacitance
RT = ZOUT of pulse generator (typically 50 Q)
R1 = RL
Table 4. TEST CIRCUIT
Supply Voltage
Input
VEXT
Load
VCC (V)
VI
tr, tf
CL
RL
tPLH, tPHL
tPLZ, tPZL
tPHZ, tPZH
1.2
VCC
≤ 2 ns
30 pF
1 kQ
Open
2 x VCC
GND
1.65 − 1.95
VCC
≤ 2 ns
30 pF
1 kQ
Open
2 x VCC
GND
2.3 − 2.7
VCC
≤ 2 ns
30 pF
500 Q
Open
2 x VCC
GND
2.7
2.7 V
≤ 2.5 ns
50 pF
500 Q
Open
2 x VCC
GND
50 pF
500 Q
Open
2 x VCC
GND
50 pF
500 Q
Open
2 x VCC
GND
3.0 − 3.6
4.5 to 5.5
2.7 V
VCC
≤ 2.5 ns
≤ 2.5 ns
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5
74LVC06A
PACKAGE DIMENSIONS
TSSOP−14
DT SUFFIX
CASE 948G
ISSUE B
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
S
N
2X
14
L/2
0.25 (0.010)
8
M
B
−U−
L
PIN 1
IDENT.
F
7
1
0.15 (0.006) T U
N
S
DETAIL E
K
A
−V−
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
K1
J J1
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
SECTION N−N
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
H
G
DETAIL E
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
14X
0.36
14X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MILLIMETERS
INCHES
MIN
MAX
MIN MAX
4.90
5.10 0.193 0.200
4.30
4.50 0.169 0.177
−−−
1.20
−−− 0.047
0.05
0.15 0.002 0.006
0.50
0.75 0.020 0.030
0.65 BSC
0.026 BSC
0.50
0.60 0.020 0.024
0.09
0.20 0.004 0.008
0.09
0.16 0.004 0.006
0.19
0.30 0.007 0.012
0.19
0.25 0.007 0.010
6.40 BSC
0.252 BSC
0_
8_
0_
8_
74LVC06A
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE K
D
A
B
14
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
8
A3
E
H
L
1
0.25
M
DETAIL A
7
B
13X
M
b
0.25
M
C A
S
B
S
e
DETAIL A
h
A
X 45 _
M
A1
C
SEATING
PLANE
DIM
A
A1
A3
b
D
E
e
H
h
L
M
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.19
0.25
0.35
0.49
8.55
8.75
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0_
7_
INCHES
MIN
MAX
0.054 0.068
0.004 0.010
0.008 0.010
0.014 0.019
0.337 0.344
0.150 0.157
0.050 BSC
0.228 0.244
0.010 0.019
0.016 0.049
0_
7_
SOLDERING FOOTPRINT*
6.50
14X
1.18
1
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
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For additional information, please contact your local
Sales Representative
74LVC06A/D
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