MC74AC05 D

MC74AC05, MC74ACT05
Hex Inverter with
Open-Drain Outputs
High−Performance Silicon−Gate CMOS
The MC74AC/ACT05 is identical in pinout to the LS05. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with TTL outputs.
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MARKING
DIAGRAMS
Features
• Outputs Source/Sink 24 mA
• ′ACT05 Has TTL Compatible Inputs
• These are Pb−Free Devices
14
14
SOIC−14
D SUFFIX
CASE 751A
xxx05G
AWLYWW
1
1
VCC
A6
Y6
A5
Y5
A4
Y4
14
13
12
11
10
9
8
14
xxx
05
ALYWG
G
TSSOP−14
DT SUFFIX
CASE 948G
1
14
1
1
2
3
4
5
6
7
A1
Y1
A2
Y2
A3
Y3
GND
xxx
= AC or ACT
A
= Assembly Location
WL or L = Wafer Lot
Y
= Year
WW or W = Work Week
G or G
= Pb−Free Package
Top View
Figure 1. Pinout: 14-Lead Packages
(Note: Microdot may be in either location)
FUNCTION TABLE
2, 4, 6, 8, 10, 12
A
Y*
NOTE:
Input A
Output Y
L
H
Z
L
Z = High Impedance
1, 3, 5, 9, 11, 13
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
PIN 14 = VCC
PIN 7 = GND
* DENOTES OPEN‐DRAIN OUTPUTS
Figure 2. Logic Diagram
© Semiconductor Components Industries, LLC, 2015
January, 2015 − Rev. 9
1
Publication Order Number:
MC74AC05/D
MC74AC05, MC74ACT05
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
*0.5 to )7.0
V
*0.5 v VI v VCC )0.5
V
*0.5 v VO v VCC )0.5
V
DC Input Diode Current
$20
mA
IOK
DC Output Diode Current
$50
mA
IO
DC Output Sink/Source Current
$50
mA
ICC
DC Supply Current per Output Pin
$50
mA
IGND
DC Ground Current per Output Pin
$50
mA
TSTG
Storage Temperature Range
*65 to )150
°C
TL
Lead temperature, 1 mm from Case for 10 Seconds
260
°C
TJ
Junction temperature under Bias
)150
°C
qJA
Thermal Resistance (Note 2)
SOIC
TSSOP
125
170
°C/W
PD
Power Dissipation in Still Air at 85°C
SOIC
TSSOP
125
170
mW
MSL
Moisture Sensitivity
FR
Flammability Rating
VESD
ESD Withstand Voltage
Human Body Model (Note 3)
Machine Model (Note 4)
Charged Device Model (Note 5)
> 2000
> 200
> 1000
V
ILatch−Up
Latch−Up Performance
Above VCC and Below GND at 85°C (Note 6)
$100
mA
VCC
DC Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
IIK
(Note 1)
Level 1
Oxygen Index: 30% − 35%
UL 94 V−0 @ 0.125 in
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. IO absolute maximum rating must be observed.
2. The package thermal impedance is calculated in accordance with JESD51−7.
3. Tested to EIA/JESD22−A114−A.
4. Tested to EIA/JESD22−A115−A.
5. Tested to JESD22−C101−A.
6. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VREG
tr, tf
Parameter
Supply Voltage
Min
Typ
Min
′AC
2.0
5.0
6.0
′ACT
4.5
5.0
5.5
0
−
VCC
VCC @ 3.0 V
−
150
−
VCC @ 4.5 V
−
40
−
VCC @ 5.5 V
−
25
−
VCC @ 4.5 V
−
10
−
VCC @ 5.5 V
−
8.0
−
−
−
140
DC Regulated Power Voltage (Ref. to GND)
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
tr, tf
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
TJ
Junction Temperature (PDIP)
Unit
V
V
ns/V
ns/V
°C
TA
Operating Ambient Temperature Range
−40
25
85
°C
IOH
Output Current − HIGH
−
−
−24
mA
IOL
Output Current − LOW
−
−
24
mA
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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2
MC74AC05, MC74ACT05
DC CHARACTERISTICS
74AC
Symbol
Parameter
VCC
(V)
74AC
TA = +25°C
Typ
VIH
VIL
VOL
IIN
IOLD
IOHD
TA = −40°C to +85°C
Unit
Conditions
Guaranteed Limits
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
VOUT = 0.1 V
or VCC − 0.1 V
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
VOUT = 0.1 V
or VCC − 0.1 V
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
V
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
Maximum Input Leakage Current
5.5
−
±0.1
†Minimum Dynamic
Output Current
5.5
−
5.5
−
Minimum High Level Input Voltage
Maximum Low Level Input Voltage
Maximum Low Level Output Voltage
IOUT = 50 mA
V
*VIN = VIL or VIH
12 mA
IOL
24 mA
24 mA
±1.0
mA
VI = VCC, GND
−
75
mA
VOLD = 1.65 V Max
−
−75
mA
VOHD = 3.85 V Min
ICC
Maximum Quiescent Supply Current
5.5
−
4.0
40
VIN = VCC or GND
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V.
AC CHARACTERISTICS
Symbol
Parameter
VCC*
(V)
74AC
74AC
TA = +25°C CL = 50 pF
TA = −40°C to +85°C CL = 50 pF
Min
Typ
Max
Min
Max
Unit
tPZL
Propagation Delay Output Enable
3.3
5.0
1.5
1.5
−
−
8.0
6.0
1.0
1.0
9.0
6.5
ns
tPLZ
Propagation Delay Output Enable
3.3
5.0
1.5
1.5
−
−
8.0
6.0
1.0
1.0
9.0
6.5
ns
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
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3
MC74AC05, MC74ACT05
DC CHARACTERISTICS
74ACT
Symbol
VCC
(V)
Parameter
74ACT
TA = +25°C
TA = −40°C to +85°C
Typ
Unit
Conditions
Guaranteed Limits
VIH
Minimum High Level Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
VOUT = 0.1 V
or VCC − 0.1 V
VIL
Maximum Low Level Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
VOUT = 0.1 V
or VCC − 0.1 V
VOL
Maximum Low Level Output Voltage
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
V
4.5
5.5
−
−
0.36
0.36
0.44
0.44
0.44
Maximum Input Leakage Current
5.5
−
±0.1
±1.0
mA
VI = VCC, GND
DICCT
Additional Max. ICC/Input
5.5
0.6
−
1.5
mA
VI = VCC − 2.1 V
IOLD
IOHD
†Minimum Dynamic Output Current
5.5
5.5
−
−
−
−
75
−75
mA
mA
VOLD = 1.65 V Max
VOHD = 3.85 V Min
ICC
Maximum Quiescent Supply Current
5.5
−
4.0
40
mA
VIN = VCC or GND
IIN
IOUT = 50 mA
*VIN = VIL or VIH
IOH
24 mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS
Symbol
VCC*
(V)
Parameter
74ACT
74ACT
TA = +25°C CL = 50 pF
TA = −40°C to +85°C CL = 50 pF
Min
Typ
Max
Min
Max
Unit
tPZL
Propagation Delay Output Enable
5.0
1.5
−
8.0
1.0
8.5
ns
tPLZ
Propagation Delay Output Enable
5.0
1.5
−
8.5
1.0
9.0
ns
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
Value Typ
Unit
Test Conditions
CIN
Input Capacitance
Parameter
4.5
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
30
pF
VCC = 5.0 V
ORDERING INFORMATION
Package
Shipping†
MC74AC05DG
SOIC−14
(Pb−Free)
55 Units / Rail
MC74AC05DR2G
SOIC−14
(Pb−Free)
2500 / Tape & Reel
MC74ACT05DG
SOIC−14
(Pb−Free)
55 Units / Rail
MC74ACT05DR2G
SOIC−14
(Pb−Free)
2500 / Tape & Reel
MC74ACT05DTR2G
TSSOP−14
(Pb−Free)
2500 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
MC74AC05, MC74ACT05
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE K
D
A
B
14
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
8
A3
E
H
L
1
0.25
M
DETAIL A
7
B
13X
M
b
0.25
M
C A
S
B
S
X 45 _
M
A1
e
DETAIL A
h
A
C
SEATING
PLANE
DIM
A
A1
A3
b
D
E
e
H
h
L
M
SOLDERING FOOTPRINT*
6.50
14X
1.18
1
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.19
0.25
0.35
0.49
8.55
8.75
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0_
7_
INCHES
MIN
MAX
0.054 0.068
0.004 0.010
0.008 0.010
0.014 0.019
0.337 0.344
0.150 0.157
0.050 BSC
0.228 0.244
0.010 0.019
0.016 0.049
0_
7_
MC74AC05, MC74ACT05
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G
ISSUE B
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
S
N
2X
14
L/2
0.25 (0.010)
8
M
B
−U−
L
PIN 1
IDENT.
F
7
1
0.15 (0.006) T U
N
S
DETAIL E
K
A
−V−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH
OR PROTRUSION SHALL NOT EXCEED 0.25
(0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
K1
J J1
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
SECTION N−N
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
H
G
DETAIL E
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
14X
0.36
14X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.50
0.60
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN MAX
0.193 0.200
0.169 0.177
−−− 0.047
0.002 0.006
0.020 0.030
0.026 BSC
0.020 0.024
0.004 0.008
0.004 0.006
0.007 0.012
0.007 0.010
0.252 BSC
0_
8_
MC74AC05, MC74ACT05
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
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expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
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7
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
MC74AC05/D