Demo Note for the A8583 Evaluation Board 4.7VIN – 40VIN, 8.0VOUT, 3.5A, 1.3MHz Asynchronous Buck Regulator Page 1 of 5 September 28, 2010 GENERAL SPECIFICATIONS Specification Absolute Maximum Input Voltage Operating Input Voltage Range VIN START Threshold, VIN rising VIN STOP Threshold, VIN falling Output Voltage (FB: 4.42K/40.2K, ±1%) Steady-State Output Current Pulse-by-pulse Current Limit Enable/Synchronization Input Min –0.3 4.7 − − 7.773 − 4.75 –0.3 Nom − 12 4.2 3.8 8.076 3.5 − − Max 40 36 4.6 4.2 8.387 − 6.25 5.5 Units Volts Volts Volts Volts Volts A A Volts OPERATING INSTRUCTIONS Input Power Connection: Connect a 12V power supply from Vin to GND that is capable of at least 4.5A. Once operational, VIN can fall as low as 3.8VTYP (4.2VMAX) before the A8583 is reset. Enable Input Connection: Connect an Enable signal from EN/SYNC to GND. If the EN/SYNC input voltage is higher than 1.8V the A8583 will be enabled. If the EN/SYNC input voltage is lower than 0.8V the A8583 will be disabled. Also, EN/SYNC may be used to simultaneously enable the A8583 and synchronize the PWM switching frequency by applying a square wave above 1.5MHz. Note: Continuously applying more than 5.5V to the EN/SYNC pin may damage the A8583. Output Load Connections: Connect a load from VOUT to GND. The steady-state load current can be as high as 3.5A. Pulseby-pulse current limit and/or thermal shutdown will occur if the load is greater than 4.75A. DEMO BOARD PICTURE Page 2 of 5 September 28, 2010 DEMO BOARD SCHEMATIC TP2 GND CIN2 3.3uF 50V 1210 Vin Vin Vin GND GND SW SW BOOT FBX 7 EN/Sync TP4 SS TP14 GND TP15 GND TP16 GND TP17 GND 4 TP5 FSET 8 CSS 18.7K = 1.3MHz 22nF 0603 TP6 COMP 11 RFSET 18.7K CP 10pF 0603 RZ 13 25.5K CZ 1.2nF 0603 14 10 SW TP8 BOOT SS Cboot 100nF 50V 0603 9 TP10 FB RFB1 40.2K TP11 Vout VOUT CO3 Empty xxV 8mm D1 SSB44 SMB CO2 10uF 16V 1206 CO1 10uF 16V 1206 TP13 GND RS1 40.2K CFBX 120pF 50V 0603 FB LO 2.2uH 6.5mm x 7.0mm IHLP2525CZER2R2M01 TP7 SW TP9 FBX EN/SYNC RS2 4.42K Bode Empty RFB2 4.42K FSET RPU 100K COMP NC POK 6 0 TP3 EN/SYNC 16 15 2 CIN1 3.3uF 50V 1210 C1 47uF 50V 8mm A8583 C A U1 1 2 3 5 12 VIN 1 TP1 Vin TP12 POK RPD 69.8K Note: C1 is an optional, bulk, electrolytic capacitor for general supply filtering DEMO BOARD BILL-OF-MATERIALS Page 3 of 5 September 28, 2010 DEMO PCB LAYOUT: Top Layer and Top Silk Layer 2 and Top Silk Page 4 of 5 September 28, 2010 Layer 3 and Top Silk Bottom Layer and Top Silk Page 5 of 5 September 28, 2010