Data Sheet

MCP2140
IrDA® Standard Protocol Stack Controller
With Fixed 9600 Baud Communication Rate
Features
Package Types
®
•
•
•
•
•
Low power, high-speed CMOS technology
Fully static design
Low voltage operation
Industrial temperature range
Low power consumption
- < 1 mA @ 3.0V, 7.3728 MHz (typical)
 2003-2012 Microchip Technology Inc.
RXPDREF
TXIR
PHACT
RESET
VSS
NC
TX
RX
RI
1
2
3
4
5
6
7
8
9
RXPD
CD
OSC1/CLKI
OSC2
VDD
RTS
CTS
DTR
DSR
18
17
16
15
14
13
12
11
10
SSOP
RXPDREF
TXIR
PHACT
RESET
VSS
VSS
NC
TX
RX
RI
1
2
3
4
5
6
7
8
9
10
MCP2140
CMOS Technology
PDIP, SOIC
MCP2140
• Implements the IrDA standard, including:
- IrLAP
- IrLMP
- IAS
- TinyTP
- IrCOMM (9-wire “cooked” service class)
• Provides IrDA standard physical signal layer
support including:
- Bidirectional communication
- CRC implementation
- Fixed Data communication rate of 9600 baud
• Includes UART-to-IrDA standard encoder/decoder
functionality:
- Easily interfaces with industry standard
UARTs and infrared transceivers
• UART interface for connecting to Data
Communications Equipment (DCE) or Data
Terminal Equipment (DTE) systems
• Transmit/Receive formats (bit width) supported:
- 1.63 µs
• Hardware UART Support:
- 9.6 kbaud baud rate
- 29 Byte Data Buffer Size
• Infrared Supported:
- 9.6 kbaud baud rate
- 64 Byte Data Packet Size
• Operates as Secondary Device
• Automatic Low Power mode
- < 60 µA when no IR activity present 
(PHACT = L)
RXPD
CD
OSC1/CLKI
OSC2
VDD
VDD
RTS
CTS
DTR
DSR
20
19
18
17
16
15
14
13
12
11
Block Diagram
MCP2140
TX
Encode and
Protocol Handler
TXIR
Logic
PHACT
RX
RTS
CTS
DSR
DTR
CD
RI
Preliminary
Baud
Rate
Generator
Protocol
Handler
and Decode
UART
Control
+
-
RXPD
RXPDREF
OSC1
OSC2
DS21790B-page 1
MCP2140
MCP2140 System Block Diagram
PIC®
Microcontroller
MCP2140
TX
UART
SO
Decode
TXIR
IR LED
Baud Rate
Generator
RX
UART Flow
Control (1)
I/O
I/O
I/O
I/O
I/O
I/O
MCP2140
Status (1)
SI
I/O
RTS
CTS
DSR
DTR
CD
RI
PHACT
Encode
+
-
RXPD
IR Receive
Detect
RXPDREF Circuitry
IR Photo
diode
UART
Control
Logic
Note 1: Not all microcontroller I/O pins are required to be connected to the MCP2140.
DS21790B-page 2
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
1.0
DEVICE OVERVIEW
1.1
The MCP2140 is a cost-effective, low pin count (18-pin),
easy-to-use device for implementing IrDA standard
wireless connectivity. The MCP2140 provides support
for the IrDA standard protocol “stack”, bit encoding/
decoding and low cost, discrete IR receiver circuitry.
The serial and IR interface baud rates are fixed at
9600 baud. The serial interface and IR interface baud
rates are dependent on the device frequency, but IrDA
standard operation requires a device frequency of
7.3728 MHz.
The MCP2140 will specify to the Primary Device the IR
baud rate during the Discover phase.
The MCP2140 can operate in Data Communication
Equipment (DCE) and Data Terminal Equipment (DTE)
applications, and sits between a UART and an infrared
optical transceiver.
The MCP2140 encodes an asynchronous serial data
stream, converting each data bit to the corresponding
infrared (IR) formatted pulse. IR pulses received are
decoded and then handled by the protocol handler
state machine. The protocol handler sends the appropriate data bytes to the Host Controller in UARTformatted serial data.
The MCP2140 supports “point-to-point” applications,
that is, one Primary device and one Secondary device.
The MCP2140 operates as a Secondary device and
does not support “multi-point” applications.
Sending data using IR light requires some hardware
and the use of specialized communication protocols.
These protocol and hardware requirements are
described, in detail, by the IrDA standard specifications.
The encoding/decoding functionality of the MCP2140 is
designed to be compatible with the physical layer component of the IrDA standard. This part of the standard is
often referred to as “IrPHY”.
The complete IrDA standard specification is available
for download from the IrDA website at www.IrDA.org.
Applications
The MCP2140 Infrared Communications Controller,
supporting the IrDA standard, provides embedded system designers the easiest way to implement IrDA standard wireless connectivity. Figure 1-1 shows a typical
application block diagram, while Table 1-2 shows the
pin definitions.
TABLE 1-1:
OVERVIEW OF FEATURES
Features
MCP2140
Serial Communications
UART, IR
Baud Rate Selection
Fixed
Low Power Mode
Yes
Resets (and Delays)
RESET, POR 
(PWRT and OST)
Packages
18-pin DIP, SOIC, 
20-pin SSOP
Infrared communication is a wireless, two-way data
connection using infrared light generated by low-cost
transceiver signaling technology. This provides reliable
communication between two devices.
Infrared technology offers:
• Universal standard for connecting portable
computing devices
• Easy, effortless implementation
• Economical alternative to other connectivity
solutions
• Reliable, high-speed connections
• Safe to use in any environment (can even be
used during air travel)
• Eliminates the hassle of cables
• Allows PCs and other electronic devices (such as
PDAs, cell phones, etc.) to communicate with
each other
• Enhances mobility by allowing users to easily
connect
The MCP2140 allows the easy addition of IrDA standard wireless connectivity to any embedded application that uses serial data. Figure 1-1 shows typical
implementation of the MCP2140 in an embedded
system.
The IrDA protocol for printer support is not included in
the IrCOMM 9-wire “cooked” service class.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 3
MCP2140
FIGURE 1-1:
SYSTEM BLOCK DIAGRAM
PIC®
Microcontroller
MCP2140
TX
UART
SO
Decode
TXIR
IR LED
Baud Rate
Generator
RX
UART Flow
Control (1)
I/O
I/O
I/O
I/O
I/O
I/O
MCP2140
Status (1)
SI
I/O
RTS
CTS
DSR
DTR
CD
RI
PHACT
Encode
+
-
RXPD
IR Receive
Detect
RXPDREF Circuitry
IR Photo
diode
UART
Control
Logic
Note 1: Not all microcontroller I/O pins are required to be connected to the MCP2140.
DS21790B-page 4
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
TABLE 1-2:
MCP2140 PIN DESCRIPTION NORMAL OPERATION (DCE)
Pin Number
Pin Name
PDIP
SOIC SSOP
Pin
Type
Buffer
Type
Description
RXPDREF
1
1
1
I
A
IR Receive Photo Detect Diode reference voltage. This
voltage will typically be in the range of VDD/2.
TXIR
2
2
2
O
—
Asynchronous transmit to IrDA transceiver.
PHACT
3
3
3
OC
—
Protocol Handler Active. Indicates the state of the MCP2140
Protocol Handler. This output is an open collector, so an
external pull-up resistor may be required.
1 = Protocol Handler is in the Discovery or NRM state
0 = Protocol Handler is in NDM state or the MCP2140 is 
in Low Power mode
Resets the Device
RESET
4
4
4
I
ST
VSS
5
5
5, 6
—
P
Ground reference for logic and I/O pins
NC
6
6
7
I
—
No connect
TX
7
7
8
I
TTL
RX
8
8
9
O
—
RI
9
9
10
I
TTL
DSR
10
10
11
O
—
Data Set Ready. Indicates that the MCP2140 has established a valid IrDA link with a Primary Device(1). This signal
is locally emulated and not related to the DTR bit of the IrDA
Primary Device.
1 = An IR link has not been established 
(No IR Link)
0 = An IR link has been established (IR Link)
DTR
11
11
12
I
TTL
Data Terminal Ready. Indicates that the Embedded device
connected to the MCP2140 is ready for IR data. The state of
this bit is communicated to the IrDA Primary Device via the
IrDA DSR bit carried by IrCOMM.
1 = Embedded device not ready
0 = Embedded device ready
CTS
12
12
13
O
—
Legend:
TTL = TTL compatible input
A = Analog
CMOS = CMOS compatible input
I = Input
Asynchronous receive; from Host Controller UART
Asynchronous transmit; to Host Controller UART
Ring Indicator. The state of this bit is communicated to the
IrDA Primary Device.
1 = No Ring Indicate Present
0 = Ring Indicate Present
Clear to Send. Indicates that the MCP2140 is ready to
receive data from the Host Controller. This signal is locally
emulated and not related to the CTS/RTS bit of the IrDA
Primary Device.
1 = Host Controller should not send data
0 = Host Controller may send data
ST = Schmitt Trigger input with CMOS levels 
P = Power 
OC = Open collector output
O = Output
1: The state of the DTR output pin does not reflect the state of the DTR bit of the IrDA Primary Device.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 5
MCP2140
TABLE 1-2:
MCP2140 PIN DESCRIPTION NORMAL OPERATION (DCE) (CONTINUED)
Pin Number
Pin Name
PDIP
SOIC SSOP
Pin
Type
Buffer
Type
Description
RTS
13
13
14
I
TTL
VDD
14
14
15, 16
—
P
Positive supply for logic and I/O pins.
OSC2
15
15
17
O
—
Oscillator crystal output.
OSC1/CLKIN
16
16
18
I
CD
17
17
19
I
ST
RXPD
18
18
20
I
A
Legend:
TTL = TTL compatible input
A = Analog
CMOS = CMOS compatible input
I = Input
Request to Send. Indicates that a Host Controller is ready to
receive data from the MCP2140. This signal is locally emulated and not related to the CTS/RTS bit of the IrDA Primary
device.
1 = Host Controller not ready to receive data
0 = Host Controller ready to receive data
CMOS Oscillator crystal input/external clock source input.
Carrier Detect. The state of this bit is communicated to the
IrDA Primary device via the IrDA CD bit.
1 = No Carrier Present
0 = Carrier Present
IR RX Photo Detect Diode input. This input signal is required
to be a pulse to indicate an IR bit. When the amplitude of the
signal crosses the amplitude threshold set by the RXPDREF
pin, the IR bit is detected. The pulse has minimum and maximum requirements as specified in Parameter IR131A.
ST = Schmitt Trigger input with CMOS levels 
P = Power 
OC = Open collector output
O = Output
1: The state of the DTR output pin does not reflect the state of the DTR bit of the IrDA Primary Device.
DS21790B-page 6
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
2.0
DEVICE OPERATION
2.3.1.1
The MCP2140 serial interface and IR baud rates are
fixed at 9600 baud, given a 7.3728 MHz device clock.
2.1
Power-Up
Any time the device is powered up (Parameter D003),
the Power-Up Timer delay (Parameter 33) occurs, followed by an Oscillator Start-up Timer (OST) delay
(Parameter 32). Once these delays complete, communication with the device may be initiated. This communication is from both the infrared transceiver’s side and
the controller’s UART interface.
2.2
OSC1
To internal
logic
XTAL
RF
OSC2
RS
(Note)
C2
Note:
A series resistor may be required for
AT strip cut crystals.
TABLE 2-1:
CLOCK SOURCE
The clock source can be supplied by one of the
following:
CAPACITOR SELECTION FOR
CERAMIC RESONATORS
Freq
OSC1 (C1)
OSC2 (C2)
7.3728 MHz
10 - 22 pF
10 - 22 pF
Note:
• Crystal
• Resonator
• External clock
MCP2140
See Table 2-1 and Table 2-2 for recommended
values of C1 and C2.
Device Clocks
The frequency of this clock source must be
7.3728 MHz (electrical specification Parameter 1A) for
device communication at 9600 baud.
Higher capacitance increases the stability
of the oscillator, but also increases the startup time. These values are for design guidance only. Since each resonator has its own
characteristics, the user should consult the
resonator manufacturer for appropriate values of external components.
TABLE 2-2:
CAPACITOR SELECTION FOR
CRYSTAL OSCILLATOR
Freq
OSC1 (C1)
OSC2 (C2)
7.3728 MHz
15 - 30 pF
15 - 30 pF
Note:
 2003-2012 Microchip Technology Inc.
CRYSTAL OPERATION 
(CERAMIC RESONATOR)
FIGURE 2-1:
Device Reset
The MCP2140 requires a clock source to operate. This
clock source is used to establish the device timing,
including the device “Bit Clock”.
2.3.1
A crystal or ceramic resonator can be connected to the
OSC1 and OSC2 pins to establish oscillation 
(Figure 2-1). The MCP2140 oscillator design requires
the use of a parallel-cut crystal. Use of a series of cut
crystals may give a frequency outside of the crystal
manufacturers specifications.
C1
The MCP2140 is forced into the reset state when the
RESET pin is in the low state. Once the RESET pin is
brought to a high state, the Device Reset sequence
occurs. Once the sequence completes, functional
operation begins.
2.3
Crystal Oscillator / Ceramic
Resonators
Preliminary
Higher capacitance increases the stability
of the oscillator but also increases the startup time. These values are for design guidance only. RS may be required to avoid
overdriving crystals with low drive level
specification. Since each crystal has its
own characteristics, the user should consult the crystal manufacturer for appropriate
values of external components.
DS21790B-page 7
MCP2140
2.3.1.2
External Clock
For applications where a clock is already available
elsewhere, users may directly drive the MCP2140 provided that this external clock source meets the AC/DC
timing requirements listed in Section 4.3, “Timing Diagrams and Specifications”. Figure 2-2 shows how an
external clock circuit should be configured.
FIGURE 2-2:
2.3.2
EXTERNAL CLOCK
Clock From
external
system
OSC1
Open
OSC2
MCP2140
BIT CLOCK
The device crystal is used to derive the communication
bit clock (BITCLK). There are 16 BITCLKs for each bit
time. The BITCLKs are used for the generation of the
start bit and the eight data bits. The stop bit uses the
BITCLK when the data is transmitted (not for
reception).
This clock is a fixed-frequency and has minimal
variation in frequency (specified by the crystal
manufacturer).
DS21790B-page 8
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
2.4
2.4.4
Host UART Interface
The Host UART interface communicates with the Host
Controller. This interface has eight signals associated
with it: TX, RX, RTS, CTS, DSR, DTR, CD and RI. Several of these signals are locally generated (not passed
over the IR interface). The Host UART is a half-duplex
interface, meaning that the system is either transmitting
or receiving, but not both simultaneously.
Note 1: The MCP2140 generates several nondata signals locally.
2: The MCP2140 emulates a 3-wire serial
connection (TXD, RXD and GND). The
transceiver’s Transmit Data (TXD),
Receive Data (RXD) signals, and the
state of the CD. RI and DTR input pins are
carried back and forth to the Primary
device.
3: The RTS and CTS signals are local
emulations.
2.4.1
BAUD RATE
The baud rate for the MCP2140 serial port (the TX and
RX pins) is fixed at 9600 baud when the device
frequency is 7.3728 MHz.
2.4.2
TRANSMITTING
When the controller sends serial data to the MCP2140,
the controller’s baud rate is required to match the baud
rate of the MCP2140’s serial port.
2.4.3
RECEIVING
When the controller receives serial data from the
MCP2140, the controller’s baud rate is required to
match the baud rate of the MCP2140’s serial port.
There are three Host UART signals used to control the
handshaking operation between the Host Controller
and the MCP2140. They are:
• DSR
• RTS
• CTS
2.4.4.1
DSR
The DSR signal is used to indicate that a link has been
established between the MCP2140 and the Primary
Device. Please refer to Section 2.14, “How Devices
Connect”, for information on how devices connect.
2.4.4.2
RTS
The RTS signal indicates to the MCP2140 that the Host
Controller is ready to receive serial data. Once an IR
data packet has been received, the RTS signal will be
low for the received data to be transferred to the Host
Controller. If the RTS signal remains high, an IR link
timeout will occur and the MCP2140 will disconnect
from the Primary Device.
2.4.4.3
CTS
The MCP2140 generates the CTS signal locally due to
buffer limitations.
The MCP2140 uses a 64-byte buffer for incoming data
from the IR Host. Another 29-byte buffer is provided to
buffer data from the UART serial port. The MCP2140
can handle IR data and Host UART serial port data
simultaneously. A hardware handshaking pin (CTS) is
provided to inhibit the Host Controller from sending
serial data when the Host UART buffer is not available
(Figure 2-3). Figure 2-4 shows a flow chart for Host
UART flow control using the CTS signal.
Note:
FIGURE 2-3:
HARDWARE HANDSHAKING
When the CTS output signal goes high, the
UART FIFO will store up to 6 bytes. This is
to allow devices that have a slow response
time to a change on the CTS signal time to
stop sending additional data (such as a
modem).
HOST UART CTS SIGNAL AND THE RECEIVE BUFFER
CTS
Receive Buffer
IR Data Packet Transmitted
Full (29 Bytes)
Receive Buffer Empty
Receive Buffer Empty
MCP2140 Can Receive Data Receive Buffer Has 22 Bytes,
MCP2140 Can Receive Data
CTS Pin Driven High
IR Data Packet Starts Transmission
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 9
MCP2140
FIGURE 2-4:
HOST UART CTS FLOW CONTROL FLOWCHART
IR Flow Start
CTS Low?
N
Y
Transmit Byte
CTS Low?
Y
N
CNTR = 6
DTR Low?
N
Y
Lost IR Link
Transmit Byte
CTS Low?
Y
N
CNTR = CNTR - 1
CNTR = 0?
N
Y
DS21790B-page 10
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
2.5
Encoder/Decoder
The encoder converts the UART format data into the
IrDA Standard format data and the decoder converts
IrDA Standard format data into UART format data.
2.5.1
ENCODER (MODULATION)
The data that the MCP2140 UART received (on the TX
pin) that needs to be transmitted (on the TXIR pin) will
need to be modulated. This modulated signal drives the
IR transceiver module. Figure 2-5 shows the encoding
of the modulated signal.
Note:
Each bit time is comprised of 16-bit clocks. If the value
to be transmitted (as determined by the TX pin) is a
logic-low, the TXIR pin will output a low level for 7-bit
clock cycles, a logic high level for 3-bit clock cycles or
a minimum of 1.6 µsec (see Parameter IR121). The
remaining 6-bit clock cycles will be low. If the value to
transmit is a logic-high, the TXIR pin will output a low
level for the entire 16-bit clock cycles.
The signal on the TXIR pin does not actually line up in time with the bit value that
was transmitted on the TX pin, as shown in
Figure 2-5. The TX bit value is shown to
represent the value to be transmitted on
the TXIR pin.
FIGURE 2-5:
ENCODING
Start Bit
16 CLK
Data bit 0
Data bit 1
Data bit 2
Data bit ...
0
0
1
BITCLK
TX Bit
Value
7 CLK
TXIR
24 Tosc
0
 2003-2012 Microchip Technology Inc.
1
Preliminary
0
DS21790B-page 11
MCP2140
2.5.2
DECODER (DEMODULATION)
2.6
The modulated signal (data) from the IR transceiver
module (on RXIR pin) needs to be demodulated to
form the received data (on RX pin). Once demodulation of the data byte occurs, the data that is received is
transmitted by the MCP2140 UART (on the RX pin).
Figure 2-6 shows the decoding of the modulated
signal.
Note:
IR Port Baud Rate
The baud rate for the MCP2140 IR port (the TXIR and
RXIR pins) is fixed at the default rate of 9600 baud. The
Primary device will be informed of this parameter during NDM. The Host UART baud rate and the IR port
baud rate are the same.
The signal on the RX pin does not actually
line up in time with the bit value that was
received on the RXIR pin, as shown in
Figure 2-6. The RXIR bit value is shown to
represent the value to be transmitted on
the RX pin.
Each bit time is comprised of 16-bit clocks. If the value
to be received is a logic-low, the RXIR pin will be a low
level for the first 3-bit clock cycles, or a minimum of
1.6 µs. The remaining 13-bit clock cycles (or difference
up to the 16-bit clock time) will be high. If the value to
be received is a logic-high, the RXIR pin will be a high
level for the entire 16-bit clock cycles. The level on the
RX pin will be in the appropriate state for the entire 16
clock cycles.
FIGURE 2-6:
DECODING
Start Bit
Data bit 0
Data bit 1
Data bit 2
Data bit ...
16 CLK
16 CLK
16 CLK
0
0
16 CLK
BITCLK
(CLK)
RXIR Bit Value
RXPD
RXPDREF
 13 CLK
 1.6 µs (up to 3 CLK)
16 CLK
16 CLK
16 CLK
RX
0
DS21790B-page 12
1
Preliminary
1
0
 2003-2012 Microchip Technology Inc.
MCP2140
2.7
2.7.1
IrDA DATA PROTOCOLS
SUPPORTED BY MCP2140
The MCP2140 supports these required IrDA standard
protocols:
• Physical Signaling Layer (PHY)
• Link Access Protocol (IrLAP)
• Link Management Protocol/Information Access
Service (IrLMP/IAS)
The MCP2140 also supports some of the optional protocols for IrDA standard data. The optional protocols
implemented by the MCP2140 are:
• Tiny TP
• IrCOMM
IRCOMM
IrCOMM provides the method to support serial and parallel port emulation. This is useful for legacy COM
applications, such as printers and modem devices.
The IrCOMM standard is a syntax that allows the Primary device to consider the Secondary device a serial
device. IrCOMM allows for emulation of serial or parallel (printer) connections of various capabilities. The
MCP2140 supports the 9-wire “cooked” service class of
IrCOMM. Other service classes supported by IrCOMM
are shown in Figure 2-8.
The IrDA protocol for printer support is not included in
the IrCOMM 9-wire “cooked” service class.
Figure 2-7 shows the IrDA data protocol stack and
those components implemented by the MCP2140.
FIGURE 2-7:
IrDA DATA - PROTOCOL
STACKS
IrObex IrLan IrComm (1)
IrTran-P
IrMC
Tiny Transport Protocol (Tiny TP)
LM-IAS
IR Link Management - Mux (IrLMP)
IR Link Access Protocol (IrLAP)
Asynchronous
Synchronous Synchronous
4 PPM
Serial IR
Serial IR (2, 3)
(4
Mb/s)
(1.152
Mb/s)
(9600 -115200 b/s)
Supported by
the MCP2140
Optional IrDA data
protocols not
supported by
the MCP2140
Note 1: The MCP2140 implements the 9-wire
“cooked” service class serial replicator.
2: The MCP2140 is fixed at 9600 baud
3: An optical transceiver is required.
FIGURE 2-8:
IRCOMM SERVICE CLASSES
IrCOMM Services
Uncooked Services
Cooked Services
Parallel
Serial
Parallel
Serial
IrLPT
3-wire Raw
Centronics
3-wire Cooked
IEEE 1284
9-wire Cooked
Supported by MCP2140
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 13
MCP2140
2.8
2.8.1
Minimizing Power
During IR communication between a Primary Device
and the MCP2140, the MCP2140 is in an operational
mode. In this mode, the MCP2140 consumes the
operational current (Parameter D010).
For many applications, the time that IR communication
is occurring is a small percentage of the applications
operational time. The ability for the IR controller to be
in a low power mode during this time will save on the
applications power consumption. The MCP2140 will
automatically enter a low power mode once IR activity
has stopped and will return to operational mode once
IR activity is detected on the RXPD and RXPDREF
pins.
AUTOMATIC LOW POWER MODE
The Automatic Low Power mode allows the system to
achieve the lowest possible operating current.
When the IR link has been “closed”, the protocol handler state machine returns to the Normal Disconnect
Mode (NDM). During NDM, if no IR activity occurs for
about 10 seconds, the device is disabled and enters
into Low Power mode. In this mode, the device oscillator is shut down and the PHACT pin will be low 
(Parameter D010A).
Table 2-3 shows the MCP2140 current. These are
specified in Parameter D010 and Parameter D010A.
TABLE 2-3:
Another way to minimize system power is to use an I/O
pin of the Host Controller to enable power to the IR
circuity
DEVICE MAXIMUM
OPERATING CURRENT
Mode
Current
PHACT = H
2.2 mA
IR communications is
occurring.
PHACT = L
60 µA
No IR communications.
Note:
2.8.2
Comment
Additional system current is from the
Receiver/Transmitter circuitry.
RETURNING TO DEVICE
OPERATION
The device will exit the Low Power mode when the
RXPD pin voltage crosses the REPDREF pin reference
voltage.
A device reset will also cause the MCP2140 to exit Low
Power mode. After device initialization, if no IR activity
occurs for about 10 seconds, the device is disabled and
returns into the Low Power mode.
Note:
2.9
For proper operation, the device oscillator
must be within oscillator specification in
the
time
frame
specified
in
Parameter IR140.
PHACT Signal
The PHACT signal indicates that the MCP2140 Protocol Handler is active. This output pin is an open collector, so when interfacing to the Host Controller, a pull-up
resistor is required.
DS21790B-page 14
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
2.10
TABLE 2-4:
Buffers and Throughput
The IR data rate of the MCP2140 is fixed at 9.6 kbaud.
The actual throughput will be less due to several factors. The most significant factors are under the control
of the developer. One factor beyond the control of the
designer is the overhead associated with the IrDA
standard. A throughput example is shown in Table 2-4.
Figure 2-9 shows the CTS waveform, what the state of
the buffers can be and the operation of the Host UART
and IR interfaces.
Figure 2-10 shows the screen-capture of a Host Controller transmitting 240 bytes. Data is not transmitted
after CTS goes high (so only a maximum of 23 bytes of
the 29 byte buffer are utilized). Between data packets,
the CTS time can vary, depending on the Primary
Device (see blue circled CTS pulse in Figure 2-10).
FIGURE 2-9:
Bytes
Transferred
THROUGHPUT
(3)
Bytes/
CTS Low
Time (S)
Effective
Baud Rate
240
23 (max) (1)
0.810133
2962 (1)
240
29
0.6500
3692 (2)
Note 1: Measured from Figure 2-10.
2: Interpolated from Figure 2-10.
3: 10 bits transferred for each byte.
Note:
IrDA throughput is based on many factors
associated with characteristics of the Primary and Secondary devices. These characteristics may cause your throughput to
be more or less than is shown in Table 2-4.
HOST UART RECEIVE BUFFER AND CTS WAVEFORM
CTS
Receive Buffer
IR Data Packet Transmitted
Full (29 Bytes)
Receive Buffer Empty
Receive Buffer Empty
MCP2140 Can Receive Data Receive Buffer Has 22 Bytes,
MCP2140 Can Receive Data
CTS Pin Driven High
IR Data Packet Starts Transmission
FIGURE 2-10:
HOST CONTROLLER TRANSMISSION OF A 240 BYTE PACKET
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 15
MCP2140
2.10.1
IMPROVING THROUGHPUT
2.10.1.1
From the Primary Device
Actual maximum throughput is dependent on several
factors, including:
The MCP2140 uses a fixed IR Receiver data block size
of 64 bytes.
• Characteristics of the Primary device
• Characteristics of the MCP2140
• IrDA standard protocol overhead
The minimum size frame the Primary device can
respond with is 6 bytes.
The IrDA standard specifies how the data is passed
between the Primary device and Secondary device. In
IrCOMM, an additional 8 bytes are used by the protocol
for each packet transfer.
The MCP2140 uses a fixed Host UART Receiver data
block size of 29 bytes.
2.10.1.2
The most significant factor in data throughput is how
well the data frames are filled. If only 1 byte is sent at a
time, the throughput overhead of the IrCOMM protocol
is 89% (see Table 2-5). The best way to maximize
throughput is to align the amounts of data with the
receive buffer (IR and Host UART) packet size of the
MCP2140.
Then there is the delay between when data packets
are sent and received. See Figure 2-10 for an example
of this delay (look at CTS signal falling edges). In this
screen capture, a Palm™ m105 is receiving a 240byte string of data from the MCP2140. When the CTS
signal goes high, the Host Controller stops sending
data (23 bytes per CTS low-time). The CTS falling
edge to CTS falling edge is approximately 90 ms (typical). This CTS high-time affects the total data throughput. The CTS high-time will be dependant on the
characteristics of the Primary device.
TABLE 2-5:
2.11
From the MCP2140
Turnaround Latency
An IR link can be compared to a one-wire data connection. The IR transceiver can transmit or receive, but not
both at the same time. A delay of one bit time is recommended between the time a byte is received and
another byte is transmitted.
2.12
Device ID
The MCP2140 has a fixed Device ID. This Device ID is
“MCP2140 xx”, with the xx indicating the silicon
revision of the device.
IRCOMM OVERHEAD %
Data
Packet IrCOMM IrCOMM
Size Overhead Overhead
MCP2140 (Bytes) (Bytes)
% (1)
Comment
IR
Receive
64
8
11 %
Note 2
1
8
89 %
Host
UART
Receive
29
8
22 %
Note 3
23
8
26 %
Note 4
1
8
89 %
Note 1: Overhead % = 
Overhead/(Overhead + Data).
2: The maximum number of bytes of the IR
Receive buffer.
3: The maximum number of bytes of the
Host UART Receive buffer.
4: The CTS signal is driven high at 23 byte.
DS21790B-page 16
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
2.13
2.13.2
Optical Interface
The MCP2140 requires an infrared transceiver for the
optical interface. This transceiver can be a single-chip
solution (integrated) or be implemented with discrete
devices.
2.13.1
DISCRETE TRANSCEIVER
SOLUTION
The MCP2140 was designed to use a discrete implementation that allows the lowest system power
consumption as well as a low cost implementation.
Figure 2-12 shows
transceiver circuit.
FIGURE 2-11:
a
typical
discrete
optical
CIRCUIT FOR A
DISCRETE OPTICAL
TRANSCEIVER
INTEGRATED TRANSCEIVER
The MCP2140 was designed to use a discrete implementation that allows the lowest system power consumption and a low cost implementation (see
Section 2.13.1, “Discrete Transceiver Solution”). It is
possible to use an integrated optical transceiver solution, with the addition of four components. Two components are required to condition the input signal to
ensure that the RXIR pulse width is not greater than
1.5 µs (see Parameter IR131A). The other two components are required to set the RXIR signal trip point
(typically VDD/2). Figure 2-12 shows an example
MCP2140 optical transceiver circuit, using a Vishay®/
Temic TFDS4500.
FIGURE 2-12:
This figure will be available in Revision B of the
MCP2140 data sheet. Please conact the Microchip
factory via email ([email protected])
for additional information.
CIRCUIT FOR AN
INTEGRATED OPTICAL
TRANSCEIVER
+5 V
R14 (2)
10 k
R15 (2)
10 k
Care must be taken in the design and layout of the
photo-detect circuit, due to the small signals that are
being detected and their sensitivity to noise.
+5 V
RXPDREF
(To MCP2140 Pin 1)
Q1 (1)
MUN211T1
C19 (1)
RXPD
68 pF
(To MCP2140 Pin 18)
+5 V
+5 V
R11
22
U6
R13
47
C18
.1 µF
1
2
3
4
8
7
6
5
TXIR
(To MCP2140 Pin 2)
TFDS4500
Note 1: These components are used to control
the width of the TFDS4500 RXD output
signal. Q1 is a digital transistor, which
includes the bias resistors.
2: These components are used to set the
reference voltage that the RXPD signal
needs to cross to “detect” a bit.
Table 2-6 shows a list of common manufacturers of
integrated optical transceivers.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 17
MCP2140
2.14
How The MCP2140 Connects
When two devices, implementing the IrDA standard
feature, establish a connection using the IrCOMM protocol, the process is analogous to connecting two
devices with serial ports using a cable. This is referred
to as a “point-to-point” connection. This connection is
limited to half-duplex operation because the IR transceiver cannot transmit and receive at the same time.
The purpose of the IrDA standard protocol is to allow
this half-duplex link to emulate, as much as possible, a
full-duplex connection. In general, this is done by dividing the data into “packets”, or groups of data. These
packets can be sent back and forth, when needed,
without risk of collision. The rules of how and when
these packets are sent constitute the IrDA standard
protocol. The MCP2140 supports elements of this IrDA
standard protocol to communicate with other IrDA standard compatible devices.
When a wired connection is used, the assumption is
made that both sides have the same communications
parameters and features. A wired connection has no
need to identify the other connector because it is
assumed that the connectors are properly connected.
According to the IrDA standard, a connection process
has been defined to identify other IrDA standard compatible devices and establish a communication link.
There are three steps that these two devices go
through to make this connection. They are:
• Normal Disconnect Mode (NDM)
• Discovery Mode
• Normal Connect Mode (NCM)
ports. If you used such a cell phone with a Personal
Digital Assistant (PDA), the PDA that supports the IrDA
standard feature would be the Primary device and the
cell phone would be the Secondary device.
When a Primary device polls for another device, a
nearby Secondary device may respond. When a Secondary device responds, the two devices are defined to
be in the Normal Disconnect Mode (NDM) state. NDM
is established by the Primary device broadcasting a
packet and waiting for a response. These broadcast
packets are numbered. Usually, 6 or 8 packets are sent.
The first packet is number 0, while the last packet is
usually numbered 5 or 7. Once all the packets are sent,
the Primary device sends an ID packet, which is not
numbered.
The Secondary device waits for these packets and then
responds to one of the packets. The packet responds
to determine the “timeslot” to be used by the Secondary
device. For example, if the Secondary device responds
after packet number 2, the Secondary device will use
timeslot 2. If the Secondary device responds after
packet number 0, the Secondary device will use timeslot 0. This mechanism allows the Primary device to recognize as many nearby devices as there are timeslots.
The Primary device will continue to generate timeslots
and the Secondary device should continue to respond,
even if there’s nothing to do.
Note 1: The MCP2140 can only be used to
implement a Secondary device.
2: The MCP2140 supports a system with
only one Secondary device having
exclusive use of the IrDA standard infrared link (known as “point-to-point”
communication).
Figure 2-13 shows the connection sequence.
2.14.1
NORMAL DISCONNECT MODE
(NDM)
When two IrDA standard compatible devices come into
range, they must first recognize each other. The basis
of this process is that one device has some task to
accomplish and the other device has a resource
needed to accomplish this task. One device is referred
to as a Primary device while the other is referred to as
a Secondary device. The distinction between Primary
device and Secondary device is important because it is
the responsibility of the Primary device to provide the
mechanism to recognize other devices. So the Primary
device must first poll for nearby IrDA standard compatible devices and, during this polling, the default baud
rate of 9600 baud is used by both devices.
3: The MCP2140 always responds to packet
number 0. This means that the MCP2140
will always use timeslot 0.
4: If another Secondary device is nearby,
the Primary device may fail to recognize
the MCP2140, or the Primary device may
not recognize either of the devices.
During NDM, the MCP2140 handles all responses to
the Primary device (Figure 2-13) without any communication with the Host Controller. The Host Controller is
inhibited by the CTS signal of the MCP2140 from
sending data to the MCP2140.
For example, if you want to print from an IrDA-equipped
laptop to an IrDA-equipped printer, utilizing the IrDA
standard feature, you would first bring your laptop in
range of the printer. In this case, the laptop is the one
that has something to do and the printer has the
resource to do it. Thus, the laptop is called the Primary
device and the printer is the Secondary device. Some
data-capable cellphones have IrDA standard infrared
DS21790B-page 18
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
2.14.2
DISCOVERY MODE
2.14.3
Discovery mode allows the Primary device to determine the capabilities of the MCP2140 (Secondary
device). Discovery mode is entered once the MCP2140
(Secondary device) has sent a XID response to the Primary device and the Primary device has completed
sending the XIDs and a Broadcast ID. If this sequence
is not completed, a Primary and Secondary device can
stay in NDM indefinitely.
When the Primary device has something to do, it
initiates Discovery, which has two parts. They are:
• Link initialization
• Resource determination
The first step is for the Primary and Secondary devices
to determine, and then adjust to, each other’s hardware
capabilities. These capabilities are parameters like:
•
•
•
•
Data rate
Turnaround time
Number of packets without a response
How long to wait before disconnecting
Note:
Once discovery has been completed, the Primary
device and MCP2140 (Secondary device) can freely
exchange data.
The MCP2140 uses a hardware handshake to stop the
local serial port from sending data when the MCP2140
Host UART Receiving buffer is full..
Note:
The MCP2140 is limited to a data rate of
9.6 kbaud.
Once the hardware parameters are established, the
Primary device must determine if the Secondary device
has the resources it requires. If the Primary device has
a job to print, it must know if it’s talking to a printer, and
not a modem or other device. This determination is
made using the Information Access Service (IAS). The
job of the Secondary device is to respond to IAS queries made by the Primary device. The Primary device
must ask a series of questions like:
Data loss will result if this hardware
handshake is not observed.
Both the Primary device and the MCP2140 (Secondary
device) check to make sure that data packets are
received by the other without errors. Even when data is
not required to be sent, the Primary and Secondary
devices will still exchange packets to ensure that the
connection hasn’t, unexpectedly, been dropped. When
the Primary device has finished, it transmits the “close
link” command to the MCP2140 (Secondary device).
The MCP2140 will confirm the “close link” command
and both the Primary device and the MCP2140 (Secondary device) will revert to the NDM state.
Note:
Both the Primary and Secondary devices begin communications at 9600 baud, the default baud rate. The
Primary device sends its parameters and the Secondary device responds with its parameters. For example,
if the Primary device supports all data rates up to
115.2 kbaud and the Secondary device only supports
9.6 kbaud, the link will be established at 9.6 kbaud.
NORMAL CONNECT MODE (NCM)
If the NCM mode is unexpectedly terminated for any reason (including the Primary
device not issuing a close link command),
the MCP2140 will revert to the NDM state
approximately 10 seconds after the last
frame has been received.
It is the responsibility of the Host Controller program to
understand the meaning of the data received and how
the program should respond to it. It’s just as if the data
were being received by the Host Controller from a
UART.
2.14.3.1
Primary Device Notification
The MCP2140 identifies itself to the Primary device as
a modem.
Note:
The MCP2140 identifies itself as a modem
to ensure that it is identified as a serial
device with a limited amount of memory.
However, the MCP2140 is not a modem, and the nondata circuits are not handled in a modem fashion.
• What is the name of your service?
• What is the address of this service?
• What are the capabilities of this device?
When all the Primary device’s questions are answered,
the Primary device can access the service provided by
the Secondary device.
During Discovery mode, the MCP2140 handles all
responses to the Primary device (see Figure 2-13)
without any communication with the Host Controller.
The Host Controller is inhibited by the CTS signal of the
MCP2140 from sending data to the MCP2140.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 19
MCP2140
FIGURE 2-13:
HIGH LEVEL MCP2140 CONNECTION SEQUENCE
Primary Device
MCP2140
(Secondary Device)
Normal Disconnect Mode (NDM)
No IR Activity
(for 10 seconds)
PHACT pin driven Low
Send XID Commands
(timeslots n, n+1, ...)
(approximately 70 ms
between XID commands)
PHACT pin driven High
No Response
XID Response in timeslot y,
claiming this timeslot, (MCP214X
always claims timeslot 0)
Finish sending XIDs
(max timeslots - y frames)
No Response to these XIDs
Broadcast ID
No Response to Broadcast ID
Discovery
Send SNRM Command
(w/ parameters and
connection address)
UA response with parameters
using connect address
Open channel for IAS Queries
Confirm channel open for IAS
Send IAS Queries
Provide IAS responses
Open channel for data
Confirm channel open for data
(MCP2140 DSR pin driven low)
Normal Response Mode (NRM)
Send Data or Status
Send Data or Status
Send Data or Status
Send Data or Status
Shutdown link
Confirm shutdown
(back to NDM state)
No IR Activity
(for 10 seconds)
DS21790B-page 20
PHACT pin driven Low
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
2.15
References
The IrDA Standards download page can be found at:
http://www.irda.org/standards/specifications
Some common manufacturers of optical transceivers
are shown in Table 2-6.
TABLE 2-6:
Company
Sharp
®
Infineon®
COMMON OPTICAL
TRANSCEIVER
MANUFACTURERS
Company Web Site Address
www.sharpsma.com
www.infineon.com
®
www.agilent.com
Vishay®/Temic
www.vishay.com
Rohm
www.rohm.com
Agilent
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 21
MCP2140
NOTES:
DS21790B-page 22
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
3.0
DEVELOPMENT TOOLS
An MCP2140 Demo/Development board is planned.
Please check with the Microchip Technology Inc. web
site (www.microchip.com) or your local Microchip sales
office for product availability.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 23
MCP2140
NOTES:
DS21790B-page 24
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
4.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Ambient Temperature under bias ........................................................................................................... –40°C to +125°C
Storage Temperature ............................................................................................................................. –65°C to +150°C
Voltage on VDD with respect to VSS ........................................................................................................... -0.3V to +7.5V
Voltage on RESET with respect to VSS ...................................................................................................... -0.3V to +14V
Voltage on all other pins with respect to VSS ................................................................................. –0.3V to (VDD + 0.3V)
Total Power Dissipation (1) ...........................................................................................................................................1W
Max. Current out of VSS pin ..................................................................................................................................300 mA
Max. Current into VDD pin .....................................................................................................................................250 mA
Input Clamp Current, IIK (VI < 0 or VI > VDD)  20 mA
Output Clamp Current, IOK (V0 < 0 or V0 > VDD) 20 mA
Max. Output Current sunk by any Output pin..........................................................................................................25 mA
Max. Output Current sourced by any Output pin.....................................................................................................25 mA
Note 1: Power Dissipation is calculated as follows: PDIS = VDD x {IDD -  IOH} +  {(VDD-VOH) x IOH} + (VOL x IOL)
†NOTICE:
Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 25
MCP2140
VOLTAGE-FREQUENCY GRAPH, -40C  TA  +85C
FIGURE 4-1:
6.0
5.5
5.0
VDD
(Volts)
4.5
4.0
3.5
3.0
2.5
0
4
8
7.3728
10
12
16
20
Frequency (MHz)
DS21790B-page 26
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
4.1
DC Characteristics
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified)
Operating Temperature: -40C  TA  +85C (industrial)
DC Specifications
Param.
No.
Sym
D001
VDD
D002
VDR
D003
Min
Typ(1)
Max
Units
Supply Voltage
3.0
—
5.5
V
See Figure 4-1
RAM Data Retention 
Voltage (2)
2.0
—
—
V
Device Oscillator/Clock stopped
VPOR
VDD Start Voltage to
ensure Power-on Reset
—
VSS
—
V
D004
SVDD
VDD Rise Rate to
ensure Power-on Reset
0.05
—
—
V/ms
D010
D010A
IDD
—
—
—
25
2.2
60
mA
µA
Characteristic
Supply Current (3, 4)
Conditions
VDD = 3.0V, PHACT = H
VDD = 3.0V, PHACT = L
Note 1: Data in the Typical (“Typ”) column is based on characterization results at 25C. This data is for design 
guidance only and is not tested.
2: This is the limit to which VDD can be lowered without losing RAM data.
3: When the device is in IR communication (PHACT pin is high), supply current is mainly a function of the
operating voltage and frequency. Pin loading, pin rate and temperature have an impact on the current consumption.The test conditions for all IDD measurements are made when device is: 
OSC1 = external square wave, from rail-to-rail; all input pins pulled to VSS, RXIR = VDD, RESET = VDD;
4: When the device is in low power mode (PHACT pin is low), current is measured with all input pins tied to
VDD or VSS and the output pins driving a high or low level into infinite impedance.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 27
MCP2140
4.1
DC Characteristics (Continued)
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified)
Operating temperature: -40°C  TA  +85°C (industrial)
Operating voltage VDD range as described in DC spec Section 4.1.
DC Specifications
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
VSS
VSS
Conditions
—
0.8V
V
4.5V  VDD 5.5V
—
0.15 VDD
V
otherwise
Input Low Voltage
VIL
D030
Input pins
with TTL buffer
(TX, RI, DTR, RTS, and CD)
D030A
D032
RESET
VSS
—
0.2 VDD
V
D033
OSC1
VSS
—
0.3 VDD
V
Input High Voltage
VIH
D040
Input pins
with TTL buffer
(TX, RI, DTR, RTS, and CD)
D040A
—
2.0
—
VDD
V
4.5V  VDD 5.5V
0.25 VDD
+ 0.8
—
VDD
V
otherwise
D042
RESET
0.8 VDD
—
VDD
V
D043
OSC1
0.7 VDD
—
VDD
V
Input pins
—
—
±1
µA
VSS VPIN VDD, pin at 
high-impedance.
D061
RESET
—
—
±5
µA
VSS VPIN VDD
D063
OSC1
—
—
±5
µA
VSS VPIN VDD
TXIR, RX, DSR, and CTS pins
—
—
0.6
V
IOL = 8.5 mA, VDD = 4.5V
OSC2
—
—
0.6
V
IOL = 1.6 mA, VDD = 4.5V
TXIR, RX, DSR, and CTS pins
VDD - 0.7
—
—
V
IOH = -3.0 mA, VDD = 4.5V
OSC2
VDD - 0.7
—
—
V
IOH = -1.3 mA, VDD = 4.5V
—
—
15
pF
When external clock is
used to drive OSC1.
—
—
50
pF
Input Leakage Current
(Notes 1, 2)
D060
IIL
Output Low Voltage
D080
VOL
D083
Output High Voltage (Note 2)
D090
VOH
D092
Capacitive Loading Specs on
Output Pins
D100
D101
COSC2 OSC2 pin
CIO
All Input or Output pins
Note 1: The leakage current on the RESET pin is strongly dependent on the applied voltage level. The specified
levels represent normal operating conditions. Higher leakage current may be measured at different input
voltages.
2: Negative current is defined as coming out of the pin.
DS21790B-page 28
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
4.2
Timing Parameter Symbology and Load Conditions
The timing parameter symbols have been created following one of the following formats:
4.2.1
TIMING CONDITIONS
The temperature and voltages specified in Table 4-2 apply to all timing specifications, unless otherwise noted. 
Figure 4-2 specifies the load conditions for the timing specifications.
TABLE 4-1:
SYMBOLOGY
1. TppS2ppS
T
F
Frequency
E
Error
Lowercase letters (pp) and their meanings:
pp
io
Input or Output pin
rx
Receive
bitclk
RX/TX BITCLK
drt
Device Reset Timer
Uppercase letters and their meanings:
S
F
Fall
H
High
I
Invalid (high-impedance)
L
Low
TABLE 4-2:
T
Time
osc
tx
RST
Oscillator
Transmit
Reset
P
R
V
Z
Period
Rise
Valid
High-impedance
AC TEMPERATURE AND VOLTAGE SPECIFICATIONS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise stated):
Operating temperature: -40C  TA  +85C (industrial)
Operating voltage VDD range as described in DC spec Section 4.1.
AC Specifications
FIGURE 4-2:
2. TppS
LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS
CL
Pin
CL = 50 pF for all pins except OSC2
15 pF for OSC2 when external clock is used to drive OSC1
VSS
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 29
MCP2140
4.3
Timing Diagrams and Specifications
FIGURE 4-3:
EXTERNAL CLOCK TIMING
Q4
Q1
Q3
Q2
Q4
Q1
OSC1
1
3
3
4
4
2
TABLE 4-3:
EXTERNAL CLOCK TIMING REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40C  TA  +85C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
Sym
Characteristic
Min
Typ(1)
Max
Units
1
TOSC
External CLKIN Period (2, 3)
90.422
90.422
—
—
90.422
—
ns
ns
Oscillator Period (2)
90.422
—
90.422
ns
7.3728
7.3728
7.3728
MHz
7.3728
—
7.3728
MHz
1A
FOSC External CLKIN
Frequency (2, 3)
Oscillator Frequency (2)
1B
FERR Error in Frequency
—
—
± 0.01
%
1C
ECLK
—
—
± 0.01
%
—
—
15
ns
4
External Clock Error
TosR, Clock in (OSC1) 
TosF Rise or Fall Time
Conditions
Device Operation
Low Power mode 
(PHACT drive Low)
Note 1: Data in the Typical (“Typ”) column is at 5V, 25C unless otherwise stated. These parameters are for design
guidance only and are not tested.
2: All specified values are based on oscillator characterization data under standard operating conditions.
Exceeding these specified limits may result in unstable oscillator operation and/or higher than expected
current consumption. When an external clock input is used, the “max” cycle time limit is “DC” (no clock) for
all devices.
3: A duty cycle of no more than 60% (High time/Low time or Low time/High time) is recommended for external
clock inputs.
DS21790B-page 30
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
FIGURE 4-4:
OUTPUT WAVEFORM
Q1
Q4
Q2
Q3
OSC1
Output Pin
New Value
Old Value
20, 21
Note:
TABLE 4-4:
Refer to Figure 4-2 for load conditions.
OUTPUT TIMING REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40C  TA  +85C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
Sym
Characteristic
Min
Typ(1)
Max
Units
20
ToR
RX and TXIR pin rise time (2)
—
10
40
ns
21
ToF
RX and TXIR pin fall time (2)
—
10
40
ns
Conditions
Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated.
2: See Figure 4-2 for loading conditions.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 31
MCP2140
FIGURE 4-5:
RESET AND DEVICE RESET TIMING
VDD
RESET
30
Reset
Detected
33
PWRT
Timeout
32
OSC
Timeout
Internal
RESET
34
34
Output Pin
TABLE 4-5:
RESET AND DEVICE RESET REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40C  TA  +85C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
Sym
Characteristic
Min
Typ(1)
Max
Units
30
TRSTL RESET Pulse Width (low)
2000
—
—
ns
32
TOST
1024
—
1024
TOSC
28
72
132
ms
—
—
2
µs
33
34
Oscillator Start-up Timer Period
TPWRT Power up Timer Period
TIOZ
Output High-impedance from
RESET Low or device Reset
Conditions
VDD = 5.0V
VDD = 5.0V
Note 1: Data in the Typical (“Typ”) column is at 5V, 25C unless otherwise stated.
DS21790B-page 32
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
FIGURE 4-6:
UART ASYNCHRONOUS TRANSMISSION WAVEFORM
Start Bit
Data Bit
IR100
IR100
Data Bit
IR100
Data Bit
IR100
TX pin
IR103
IR103
Note:
TABLE 4-6:
Refer to Figure 4-2 for load conditions.
UART ASYNCHRONOUS TRANSMISSION REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40C  TA  +85C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
Sym
Characteristic
Min
Typ
Max
Units
768
—
768
TOSC
—
—
±2
%
IR102 ETXIRBIT Transmit (TXIR pin) Baud rate
Error (out of MCP2140) (1)
—
—
±1
%
IR103
—
—
25
ns
IR100
TTXBIT Transmit Baud rate
IR101
ETXBIT Transmit (TX pin) Baud rate
Error (into MCP2140)
TTXRF TX pin rise time and fall time
Conditions
BAUD2:BAUD0 = 00
Note 1: This error is not additive to IR101 parameter.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 33
MCP2140
FIGURE 4-7:
UART ASYNCHRONOUS RECEIVE TIMING
Start Bit
Data Bit
Data Bit
Data Bit
IR110
IR110
IR110
IR110
RX pin
IR113
IR113
Note:
Refer to Figure 4-2 for load conditions.
TABLE 4-7:
UART ASYNCHRONOUS RECEIVE REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40°C  TA  +85×C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
Sym
Characteristic
Min
Typ
Max
Units
TOSC BAUD2:BAUD0 = 00
IR110
TRXBIT Receive Baud Rate
768
—
768
IR111
ERXBIT Receive (RXPD and RXPDREF pin
detection) Baud rate Error (into MCP2140)
—
—
±1
%
IR112
ERXBIT Receive (RX pin) Baud rate Error (out of
MCP2140) (1)
—
—
±1
%
IR113
TTXRF RX pin rise time and fall time
—
—
25
ns
Conditions
Note 1: This error is not additive to the IR111 parameter.
DS21790B-page 34
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
FIGURE 4-8:
TXIR WAVEFORMS
Start Bit
Data bit 7
Data bit 6
Data bit 5
Data bit ...
IR100A
BITCLK
IR122
IR122
IR122
IR122
IR122
IR122
TXIR
IR121
0
TABLE 4-8:
1
0
0
1
0
TXIR REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40C  TA  +85C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
Sym
IR100A
TTXIRBIT
IR121
IR122
Characteristic
Min
Typ
Max
Units
Transmit Baud Rate
768
—
768
TOSC
TTXIRPW
TXIR pulse width
24
—
24
TOSC
TTXIRP
TXIR bit period (1)
—
16
—
TBITCLK
Conditions
BAUD = 9600
Note 1: TBITCLK = TTXBIT/16.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 35
MCP2140
FIGURE 4-9:
RXPD/RXPDREF WAVEFORMS
Start Bit
Data bit 7
Data bit 6
Data bit 5
Data bit ...
IR131B
IR131B
IR131B
IR131B
0
Data bit 6
0
Data bit 5
1
Data bit ...
IR110A
BITCLK
RXPD
RXPDREF
IR131A
IR131B
0
Start Bit
1
Data bit 7
RXPD
RXPD
RXPDREF
RXPDREF
IR131B
IRD160
IRD161
IRD160
IRD161
TABLE 4-9:
RXPD/RXPDREF REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40C  TA  +85C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
Min
Typ
Max
Units
IR110A TRXPDBIT Receive Baud Rate
768
—
768
TOSC
IR131A TRXPDPW RXPD pulse width
0.01
—
1.5
µs
—
16
—
TBITCLK
IRD060 VRXPDD Quiescent Delta Voltage
between RXPD and 
RXPDREF
20
—
—
mV
IRD061 VRXPDE IR Pulse Detect Delta Voltage
(RXPD to RXPDREF)
30
—
—
mV
—
—
400 *
ns
IR132
IR133
Sym
Characteristic
TRXPDP RXPD/RXPDREF bit period (1)
TRESP
0
Response Time (2)
Conditions
BAUD = 9600
RXPD signal must cross
RXPDREF signal level
* These parameters characterized but not tested.
Note 1: TBITCLK = TRXBIT/16.
2: Response time measured with RXPDREF at (VDD - 1.5V)/2, while RXPD transitions from VSS to VDD.
DS21790B-page 36
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
FIGURE 4-10:
LOW POWER WAVEFORM
OSC1
RXPD
RXPDREF
IR140
TABLE 4-10:
LOW POWER REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40C  TA  +85C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
IR140
Sym
Characteristic
TRXPD2OSC RXPD pulse edge to valid
device oscillator (1)
Min
Typ
Max
Units
—
—
4
ms
Conditions
Note 1: At 9600 Baud, 4 ms is 4 bytes (of the 11 byte repeated SOF character). This allows the MCP2140 to
recognize a SOF character and properly receive the IR packet.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 37
MCP2140
NOTES:
DS21790B-page 38
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
5.0
DC AND AC CHARACTERISTICS GRAPHS AND TABLES
Not available at this time.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 39
MCP2140
NOTES:
DS21790B-page 40
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
18-Lead PDIP (300 mil)
Example:
XXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXX
XXXXXYYWWNNN
MCP2140-I/P
XXXXXXXXXXXXXXXXX
XXXXX0352987
18-Lead SOIC (300 mil)
Example:
MCP2140-I/SO
XXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXX
XXXXX0352987
XXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXX
XXXXXYYWWNNN
20-Lead SSOP (209 mil, 5.30 mm)
XXXXXXXXXXX
MCP2140
XXXXXXXXXXX
I/SS
XXX0352987
XXXYYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Example:
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 41
MCP2140
18-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
E1
D
2
n

1
E
A2
A
L
c
A1
B1

p
B
eB
Units
Dimension Limits
n
p
MIN
INCHES*
NOM
18
.100
.155
.130
MAX
MILLIMETERS
NOM
18
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
22.61
22.80
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
Number of Pins
Pitch
Top to Seating Plane
A
.140
.170
Molded Package Thickness
A2
.115
.145
Base to Seating Plane
A1
.015
Shoulder to Shoulder Width
E
.300
.313
.325
Molded Package Width
E1
.240
.250
.260
Overall Length
D
.890
.898
.905
Tip to Seating Plane
L
.125
.130
.135
c
Lead Thickness
.008
.012
.015
Upper Lead Width
B1
.045
.058
.070
Lower Lead Width
B
.014
.018
.022
Overall Row Spacing
§
eB
.310
.370
.430

Mold Draft Angle Top
5
10
15

Mold Draft Angle Bottom
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-007
DS21790B-page 42
Preliminary
MAX
4.32
3.68
8.26
6.60
22.99
3.43
0.38
1.78
0.56
10.92
15
15
 2003-2012 Microchip Technology Inc.
MCP2140
18-Lead Plastic Small Outline (SO) – Wide, 300 mil (SOIC)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
E
p
E1
D
2
B
n
1
h

45
c
A2
A


L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
A
A2
A1
E
E1
D
h
L

c
B


MIN
.093
.088
.004
.394
.291
.446
.010
.016
0
.009
.014
0
0
A1
INCHES*
NOM
18
.050
.099
.091
.008
.407
.295
.454
.020
.033
4
.011
.017
12
12
MAX
.104
.094
.012
.420
.299
.462
.029
.050
8
.012
.020
15
15
MILLIMETERS
NOM
18
1.27
2.36
2.50
2.24
2.31
0.10
0.20
10.01
10.34
7.39
7.49
11.33
11.53
0.25
0.50
0.41
0.84
0
4
0.23
0.27
0.36
0.42
0
12
0
12
MIN
MAX
2.64
2.39
0.30
10.67
7.59
11.73
0.74
1.27
8
0.30
0.51
15
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-013
Drawing No. C04-051
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 43
MCP2140
20-Lead Plastic Shrink Small Outline (SS) – 209 mil, 5.30 mm (SSOP)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
E
E1
p
D
B
2
1
n

c
A2
A

L
A1

Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Foot Length
Lead Thickness
Foot Angle
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
A
A2
A1
E
E1
D
L
c

B


MIN
.068
.064
.002
.299
.201
.278
.022
.004
0
.010
0
0
INCHES*
NOM
20
.026
.073
.068
.006
.309
.207
.284
.030
.007
4
.013
5
5
MAX
.078
.072
.010
.322
.212
.289
.037
.010
8
.015
10
10
MILLIMETERS
NOM
20
0.65
1.73
1.85
1.63
1.73
0.05
0.15
7.59
7.85
5.11
5.25
7.06
7.20
0.56
0.75
0.10
0.18
0.00
101.60
0.25
0.32
0
5
0
5
MIN
MAX
1.98
1.83
0.25
8.18
5.38
7.34
0.94
0.25
203.20
0.38
10
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MO-150
Drawing No. C04-072
DS21790B-page 44
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
APPENDIX A:
REVISION HISTORY
APPENDIX B:
Revision A
• This is a new data sheet
Figure B-1 shows the ISO Network Layering Reference
Model. The shaded areas are implemented by the
MCP2140, while the cross-hatched area is implemented by an infrared transceiver. The unshaded
areas should be implemented by the Host Controller.
Revision B (November 2012)
Added a note to each package outline drawing.
FIGURE B-1:
NETWORK
LAYERING
REFERENCE MODEL
ISO REFERENCE LAYER MODEL
OSI REFERENCE LAYERS
Has to be implemented in Host
Controller firmware
(such as a PIC®
microcontroller)
Application
Presentation
Session
Regions implemented
by the MCP2140
Transport
Network
Regions implemented
by the Optical Transceiver logic
Data Link Layer
LLC (Logical Link Control)
Acceptance Filtering
Overload Notification
Recovery Management
Supervisor
MAC (Medium Access Control)
Data Encapsulation/Decapsulation
Frame Coding (stuffing, destuffing)
Medium Access Management
Error Detection
Error Signalling
Acknowledgment
Serialization/Deserialization
Fault
confinement
(MAC-LME)
Physical Layer
PLS (Physical Signalling)
Bit Encoding/Decoding
Bit Timing
Synchronization
Bus Failure
management
(PLS-LME)
PMA (Physical Medium Attachment)
Driver/Receiver Characteristics
MDI (Medium Dependent Interface)
Connectors
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 45
MCP2140
The IrDA Standard specifies the following protocols:
B.1
• Physical Signaling Layer (PHY)
• Link Access Protocol (IrLAP)
• Link Management Protocol/Information Access
Service (IrLMP/IAS)
The MCP2140 supports these required IrDA standard
protocols:
The IrDA data lists optional protocols. They are:
•
•
•
•
•
•
•
• Physical Signaling Layer (PHY)
• Link Access Protocol (IrLAP)
• Link Management Protocol/Information Access
Service (IrLMP/IAS)
Tiny TP
IrTran-P
IrOBEX
IrLAN
IrCOMM
IrMC
IrDA Lite
The MCP2140 also supports some of the optional protocols for IrDA data. The optional protocols that the
MCP2140 implements are:
Figure B-2 shows the IrDA data protocol stack and
which components are implemented by the MCP2140.
FIGURE B-2:
IrTran-P
LM-IAS
IrDA STANDARD DATA
PROTOCOLS SUPPORTED BY
MCP2140
IRDA DATA - PROTOCOL
STACKS
IrObex IrLan IrComm
(1)
IrMC
PHYSICAL SIGNAL LAYER (PHY)
• Bidirectional communication
• Data Packets are protected by a CRC
- 16-bit CRC for speeds up to 115.2 kbaud
Note: MCP2140 supports 9600 Baud only.
• Data Communication Rate
- 9600 baud minimum data rate (with primary
speed/cost steps of 115.2 kbaud
IR Link Management - Mux (IrLMP)
Note:
IR Link Access Protocol (IrLAP)
Asynchronous
Synchronous Synchronous
4 PPM
Serial IR
Serial IR (2, 3)
(4
Mb/s)
(1.152
Mb/s)
(9600 -115200 b/s)
Optional IrDA data
protocols not
supported by
the MCP2140
Note 1: The MCP2140 implements the 9-wire
“cooked” service class serial replicator.
2: The MCP2140 is fixed at 9600 Baud.
3: An optical transceiver is required.
DS21790B-page 46
B.1.1
The MCP2140 provides the following Physical Signal
Layer specification support:
Tiny Transport Protocol (Tiny TP)
Supported by
the MCP2140
• Tiny TP
• IrCOMM
MCP2140 supports 9600 Baud only.
The following Physical Layer Specification is dependant on the optical transceiver logic used in the
application. The specification states:
• Communication Range, which sets the end user
expectation for discovery, recognition and
performance.
- Continuous operation from contact to at least
1 meter (typically 2 meters can be reached)
- A low power specification reduces the objective for operation from contact to at least
20 cm (low power and low power) or 30 cm
(low power and standard power)
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
B.1.2
IrLAP
The IrLAP protocol provides:
• Management of communication processes on the
link between devices
• A device-to-device connection for the reliable,
ordered transfer of data
• Device discover procedures
• Hidden node handling. 115.2 kbaud
Note:
Not supported by MCP2140.
Figure B-3 identifies the key parts and hierarchy of the
IrDA protocols. The bottom layer is the Physical layer,
IrPHY. This is the part that converts the serial data to
and from pulses of IR light. IR transceivers can’t transmit and receive at the same time. The receiver has to
wait for the transmitter to finish sending. This is sometimes referred to as a “Half-Duplex” connection. The IR
Link Access Protocol (IrLAP) provides the structure for
packets (or “frames”) of data to emulate data that would
normally be free to stream back and forth.
FIGURE B-3:
IrDA STANDARD PROTOCOL
LAYERS
Figure B-4 shows how the IrLAP frame is organized.
The frame is preceded by some number of Beginning
of Frame characters (BOFs). The value of the BOF is
generally 0xC0, but 0xFF may be used if the last BOF
character is a 0xC0. The purpose of multiple BOFs is to
give the other station some warning that a frame is
coming.
The IrLAP frame begins with an address byte (“A”
field), then a control byte (“C” field). The control byte is
used to differentiate between different types of frames
and is also used to count frames. Frames can carry status, data or commands. The IrLAP protocol has a command syntax of it’s own. These commands are part of
the control byte. Lastly, IrLAP frames carry data. This
data is the information (or “I”) field. The integrity of the
frame is ensured with a 16-bit CRC, referred to as the
Frame Check Sequence (FCS). The 16-bit CRC value
is transmitted LSB first. The end of the frame is marked
with an EOF character, which is always a 0xC1. The
frame structure described here is used for all versions
of IrDA protocols used for serial wire replacement for
speeds up to 115.2 kbaud.
Note 1: The
MCP2140
only
supports
communication baud rate of 9600 baud.
2: Another IrDA standard that is entering
into general usage is IR Object Exchange
(IrOBEX). This standard is not used for
serial connection emulation.
Host O.S. or Application
IrCOMM
IrLMP – IAS
Protocols
resident in
MCP2140
3: IrDA communication standards faster
than 115.2 kbaud use a different CRC
method and physical layer.
IrLAP
IrPHY
IR pulses
transmitted
and
received
FIGURE B-4:
IrLAP FRAME
X BOFs BOF A C I FCS EOF
2
(1+N) of C0h payload bytes C1h
In addition to defining the frame structure, IrLAP provides the “housekeeping” functions of opening, closing
and maintaining connections. The critical parameters
that determine the performance of the link are part of
this function. These parameters control how many
BOFs are used, identify the speed of the link, how fast
either party may change from receiving to transmitting,
etc. IrLAP has the responsibility of negotiating these
parameters to the highest common set so that both
sides can communicate as quickly and reliably as
possible.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 47
MCP2140
B.1.3
IrLMP
B.1.4
The IrLMP protocol provides:
• Multiplexing of the IrLAP layer. This allows
multiple channels above an IrLAP connection.
• Protocol and service discovery. This is
accomplished via the Information Access Service
(IAS).
When two devices that contain the IrDA standard feature are connected, there is generally one device that
has something to do and the other device that has the
resource to do it. For example, a laptop may have a job
to print and an IrDA standard compatible printer has the
resources to print it. In IrDA standard terminology, the
laptop is a Primary device and the printer is the Secondary device. When these two devices connect, the
Primary device must determine the capabilities of the
Secondary device to determine if the Secondary device
is capable of doing the job. This determination is made
by the Primary device asking the Secondary device a
series of questions. Depending on the answers to
these questions, the Primary device may or may not
elect to connect to the Secondary device.
The queries from the Primary device are carried to the
Secondary device using IrLMP. The responses to these
queries can be found in the Information Access Service
(IAS) of the Secondary device. The IAS is a list of the
resources of the Secondary device. The Primary
device compares the IAS responses with its requirements and then makes the decision if a connection
should be made.
FIGURE B-5:
LINK MANAGEMENT INFORMATION ACCESS SERVICE
(LM-IAS)
Each LM-IAS entity maintains an information database
to provide:
• Information on services for other devices that
contain the IrDA standard feature (Discovery)
• Information on services for the device itself
• Remote accessing of another device’s information
base
This is required so that clients on a remote device can
find configuration information needed to access a
service.
B.1.5
TINY TP
Tiny TP provides the flow control on IrLMP connections. An optional service of Segmentation and
Reassembly can be handled.
B.1.6
IRCOMM
IrCOMM provides the method to support serial and parallel port emulation. This is useful for legacy COM
applications, such as printers and modem devices.
The IrCOMM standard is a syntax that allows the Primary device to consider the Secondary device a serial
device. IrCOMM allows for emulation of serial or
parallel (printer) connections of various capabilities.
Note:
The MCP2140 supports the 9-wire
“cooked” service class of IrCOMM. Other
service classes supported by IrCOMM are
shown in Figure B-5.
IRCOMM SERVICE CLASSES
IrCOMM Services
Uncooked Services
Cooked Services
Parallel
Serial
Parallel
Serial
IrLPT
3-wire Raw
Centronics
3-wire Cooked
IEEE 1284
9-wire Cooked
Supported by MCP2140
DS21790B-page 48
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
B.1.7
OTHER OPTIONAL IrDA DATA
PROTOCOLS
Other IrDA data protocols have been developed to specific application requirements. These IrDA data protocols are briefly described in the following subsections.
For additional information, please refer to the IrDA web
site (www.IrDA.org).
B.1.7.1
IrTran-P
IrTran-P provides the protocol to exchange images with
digital image capture devices/cameras.
Note:
B.1.7.2
Not supported by MCP2140.
IrOBEX
IrOBEX provides OBject EXchange services. This is
similar to HTTP.
Note:
B.1.7.3
Not supported by MCP2140.
IrLAN
IrLAN describes a protocol to support IR wireless
access to a Local Area Network (LAN).
Note:
B.1.7.4
Not supported by MCP2140.
IrMC
IrMC describes how mobile telephony and communication devices can exchange information. This information includes phone book, calender and message data.
Also how call control and real-time voice are handled
(RTCON).
Note:
B.1.7.5
Not supported by MCP2140.
IrDA Lite
IrDA Lite describes how to reduce the application code
requirements, while maintaining compatibility with the
full implementation.
Note:
Not supported by MCP2140.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 49
MCP2140
APPENDIX C:
HOW DEVICES
CONNECT
tant (PDA), the PDA that supports the IrDA standard
feature would be the Primary device and the cell phone
would be the Secondary device.
When two devices implementing the IrDA standard feature establish a connection using the IrCOMM protocol,
the process is analogous to connecting two devices
with serial ports using a cable. This is referred to as a
“point-to-point” connection. This connection is limited
to half-duplex operation because the IR transceiver
cannot transmit and receive at the same time. The purpose of the IrDA protocols is to allow this half-duplex
link to emulate, as much as possible, a full-duplex connection. In general, this is done by dividing the data into
“packets”, or groups of data. These packets can then
be sent back and forth, when needed, without risk of
collision. The rules of how and when these packets are
sent constitute the IrDA protocols.
When a wired connection is used, the assumption is
made that both sides have the same communications
parameters and features. A wired connection has no
need to identify the other connector because it is
assumed that the connectors are properly connected.
In the IrDA standard, a connection process has been
defined to identify other IrDA compatible devices and
establish a communication link. There are three steps
that these two devices go through to make this
connection. They are:
When a Primary device polls for another device, a
nearby Secondary device may respond. When a Secondary device responds, the two devices are defined to
be in the Normal Disconnect Mode (NDM) state. NDM
is established by the Primary device broadcasting a
packet and waiting for a response. These broadcast
packets are numbered. Usually 6 or 8 packets are sent.
The first packet is number 0, the last packet is usually
number 5 or 7. Once all the packets are sent, the Primary device sends an ID packet, which is not numbered.
The Secondary device waits for these packets and then
responds to one of the packets. The packet responds
to determines the “timeslot” to be used by the Secondary device. For example, if the Secondary device
responds after packet number 2, then the Secondary
device will use timeslot 2. If the Secondary device
responds after packet number 0, then the Secondary
device will use timeslot 0. This mechanism allows the
Primary device to recognize as many nearby devices
as there are timeslots. The Primary device will continue
to generate timeslots and the Secondary device should
continue to respond, even if there’s nothing to do.
Note 1: The MCP2140 can only be used to
implement a Secondary device.
• Normal Disconnect Mode (NDM)
• Discovery Mode
• Normal Connect Mode (NCM)
Figure C-1 shows the connection sequence.
C.1
Normal Disconnect Mode (NDM)
When two IrDA standard compatible devices come into
range they must first recognize each other. The basis
of this process is that one device has some task to
accomplish and the other device has a resource
needed to accomplish this task. One device is referred
to as a Primary device and the other is referred to as a
Secondary device. This distinction between Primary
device and Secondary device is important. It is the
responsibility of the Primary device to provide the
mechanism to recognize other devices. So the Primary
device must first poll for nearby IrDA standard compatible devices. During this polling, the default baud rate of
9600 baud is used by both devices.
2: The MCP2140 supports a system with
only one Secondary device having exclusive use of the IrDA standard infrared link
(known as “point-to-point” communication).
3: The MCP2140 always responds to packet
number 2. This means that the MCP2140
will always use timeslot 2.
4: If another Secondary device is nearby,
the Primary device may fail to recognize
the MCP2140, or the Primary device may
not recognize either of the devices.
For example, if you want to print from an IrDA equipped
laptop to an IrDA printer, utilizing the IrDA standard feature, you would first bring your laptop in range of the
printer. In this case, the laptop is the one that has
something to do and the printer has the resource to do
it. The laptop is called the Primary device and the
printer is the Secondary device. Some data-capable
cell phones have IrDA standard infrared ports. If you
used such a cell phone with a Personal Digital Assis-
DS21790B-page 50
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
C.2
Discovery Mode
C.3
Discovery mode allows the Primary device to determine the capabilities of the MCP2140 (Secondary
device). Discovery mode is entered once the MCP2140
(Secondary device) has sent an XID response to the
Primary device and the Primary device has completed
sending the XIDs and then sends a Broadcast ID. If this
sequence is not completed, then a Primary and
Secondary device can stay in NDM indefinitely.
When the Primary device has something to do, it
initiates Discovery. Discovery has two parts. They are:
• Link initialization
• Resource determination
The first step is for the Primary and Secondary devices
to determine, and then adjust to, each other’s hardware
capabilities. These capabilities are parameters like:
•
•
•
•
Normal Connect Mode (NCM)
Once discovery has been completed, the Primary
device and Secondary device can freely exchange
data.
Both the Primary device and the Secondary device
check to make sure that data packets are received by
the other without errors. Even when data is required to
be sent, the Primary and Secondary devices will still
exchange packets to ensure that the connection hasn’t,
unexpectedly, been dropped. When the Primary device
has finished, it then transmits the close link command
to the Secondary device. The Secondary device will
confirm the close link command and both the Primary
device and the Secondary device will revert to the NDM
state.
Note:
Data rate
Turn around time
Number of packets without a response
How long to wait before disconnecting
If the NCM mode is unexpectedly terminated for any reason (including the Primary
device not issuing a close link command),
the Secondary device will revert to the
NDM state after a time delay (after the last
frame has been received).
Both the Primary and Secondary device begin communications at 9600 baud, which is the default baud rate.
The Primary device sends its parameters, then the
Secondary device responds with its parameters. For
example, if the Primary supports all data rates up to
115.2 kbaud and the Secondary device only supports
9.6 kbaud, the link will be established at 9.6 kbaud.
Note:
The MCP2140 is limited to a data rate of
9.6 kbaud.
Once the hardware parameters are established, the
Primary device must determine if the Secondary device
has the resources it requires. If the Primary device has
a job to print, then it must know if it’s talking to a printer,
not a modem or other device. This determination is
made using the Information Access Service (IAS). The
job of the Secondary device is to respond to IAS queries made by the Primary device. The Primary device
must ask a series of questions like:
• What is the name of your service?
• What is the address of this service?
• What are the capabilities of this device?
When all the Primary device’s questions are answered,
the Primary device can access the service provided by
the Secondary device.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 51
MCP2140
FIGURE C-1:
HIGH LEVEL IRCOMM CONNECTION SEQUENCE
Primary Device
Secondary Device
(MCP2140)
Normal Disconnect Mode (NDM)
Send XID Commands
(timeslots n, n+1, ...)
(approximately 70ms
between XID commands)
No Response
XID Response in timeslot y,
claiming this timeslot, (MCP2140
always claims timeslot 0)
Finish sending XIDs
(max timeslots - y frames)
No Response to these XIDs
Broadcast ID
No Response to Broadcast ID
Discovery
Send SNRM Command
(w/ parameters and
connection address)
UA response with parameters
using connect address
Open channel for IAS Queries
Confirm channel open for IAS
Send IAS Queries
Provide IAS responses
Open channel for data
Confirm channel open for data
Normal Response Mode (NRM)
Send Data or Status
(MCP2140 DSR pin driven low)
Send Data or Status
Send Data or Status
Send Data or Status
Shutdown link
Confirm shutdown
(back to NDM state)
DS21790B-page 52
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
APPENDIX D:
DB-9 PIN
INFORMATION
APPENDIX E:
Table D-1 shows the DB-9 pin information and the
direction of the MCP2140 signals. The MCP2140 is
designed for use in Data Communications Equipment
(DCE) applications.
TABLE D-1:
DB-9
Signal
Pin No.
KNOW PRIMARY
DEVICE
COMPATIBILITY
ISSUES
Table E-1 show the known issues of Primary Devices
interfacing to the MCP2140.
DB-9 SIGNAL INFORMATION
Direction
Comment
Carrier Detect
Received Data
Transmit Data
Data Terminal
Ready
Ground
Data Set
Ready
Request to
Send
Clear to Send
Ring Indicator
1
2
3
4
CD
RX
TX
DTR
HC  MCP2140
MCP2140  HC
HC  MCP2140
HC  MCP2140
5
6
GND
DSR
—
MCP2140  HC
7
RTS
HC  MCP2140
8
9
CTS
RI
MCP2140  HC
HC  MCP2140
Legend: HC = Host Controller
TABLE E-1:
PRIMARY DEVICE ISSUES
Primary Device
Operating System
HP Jornada 720
HPC Pro/Windows CE™ 3.0 Jornada 720 transmits 0xFF (not MCP2140 will not connect
(Pocket PC)
0xC0) for extra SOF (Start-of- to the Jornada 720.
Frame) characters during NDM.
Issue
Result
Personal Computers Windows® 2000 (do not have The operating system will reset if MCP2140 will not connect
list of which versions)
an IR device ID of “null” is to the PC
received.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 53
MCP2140
NOTES:
DS21790B-page 54
Preliminary
 2003-2012 Microchip Technology Inc.
MCP2140
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Temperature
Range
Examples:
Package
Device
MCP2140: Infrared Communications Controller
MCP2140T: Infrared Communications Controller 
(Tape and Reel)
Temperature Range
I
=
-40°C to +85°C
Package
P
SO
SS
=
=
=
Plastic DIP (300 mil, Body), 18-lead
Plastic SOIC (300 mil, Body), 18-lead
Plastic SSOP (209 mil, Body), 20-lead
a)
MCP2140-I/P = Industrial Temp.,
PDIP packaging
b)
MCP2140-I/SO = Industrial Temp.,
SOIC package
c)
MCP2140T-I/SS = Tape and Reel,
Industrial Temp., SSOP package
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
Your local Microchip sales office
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
 2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 55
MCP2140
NOTES:
DS21790B-page 56
Preliminary
 2003-2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2003-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620767429
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
 2003-2012 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Preliminary
DS21790B-page 57
Worldwide Sales and Service
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DS21790B-page 58
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10/26/12
Preliminary
 2003-2012 Microchip Technology Inc.
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