VBUS052BD-HTF www.vishay.com Vishay Semiconductors Low Capacitance, 2-Line ESD-Protection Diode FEATURES • Compact LLP75-4L package 1 2 • Low package height < 0.6 mm 4 • 2-line ESD-protection • Low leakage current < 0.1 μA 3 • Low load capacitance CD = 1.5 pF 20904 • ESD-protection acc. IEC 61000-4-2 ± 15 kV contact discharge ± 15 kV air discharge 1 20903 MARKING (example only) XX YY • High surge current acc. IEC 61000-4-5 lPP > 3 A • Soldering can be checked by standard vision inspection. No X-ray necessary 21001 • e4 - precious metal (e.g. Ag, Au, NiPd, NiPdAu) (no Sn) Dot = pin 1 marking YY = type code (see table below) XX = date code • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 ORDERING INFORMATION ORDERING CODE TAPED UNITS PER REEL (8 mm TAPE ON 7" REEL) MINIMUM ORDER QUANTITY VBUS052BD-HTF-GS08 3000 15 000 DEVICE NAME VBUS052BD-HTF PACKAGE DATA DEVICE NAME PACKAGE NAME TYPE CODE WEIGHT MOLDING COMPOUND FLAMMABILITY RATING MOISTURE SENSITIVITY LEVEL SOLDERING CONDITIONS VBUS052BD-HTF LLP75-4L U7 4.2 mg UL 94 V-0 MSL level 1 (according J-STD-020) 260 °C/10 s at terminals ABSOLUTE MAXIMUM RATINGS VBUS052BD-HTF RATING TEST CONDITIONS SYMBOL VALUE Peak pulse current Acc. IEC 61000-4-5, tp = 8/20 μs/single shot IPPM 3 A Peak pulse power Acc. IEC 61000-4-5, tP = 8/20 μs/single shot PPP 45 W ESD immunity Operating temperature Storage temperature Rev. 1.6, 15-Jul-15 Contact discharge acc. IEC 61000-4-2; 10 pulses Air discharge acc. IEC 61000-4-2; 10 pulses Junction temperature UNIT ± 15 kV ± 15 kV TJ -40 to +125 °C TSTG -40 to +150 °C VESD Document Number: 81788 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS052BD-HTF www.vishay.com Vishay Semiconductors APPLICATION NOTE The VBUS052BD-HTF is a two-line ESD-protection device with the characteristic of a Z-diode with a high ESD-immunity and a very low capacitance which makes it usable for high frequency applications like USB2.0 or HDMI. With the VBUS052BD-HTF two high speed data lines can be protected against transient voltage signals like ESD (electro static discharge). Connected to the data line (pin 1 and 2) and to ground (pin 3) negative transients will be clamped close below the ground level while positive transients will be clamped close above the 5 V working range. The clamping behaviour of the VBUS052BD-HTF is bidirectional but asymmetrical (BiAs) and so it offers the best protection for applications running up to 5 V. ELECTRICAL CHARACTERISTICS VBUS052BD-HTF PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT Number of lines which can be protected Nchannel - - 2 lines at IR = 0.1 μA; pin 1 or pin 2 to pin 3 VRWM - - 5 V at VR = VRWM = 5 V; pin 1 or pin 2 to pin 3 IR - < 0.01 0.1 μA at IR = 1 mA; pin 1 or pin 2 to pin 3 VBR 6.9 7.9 8.7 V Reverse clamping voltage at IPP = 3 A, acc. IEC 61000-4-5; pin 1 or pin 2 to pin 3 VC - - 16 V Forward clamping voltage at IF = 3 A, acc. IEC 61000-4-5; pin 3 to pin 1 or pin 2 VF - 4.8 6 V CD - 1.5 2.5 pF Protection paths Reverse stand-off voltage Reverse current Reverse breakdown voltage Capacitance at VR = 0 V; f = 1 MHz; pin 1 or pin 2 to pin 3 Note • Ratings at 25 °C, ambient temperature unless otherwise specified. TYPICAL CHARACTERISTICS Tamb = 25 °C, unless otherwise specified 2.5 120 % f = 1 MHz Rise time = 0.7 ns to 1 ns 2.0 80 % CIN (pF) Discharge Current IESD 100 % 60 % 53 % 1.5 1.0 40 % 27 % 0.5 20 % 0.0 0% -10 0 10 20 30 40 50 60 70 80 90 100 Time (ns) Fig. 1 - ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 /150 pF) 20557 0 1 2 20942 3 4 5 6 VIN (V) Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR 100 8 µs to 100 % 100 % 10 IF (mA) 80 % IPPM 60 % 20 µs to 50 % 40 % 20 % 1 0.1 0.01 0% 0.001 0 20548 10 20 30 40 Time (µs) Fig. 2 - 8/20 μs Peak Pulse Current Wave Form acc. IEC 61000-4-5 Rev. 1.6, 15-Jul-15 0.5 20943 0.6 0.7 0.8 0.9 1 1.1 1.2 VF (V) Fig. 4 - Typical Forward Current IF vs. Forward Voltage VF Document Number: 81788 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS052BD-HTF www.vishay.com Vishay Semiconductors 9 20 0 7 - 20 6 - 40 VC-ESD (V) 8 VR (V) 5 4 - 60 3 - 100 2 - 120 1 - 140 0 0.01 0.1 1 20944 10 100 - 160 - 10 0 10 20 30 40 50 60 70 80 90 1000 10 000 IR (µA) t (ns) 20947 Fig. 5 - Typical Reverse Voltage VR vs. Reverse Current IR Fig. 8 - Typical Clamping Performance at - 8 kV Contact Discharge (acc. IEC 61000-4-2) 20 200 150 15 Positive surge Positive discharge 100 10 Acc. IEC 61000-4-2 contact discharge 50 Measured acc. IEC 61000-4-5 (8/20 µs - wave form) 5 VC-ESD (V) VC (V) Acc. IEC 61000-4-2 - 8 kV contact discharge - 80 VC 0 0 - 50 VC-ESD - 100 - 150 -5 - 200 Negative surge - 10 0 20945 1 2 3 4 IPP (A) Fig. 6 - Typical Clamping Voltage vs. Peak Pulse Current IPP Negative discharge - 250 0 20948 5 10 15 20 VESD (kV) Fig. 9 - Typical Peak Clamping Voltage at ± ESD Contact Discharge (acc. IEC 61000-4-2) 120 100 Acc. IEC 61000-4-2 + 8 kV contact discharge VC-ESD (V) 80 60 40 20 0 - 20 - 10 0 20946 10 20 30 40 50 60 70 80 90 t (ns) Fig. 7 - Typical Clamping Performance at + 8 kV Contact Discharge (acc. IEC 61000-4-2) Rev. 1.6, 15-Jul-15 Document Number: 81788 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS052BD-HTF www.vishay.com Vishay Semiconductors 0.3 (0.012) 0.2 (0.008) 0.95 (0.037) 1.05 (0.041) PACKAGE DIMENSIONS in millimeters (inches): LLP75-4L 0.55 (0.022) 0.3 (0.012) 0.45 (0.018) 0.15 (0.006) 0 (0.000) 0.5 (0.020) 1.55 (0.061) 0.05 (0.002) 0.6 (0.024) 1.65 (0.065) 0.2 (0.008) 1.65 (0.065) 1.55 (0.061) Pin 1 marking Foot print recommendation: 0.5 (0.020) 0.5 (0.020) 0.3 (0.012) 0.3 (0.012) 0.15 (0.006) 1 (0.039) 0.25 (0.010) 0.15 (0.006) Document no.:S8-V-3906.02-015 (4) Created - Date: 04. September 2007 Rev. 2 - Date: 09. Sep. 2008 20906 Rev. 1.6, 15-Jul-15 Solder resist mask Solder pad 0.5 (0.020) Document Number: 81788 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS052BD-HTF www.vishay.com Vishay Semiconductors Unreeling direction LLP75-4L S9 AG Pad layout - view from top / seen at bottom side Pin 1 - location Rev. 1.6, 15-Jul-15 Document Number: 81788 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000