TND334/D Rev. 3, JUN -- 2010 50 W Four--Output Internal Power Supply for Set Top Box Reference Design Documentation Package © Semiconductor Components Industries, LLC, 2010 June, 2010 -- Rev. 3 1 Publication Order Number: TND334/D Disclaimer: ON Semiconductor is providing this reference design documentation package “AS IS” and the recipient assumes all risk associated with the use and/or commercialization of this design package. No licenses to ON Semiconductor’s or any third party’s Intellectual Property is conveyed by the transfer of this documentation. This reference design documentation package is provided only to assist the customers in evaluation and feasibility assessment of the reference design. It is expected that users may make further refinements to meet specific performance goals. http://onsemi.com 2 TND334 TND334 50 W Four-- Output Internal Power Supply for Set Top Box Reference Design Documentation Package http://onsemi.com TECHNICAL NOTE 1 Overview This reference document describes a built--and--tested, GreenPoint® solution for a 40 W (40 W nominal power, 50 W peak power) set--top box (STB) power supply. This document presents the results of various secondary rectification and regulation techniques that were used to find the highest practical efficiency scheme for a four--output, 40 watt set top box power supply. The power supply design is built around ON Semiconductor’s NCP1308 Current--Mode controller, on the primary side, using free running quasi--resonance operation. The secondary side offers four outputs (+5 V, --5 V, 3.3 V and 12 V). The +5 V output is the main channel with the closed PWM loop while the 3.3 V output is derived by using the NCP1587 in a buck (step--down) DC--DC topology with synchronous rectification. The 12 V output is derived from +5 V by stacking the 12 V secondary winding onto the 5 V winding. Figure 1. shows a simplified block diagram of the reference design circuit. http://onsemi.com 3 TND334 2 Introduction Across the United States, millions of electronic devices help consumers enjoy pay--TV programming. Known as set--top boxes (STB), these products allow consumers to receive and display programming services like cable and satellite on their TVs. Set--top boxes now consume more energy than many common home appliances. Taken together, the box and its attached TV could easily consume more energy per year than a refrigerator. For example, a new high--definition set--top box with built--in DVR consumes about 350 kWh per year. With 1 to 2 set--top boxes in most U.S. households, it is estimated that these appliances consume over 23 billion kWh of electricity nationwide, resulting in power plant emissions of over 15 million tons of carbon dioxide (CO2), a heat--trapping greenhouse gas responsible for global warming (source: NRDC & Ecos Consulting). These figures could double in the coming decade as many pay--TV service providers retire their older set--top boxes in favor of newer boxes with built--in digital video recorder (DVR) capabilities. This transition would require the equivalent of 7 to 8 new power plants to support the growth in electricity demand. As the boxes are currently designed, they cannot be significantly powered down without unplugging them from the wall. It is estimated that over 10 billion kWh per year (the equivalent electricity output of three 600--MW power plants) could be saved if today’s boxes could automatically drop into low power states when not being actively used, like many other consumer electronics (source: NRDC & Ecos Consulting). For more information and facts on the current set--top box market and on the energy savings opportunities in set--top boxes, check http://www.efficientproducts.org/stbs/#efficiency 3 Definitions The term STB can apply to any electronic device that is connected to a television. A majority of these boxes are designed to take a signal from a cable feed, satellite dish, broadcast antenna, or other source and convert it into a signal that can be viewed on a TV. These types of STBs range from simple converter devices all the way up to computer type boxes that are capable of displaying HDTV signals and incorporate digital video recorders (DVRs). Other STBs are designed to allow users to play video games (such as the X--box), or digitally record programming (e.g. TiVot boxes). STBs can be divided into several basic categories, also shown in the Figure 2 below in order of increasing functionality and on mode power use (source: http://www.efficientproducts.org/stbs/#stock): Figure 2. an 8 W internal power supply for DTA at http://www.onsemi.com/PowerSolutions/supportDoc.do ?type=Reference%20Designs: a STB designed to convert digital or analog cable/satellite signals into digital or analog signals useable by a TV. Cable/satellite can also be used to descramble premium pay content on cable/satellite networks.) • Digital television adapter (DTA): form of STB designed to take broadcast digital TV signals and convert them into an analog format useable by analog TVs. For more information on DTAs, check the ENERGY STAR® guidelines for DTAs at http://www.energystar.gov/index.cfm?c=dta.pr_dta. You can also check the GreenPoint reference design for http://onsemi.com 4 TND334 provides the following definitions for the different operational modes and power states: • On/Active: An operational state in which the STB is actively delivering one or more of its principal functions and some or all of its applicable secondary functions. • Sleep: A state in which the STB has less power consumption, capability, and responsiveness than in the On/Active state. The STB may enter a Sleep state from the On/Active state after: • Cable/satellite converter: a STB designed to convert • • • • digital or analog cable/satellite signals into digital or analog signals useable by a TV. Cable/satellite can also be used to descramble premium pay content on cable/satellite networks. Stand--alone Digital Video Recorders (DVRs): STBs such as the TiVot that are designed to digitally record TV content for instant playback Game Console: STB that allows the user to play video games, browse web pages or otherwise interact with audiovisual content displayed on a TV Cable/Satellite Multi--function STBs: a form of cable/satellite converter that may contain a DVR, DVD recorder, multiple cable/satellite tuners, etc. This type of box is one focus of discussion on Efficient Products.org Media PC: a personal computer designed to tune cable/satellite signals and that can display digital media content on a TV screen without the need for intermediary audio or video adapters a) the user pushes a power/standby button on the remote or on the unit; or b) the STB auto power downs to a Sleep state. The energy consumption after auto power down to Sleep and after a user--initiated power down to Sleep may, or may not be, equivalent. Note: EPA has decided to use the term “Sleep” rather than “Standby” to avoid confusion with other EPA specifications and international standards. 4 STB Power Supply Specification The ENERGY STAR® specification for set--top boxes is currently under revision. On its web site, ENERGY STAR® The power supply specification called for four regulated outputs with the following general requirements: Input: Vin: 90 to 135 Vac, 55 to 65 Hz Outputs Vout Regulation Range Ripple (p/p) Inominal Imax Imin 3.3 Vdc 3.3 to 3.35 V 40 mV 3.37 A 3.9 A 1.85 A 5.0 Vdc 4.9 to 5.25 V 40 mV 1.52 A 2.2 A 0.70 A 12 Vdc 11.4 to 12.6 V 120 mV 0.78 A 1.2 A 0.24 A --5.0 Vdc --4.85 to --5.25 V 20 mV 38 mV 58 mA 18 mA 28.27 W 38.56 W 12.57 W Total Power Output = Over--current protection on all outputs with self recovery Efficiency: > 80% Five different secondary output configurations were implemented using the same primary “front end” quasi--resonant (QR) flyback converter stage, and the efficiency and performance characteristics of each were measured. http://onsemi.com 5 TND334 5 Operation of Main Converter The design of the flyback converter stage was the same for all of the different output secondary configurations and was designed around one of ON Semiconductor’s quasi-resonant (QR), critical conduction mode flyback controllers. The NCP1308 was used in this particular design, however, the NCP1207, NCP1377, or NCP1337 controllers could have also been used as well. The QR flyback converter was chosen for this application because of its inherent simplicity, low cost and high conversion efficiency. The latter characteristic is achieved by operating the flyback in the critical conduction mode and allowing the primary Mosfet to switch back on only when the drain--to--source voltage is at a minimum during the flyback ring--out (quasi--resonant via valley switching). This technique insures low switching losses in both the Mosfet and the output rectifiers. Details of critical conduction mode and QR switching can be found in the numerous application notes for the above mentioned QR controllers at AC Input TH1 C1 0.22uF ”X” cap L1 L2 D2 C2 D4 R1 1M 0.22uF ”X” cap C3 Q1 D3 C5 1nF ”Y” R4 4.7K R5 4.7K U1 5 QR Controller NCP1308 2 C6 1nF 8 6 D6 MMSD4148T 1 4 3 C7 22uF 35V T1 R2 C4 47K 2.2nF 0.5W 1kV D5 MRA4007 270 400V D1 T 10 ohm 3 amp QR Flyback Converter MRA4007 x 4 R7 R8 1K R6 150 82K C8 100pF Primary 2.5A EMI Filter NDF 04N60Z R3 0.33 1W Flyback Xfmr F1 ON Semiconductor’s website (see references at the end of this document.) Although the primary and Vcc windings on the various flyback transformer implementations were identical, the secondary windings had to be different for each secondary configuration necessitating a different transformer design for each. The schematic of the primary part of the flyback converter is shown in Figure 3. Note that a two stage EMI filter (L1, L2 and associated “X” caps) is employed for maximum attenuation of conducted EMI. The main control loop feedback from the sensed output to the NCP1308 controller U1 is accomplished by optocoupler U2. The Vcc winding on T1 provides the operating voltage for the controller after startup and also provides the valley detection feedback signal to pin 1 of the controller. R3 is the peak current sense resistor that sets the inverter peak over current level as well as current sensing for the current mode control mechanism in U1. Vcc Feedback Optocoupler 4 U2 1 3 Figure 3. Quasi--resonant flyback converter design http://onsemi.com 6 2 TND334 6 Secondary Circuit Approaches Five different secondary circuit designs were tested. The circuitry included the use of Mosfet synchronous rectifiers for the main flyback winding and synchronous Mosfet buck converters for low voltage post regulators in several different configurations which are described below. transformer was difficult because of the low number of turns required for the 3.3 V output. The transformer utilized 2 turns of copper foil for the 3.3 V winding and a multi--filar 5 turn wire winding for the 12 V which was in turn stacked on top of the 3.3 V winding. This configuration required the primary to have approximately twice as many turns as what would be necessary to satisfy the core’s maximum flux density requirements. As a consequence the 12 V output was satisfactory with full loading on the 3.3 V output, but below the minimum specified level of 11.4 V with minimum loading on the 3.3 V output. A conventional low forward voltage drop Schottky diode (D11) was initially used for the 12 V flyback rectifier. This was later replaced with a synchronous rectifier in Configuration 1A. The 5.0 volt output was derived from the 12 volt output by using a synchronous buck converter using the NCP1587 controller (U4) and a pair of low on--state resistance Mosfets. This technique provides a well regulated, low ripple output with independent current limiting. The dc input--to--output efficiency of the buck converter section was measured at 94% at the specified full load of 2.2 amps. Due to the very low output current (58 mA), the --5 volt output design was the same for all of the tested secondary configurations and was implemented from an auxiliary winding on T1 followed by a simple MC79L05 negative three terminal regulator (U5). This output was loaded to 50 mA for all efficiency and test measurements. 6.1 Configuration #1 The first secondary configuration is shown in Figure 4. In this implementation the main channel is the 3.3 volt output around which the PWM loop is closed. A TLV431A programmable zener (U6) is used as the voltage sense error amplifier and feedback to the primary PWM chip (NCP1308) is accomplished via optocoupler U2. This output was selected as the main channel because it has the highest current output. A Mosfet synchronous rectifier circuit was utilized in the positive leg of the 3.3 volt secondary and is shown in the lower schematic section block of Figure 4. The synchronous rectifier circuit controls the Mosfet by sensing any significant current in the secondary winding via sense transformer T2 and then switching it on with the associated bipolar complementary driver circuit. Power for the driver is provided by the 12 volt output. The 12 volt channel was configured as a quasi--regulated output with the lower part of the 12 volt secondary stacked on the top of the 3.3 volt secondary for improved cross regulation. Achieving an optimum integer turns ratio in the http://onsemi.com 7 TND334 Synchronous Buck (5V) D10 MURA110 6 R22 T1 D11 Synchronous Rectifier Block C29 MURA110 D12 4 3 U2 R30 4.7uH C27 L5 1200 6.3V 270 C30 25V U5 270 --5V 25V reg MC79L05 R24 12V C21 0.1 C28 R29 10K 0.1 C31 0.1 3.3V Com --5V 39 1 R31 2 4.7K 4.7uH C20 680 16V C19 C18 1200uF 6.3V x 3 B C24,25,26 5V 1200 6.3V 680, 16V x 2 L4 MBR1045 Vcc A C15 1nF C14 0.1 27K 5.1K L3 NTD-4808N 0.1 C17 C16 10 4 3 R21 Q5 2.2K 50nF 10K 10uH R23 C12 Q4 NTD4808N NCP1587 C13 100pF R20 C11 0.1 U4 1 5 2 8 7 R33 5.1K R32 C32 (4.7K) 0.1 U6 TLV431A R34 3.3K 3.3Vout Error Amp 3.3 Vout Synchronous Rectifier Block Vcc Q6 NTB60N06LT A 1T C23 R27 20K MMBT2907A MMBT2222A 0.1 50T Q8 MMBT2222A R28 Q7 100 1K 1nF B T2 R25 C22 D12 MMSD4148T Q9 1K R26 Figure 4. Secondary Configuration #1 6.2 Configuration #1A overall efficiency and placed the 3.3 V to 12 V cross--regulation just within specification limits due to the elimination of the Schottky diode forward drop that subtracts from the effective output voltage. In this configuration the Schottky rectifier for the 12 volt channel (D11) was replaced with a synchronous rectifier exactly like the one for the 3.3 V output and the efficiency was measured again. This configuration did improve the http://onsemi.com 8 TND334 6.3 Configuration #2 to the 5.0 volt buck in Configuration 1. The detailed schematic of the buck converter block is shown at the lower right of Figure 5. The measured dc input--to--output efficiency of the 3.3 volt converter section was 92% with a load of 3.9 amps. The principle advantage of this particular configuration was the simplicity of the flyback transformer design. Because of the higher voltage of the 12 V secondary, it was easy to configure the turns ratio of the windings for low leakage inductance and minimal winding layers. In addition the lack of quasi--regulated (slave) outputs eliminates all cross--regulation issues and all outputs are tightly regulated with low ripple and independently current limited. In the second configuration, the main channel was the 12 volt output with the PWM loop closed around it. A TL431A error amp and optocoupler combination was used in a similar PWM feedback scheme as in Configuration 1. As mentioned previously, the --5 V output was the same as in Configuration 1. A current sensed synchronous rectifier circuit was also used for this output, however, the circuit was implemented in the lower leg of the secondary winding due to the fact that the operating Vcc for the sync circuit had to come from the 12 volt output also. The schematic of Configuration 2 is shown in Figure 5 and the synchronous rectifier schematic block is shown to the lower left of the main schematic. Both the 5 volt and 3.3 volt channels were derived from the 12 volt output with NCP1587 buck converters identical 12Vin 3.3V Synchronous Buck Block 12Vin T1 5V Synchronous Buck Block Vout 3.3V Com Vout 5V Com L4 680uF,16V x 2 C18 C19 Synchronous Rectifier Block B C24 270 25V U5 --5V reg MURA110 D10 R30 U2 1 4 2 3 C25 270 25V 0.1 Com C26 R24 10K 0.1 --5V MC79L05 470 12V Error Amp R31 1K 12V C21 C20 680 16V Vcc A 4.7uH R32 C27 10K U6 TL431A R33 13K 0.1 R29 3.3K 12 Vout Synchronous Rectifier Block C22 Q8 1K R28 1nF MMBT2222A Q7 100 D12 MMSD4148T 1K R26 Q9 C13 100pF C12 R20 (10K) 50nF 12Vin C11 U4 0.1 1 5 2 8 7 D11 6 R21 R22 R25 MURA110 B 0.1 50T MMBT2907A MMBT2222A T2 C23 R27 Vset 5.1K C14 0.1 NCP1587 NTB60N06LT 1T A Synchronous Buck Block Vcc Q6 3 4 C15 1nF 20K Figure 5. Secondary Configuration #2 http://onsemi.com 9 Q4 NTD4808N 10uH L3 Vout Q5 R23 NTD-10 4808N 0.1 C17 C16 1200 6.3V Com TND334 6.4 Configuration #3 in Configuration 1 due to the so called “magic ratio” of 3 to 7 turns for the 5 V and 12 V outputs respectively. In this case the quasi--regulated 12 volt secondary winding was again “stacked” onto the 5 volt winding with an additional 4 turns for improved cross regulation. And indeed, the 12 volt output setpoint was just slightly above 12 volts and never exceeded 12.8 volts under asymmetrical loading. This configuration is essentially the same as Configuration 1 with the 3.3 V and 5 V channel circuit implementation swapped and is shown in Figure 6. The 5 volt output is now the main channel with the closed PWM loop while the 3.3 V output is derived from the synchronous NCP1587 buck converter. The transformer windings in this configuration were definitely easier to implement than those Synchronous Buck (3.3V) D10 MURA110 D11 Vcc A Synchronous Rectifier Block C29 MURA110 D12 4 3 U2 R30 C15 1nF R31 2 4.7K 4.7uH C20 680 16V C19 C18 1200uF 6.3V x 3 B C24,25,26 4.7uH C27 L5 1200 6.3V 270 C30 25V U5 270 --5V 25V reg MC79L05 R24 R29 10K C31 0.1 C32 0.1 10K U6 TL431A R34 5.1K 5.0 Vout Error Amp 5.0 Vout Synchronous Rectifier Block Vcc Q6 NTB60N06LT4G 1T A B C23 0.1 R27 20K T2 50T Q8 MMBT2222A R28 Q7 100 R25 1K C22 1nF D12 MMSD4148T Q9 1K R26 Figure 6. Secondary Configuration #3 http://onsemi.com 10 0.1 0.1 R33 5.1K R32 12V C21 C28 75 1 3.3V 1200 6.3V 680, 16V x 2 L4 MBR1045 L3 NTD-4808N 0.1 C17 C16 10 4 3 C14 0.1 16K 5.1K MMBT2907A MMBT2222A T1 R22 R21 Q5 2.2K 6 10uH R23 50nF 10K Q4 NTD4808N NCP1587 C12 R20 C11 0.1 U4 1 5 2 8 7 C13 100pF 5V Com --5V TND334 6.5 Configuration #4 rectifier drive circuit, the synchronous rectifier circuit block had to be moved to the lower winding node where it connects to the “top” of the 5 V secondary winding. It was also necessary to configure the synchronous rectifier circuit in a “reverse” manner for the 12 V output due to the current flow direction in the bottom winding leg. This configuration is identical to Configuration 3, however, a synchronous rectifier is substituted for the Schottky flyback rectifier (D11 of Figure 6) in the 12 V output. This implementation is shown in Figure 7. Note that in order to use the 12 V output to power the synchronous Synchronous Buck (3.3V) D10 MURA110 6 T1 R22 R21 4.7uH Vcc A 5V Sync B Rectifier 4.7uH C27 L5 1200 6.3V 270 C30 25V U5 270 MURA110 --5V 25V reg D12 MC79L05 C29 3 U2 R30 R31 2 4.7K R24 R29 10K R33 5.1K R32 C32 0.1 10K U6 TL431A R34 5.1K 5.0 Vout Error Amp Synchronous Rectifier Block Vcc Q6 NTB60N06LT4G 1T A C23 0.1 50T Q8 R27 20K MMBT2222A Q7 1K R28 100 B T2 R25 C22 1nF D12 MMSD4148T Q9 1K R26 Figure 7. Secondary Configuration #4 http://onsemi.com 11 12V C21 0.1 C28 75 1 MMBT2907A MMB2222A 4 C20 680 16V C19 C18 1200uF 6.3V x 3 C24,25,26 3.3V 1200 6.3V 680,16V x 2 L4 Vcc B 12V Sync A Rectifier L3 NTD-4808N 0.1 C17 C16 C15 1nF C14 0.1 16K 5.1K 10 4 3 Q5 2.2K 50nF 10K 10uH R23 C12 Q4 NTD4808N NCP1587 C13 100pF R20 C11 0.1 U4 1 5 2 8 7 0.1 C31 0.1 5V Com --5V TND334 7 Test Results 7.1 Active Mode Efficiency The measured efficiency for each configuration is as follows: The throughput efficiency of each of the configurations was measured using fixed precision resistive loads and a Voltech PM1000 line analyzer. The power supply input voltage was 117 Vac and the loads were configured for the following currents at the nominal output voltage: Configuration Efficiency Configuration #1: 77.6% Configuration #1A: 78.5% Configuration #2: 79.5% Configuration #3: 80.2% Configuration #4: 81% Original Load Profile Vout Nominal Output Current Watts 3.3 Vdc 3.4 A 11.22 5.0 Vdc 2.0 A 10.0 12.0 Vdc 1.2 A 14.4 --5.0 Vdc 50 mA 0.25 Since Configuration #4 produced the highest efficiency for the specified loading, a new pc board layout was implemented and optimized for this configuration. Five additional loading profiles were tested to determine the effect of the load distribution on efficiency. Tests were performed with an input of 120 Vac and a total load of 40 watts. The --5 volt output was loaded to 50 mA in each case. The results are shown in Table 1. Total Output Power = 35.87 W Table 1. Efficiency vs. Output Loading Profile Wattage per Channel (Total = 40 W) Different Load Profile of Outputs for Configuration 4 Efficiency 3.3 V 5.0 V 12 V Original load profile 81% 11.22 W 10 W 14.4 W 1 78.20% 15 W 15 W 10 W 2 81.20% 11 W 10 W 18 W 3 81.80% 8W 15 W 18 W 4 82.70% 8W 10 W 24 W 5 83.60% 5.4 W 10 W 24 W 7.2 Comments and Conclusions issues, but was still unable to attain 80% efficiency. Additional testing of Configuration #2 was performed in which the 12 V output was loaded to the full 36 watts (3 A load) and the two dc--dc synchronous bucks for 3.3 V and 5 V and the --5 Vout were disconnected. The efficiency of this single output configuration was 85.6%. The product of this efficiency, which is essentially the efficiency of the flyback conversion stage, times the average efficiency of the two dc--dc synchronous bucks (92%, see Configuration #2 in section 6.2) mentioned in the Configuration #2 description above, yields a total throughput efficiency of 79.5% (86.5% * 92% = 79.5%) which is exactly what the measured efficiency of Configuration #2 was (see test results in section 7.1). 3. Using the ideal 3 to 7 turns ratio for the 5 V and 12 V transformer windings in Configuration #3 and #4, closing the PWM loop around the 5 V output, and deriving the 3.3 V via a synchronous buck appears to be the best compromise for highest efficiency. Also replacing the 12 Vout Schottky rectifier with a synchronous rectifier The efficiency results show that for the original tested load profile, which is just slightly less than the maximum specified loads but greater than the nominal load, only two configurations produced an efficiency of 80% or better. Also, the fact that the efficiency spread is concentrated around an average of about 79% indicates that it is probably difficult to obtain greater efficiencies (with the specified load distribution) without some serious circuit design compromises. Some other interesting observations are as follows: 1. Having to resort to multiple winding techniques (foil and wire), and greater than optimal primary turns to accommodate proper turns ratios as in Configuration 1, can result in detrimental leakage inductance effects (as well as more expensive magnetics). Adding the synchronous rectifier of Configuration #1A did improve the efficiency and cross--regulation but was not sufficient to achieve 80%. 2. Using synchronous buck converters to produce the two high current, low voltage outputs (5 V and 3.3 V) from the 12 V output (Configuration #2) was the “cleanest” design from the standpoint of the transformer construction and cross--regulation http://onsemi.com 12 TND334 flyback transformer. This winding configuration will have to have the exact turns ratios to achieve the required output voltages, and a stacked and interleaved winding structure such that leakage inductance and cross--regulation issues are minimized. This would probably mean a somewhat larger and more expensive transformer than the other configurations which rely on buck post regulators to alleviate regulation issues. increased the efficiency almost an extra point for Configuration #4. 4. Higher efficiency, approaching 85%, could probably be achieved by using a secondary configuration similar to that shown in Figure 8 where no buck post regulators are used and all output rectifiers are synchronous Mosfet circuits. Unfortunately, such a configuration will require a very sophisticated secondary structure on the 12V Vcc 12V Sync Rectifier Vcc 5V Sync Rectifier 5.0V Vcc 3.3V Sync Rectifier 3.3V Com --5V Reg MC79L05 4 U2 75 1 5.1K 1K 3 --5V 2 U6 10K 0.1 TL431A 5.0 Vout Error Amp 5.1K Figure 8. Possible Secondary Configuration #5 for Higher Efficiency 6. One can see from Table 1 that the loading profile on the different outputs has a significant impact on the overall efficiency. The efficiency is obviously the worst when the highest output current goes with the lowest output voltage as would be expected. 5. Other circuit changes that could possibly result in higher efficiency include using a flyback Mosfet (Q1) with a lower Rds(on) rating; minimizing the switching losses in Q1 by precisely tailoring the snubber circuit (R2 and C4) and the transformer primary inductance for minimal flyback ringing; and by minimizing all dc resistance losses associated with the input EMI filter and the circuit board layout of the power trains. http://onsemi.com 13 TND334 7.3 General Performance and Characteristics and the 12 volt secondary was configured as a stacked winding with a relatively manageable transformer design which is both interleaved and multi--filar wound for the 5 volt and 12 volt winding as well as the --5 volt winding (see Figure 13 for the transformer design). Figures 9, 10, and 11 show representative waveforms for the circuit of final Configuration #4. Figure 9 is the flyback voltage on the Q1 Mosfet drain at 50% loading where the quasi--resonant valley switching at turn on can be easily seen. Figures 10 and 11 show the 3.3 V and 5 V output ripple waveforms, respectively. Figure 12 is a complete schematic of the final set top box power supply configuration. The overall power supply performance of the different configurations was generally very good with the exception of the cross--regulation effects of Configuration #1 and #1A, mainly due to the more complex transformer structure and the associated leakage inductance effects. Configuration #2 was by far the “cleanest” in terms of overall performance with respect to regulation, low output ripple, over--current protection, and ease of testing due to the fact that all outputs were regulated independently. Configuration #4 was the most efficient because only one synchronous post regulator was used and that was for the 3.3 volt output. The loop was closed around the 5 volt output Figure 9. Flyback Q1 Mosfet Drain Waveform (50% load) Figure 10. Synchronous Buck Output Ripple (3.3 V) http://onsemi.com 14 TND334 Figure 11. Main 5 Volt Output Ripple L1 L2 C1 AC Input 0.22uF ”X” cap TH1 D2 D4 R1 1M C2 0.22uF ”X” cap 10 ohm 3 amp D3 C38 1nF ”Y” R20 2.2nF 1kV R5 220K 5 Input OVP Q2 D6 (3.3V) Power Fail Synchronous Rectifier Block Vcc Q6 NTB60N06LT A 1T R27 20K MMBT2907A MMBT2222A C23 0.1 50T MMBT2222A R28 1K Q7 1nF 100 Sync 7 Rectifier B Block Vcc A Sync B A Rectifier 5 Block D12 1K R26 4 3 C7 22uF 35V R11 1K R9 (75) R10 82K 1 4 9 R12 R14 R13 4.7K 1K C18 C19 1200uF 6.3V x 3 C24,25,26 R30 1 Power Fail Detect R17 R16 2 MMSZ5226B 47K 3 D9 (TBD) H11A817A U3 TL431 C9 R19 R15 10nF 1K 4.7K R18 C10 4.7K 0.1 R31 1K C20 680 16V 4.7uH R29 10K R24 12V C21 0.1 C28 0.1 C31 0.1 100 Error Amp R32 C32 10K U6 TL431A R33 5.1K 0.1 R34 5.1K R25 NOTES: 1. Crossed schematic lines are not connected. 2. Generic part types are indicated. 3. Q1 requires small heatsink. 4. D10 ident not used. 5. Heavy lines show recommended ground-plane/copper pour areas. 50 Watt, 4 Output Quasi--Resonant Set Top Box Power Supply with Synchronous Rectifiers (Rev 6) Figure 12. Schematic of Final Set Top Box Power Supply (Configuration #4 ) http://onsemi.com 15 3.3V 4.7uH C27 L5 1200 6.3V 270 C30 25V U5 270 MURA110 --5V 25V reg D8 D13 MC79L05 U2 L3 NTD-4808N 0.1 C17 C16 1200 6.3V C29 10 MMSD4148T 4 Q3 10uH Q5 C15 1nF 8 13 C8 100pF 4 NTD4808N T2 C22 MMSD4148T Q9 B 2 C6 1nF R7 1K MMBT2222A C5 0.1 6 3 Q4 680, 16V x 2 L4 D7 MMSD4148T 1 MMSZ5226B MMBT2222A R6 4.3K NCP1308 8 6 10 C14 0.1 16K 5.1K 6 R8 4.7K U1 50nF R21 R3 0.33 1W R4 4.7K C12 10K D5 MRA4007T 2 Q1 NDF 04N60Z 270 400V D1 T C13 100pF 12 R2 47K 0.5W C3 T1 C4 2.2K 2.5A MRA4007T X 4 C11 U4 0.1 1 5 2 8 7 NCP1587 F1 QR Flyback Converter R22 EMI Filter Coilcraft BU series or similar R23 D11 MURA110 Synchronous Buck (3.3V) 5V Com --5V TND334 MAGNETICS DESIGN DATA SHEET Project / Customer: 50W, 4 Output Set Top Box PSU Part Description: Quasi--resonant flyback transformer (type 3) Schematic ID: T1 Core Type: ETD29 (Ferroxcube 3C90 material or equivalent) Core Gap: Gap for 400 uH +/-- 5% Inductance: 380 to 420 uH nominal across primary (pins 13 to 1) Bobbin Type: ETD29 13 pin horizontal pc mount (Ferroxcube PC1--29H) Windings (in order): Winding # / type Turns / Material / Gauge / Insulation Data Aux winding (1 -- 13) 7 turns of # 26HN spiral wound over bobbin base. Self--leads to pins. Insulate for 1 kV to next winding. Primary (2 -- 12) 42 turns of #26HN over one layer; cuff ends with tape. Insulate with tape for 3 kV. Self--leads to pins 5V/--5V/12V Secondaries (5 -- 8) (4 -- 9) (6 -- 7) 3 turns multifilar of 5 strands of #26HN with 2 brown strands (5V), 1 green strand (--5V) and 2 tan strands (12V). Flat wind over one layer and then continue with the 2 tan strands for one more turn. The tan wire is the 12V stacked winding. Center winding by allowing approximately 5 mm end margins. Self--leads to pins per schematic below. Final insulate with tape. . Hipot: 3 kV primary/aux to all secondaries. Vacuum varnish. Schematic Lead Breakout / Pinout Bottom (pin side) view Pri Aux 2 7 12 6 8 13 5 1 9 4 1 2 3 12V 4 5 6 5V --5V 13 12 11 10 9 8 7 Figure 13. Flyback Transformer Design of Final STB Power Supply (Configuration #4) http://onsemi.com 16 TND334 8 Bill of Materials for Final Set Top Box PSU (Configuration #4) Part Qty ID Description Comments Semiconductors MRA4007T3G MMSD4148T1 MMBT2222AWT1 MMBT2907AWT1 NCP1308 NDF04N60Z NTD4808N (DPak) NTB60N06LT4G (D2Pak) NCP1587 Optocoupler MURA110 MMSZ5226B MC79L05 TL431A (SOIC8) 5 4 6 2 1 1 2 2 1 1 2 2 1 2 D1, 2, 3, 4, 5 D7, D8, D12A, D12B Q2, 3, 7A, 7B, 8A, 8B Q9A, Q9B U1 Q1 Q4, Q5 Q6A, Q6B U4 U2 D11, D13 D6, D9 U5 U3, U6 1A, 800V diode 100 mA signal diode 500 mA, 40V NPN xstr 500 mA, 40V PNP xstr Ouasi--resonant PWM controller 4 Amp, 600 V Mosfet N--channel Mosfet, 30V N--channel Mosfet, logic level Synchronous buck controller H11A817A (4 pin) or similar 1A, 100V ultrafast diode 3.3V Zener diode Negative 5V regulator, TO--92 Programmable zener ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor Vishay ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor Capacitors ”X” cap, (box package) ”Y” cap, disc package Ceramic cap, disc Ceramic cap, monolythic Ceramic cap, monolythic Ceramic cap, monolythic Ceramic cap, monolythic Ceramic cap, monolythic Electrolytic cap Electrolytic cap Electrolytic cap Electrolytic cap Electrolytic cap 2 1 1 11 1 1 2 4 2 1 5 3 1 C1, C2 C38 C4 C5,10,11,14,17, 21,23A, 23B,28,31,32 C9 C12 C8, C13 C6, C15, C22A, C22B C29, C30 C3 C16,24,25,26,27 C18, C19, C20 C7 220 nF ”X2” capacitor, 270 Vac 1 nF ”Y2” cap, 270 Vac 2.2 nF, 1 kV capacitor (snubber) 0.1 uF, 50V ceramic cap 10 nF, 50V ceramic cap 47 or 50 nF ceramic cap 100 pF, 100V ceramic 1 nF, 50V ceramic cap 270 uF, 25V 270 uF, 400Vdc 1200 uF, 6.3 V (low ESR) 680 uF, 16V 22 uF, 35V Vishay Vishay Vishay Vishay Vishay Vishay Vishay Vishay UCC, Rubycon UCC, Rubycon UCC, Rubycon UCC, Rubycon UCC, Rubycon Resistors Resistor, 1W Resistor, 1/2W Resistor, 1/2W Resistor, 1/2W Resistor, 1/4W Resistor, 1/4W Resistor, 1/4W Resistor, 1/8W Resistor, 1/8W Resistor, 1/8W Resistor, 1/8W Resistor, 1/8W Resistor, 1/8W Resistor, 1/8W Resistor, 1/8W Resistor, 1/8W Resistor, 1/8W Resistor, 1/8W Resistor, 1/8W 1 1 1 1 1 1 1 9 2 3 1 2 1 5 1 1 3 3 1 R3 R1 R2 R5 R25 R10 R24 R7, 11, 13, 19, 25A, 25B, 26A, 26B, 31 R12, R23 R28A, R28B, R30 R9 R27A, R27B R6 R4,8,14,15,18 R21 R16 R20, R29, R32 R22, R33, R34 R17 0.33 ohm, 1W, axial lead 1 Meg, 1/2W, axial lead, metal film 47K, 1/2W, axial lead 220K, 1/2W, 5%, axial lead 1K, 1/4W, 1206 SMD 82K 2.2K 1K 10 ohms 100 ohms 75 ohms 20K 4.3K 4.7K 16K 47K 10K 5.11K TBD (6.2K ?) Ohmite Ohmite Ohmite Ohmite 5% SMD (1206) 5% SMD (1206) 5% SMD (1206) 5% SMD (1206) 5% SMD (1206) 5% SMD (1206) 5% SMD (1206) 5% SMD (1206) 1% SMD (1206) 5% SMD (1206) 1% SMD (1206) 5% SMD (1206) 5% SMD (1206) 1% SMD (1206) 1% SMD (1206) Miscellaneous Fuse (TR5 type) AC input connector Heatsink for NTP06N65 PCB double sided, 2 layers 1 1 1 1 F1 J1 (Q1) 2.5A, 250 Vac GIT # 406015--001--99 TO--220 type, # 542502d00000 Bussmann IEC320?? Aavid Magnetics EMI Inductor EMI Inductor Choke, 4.7 uH, 4A Choke, 10 uH, 3A Flyback Transformer (custom) Current sense transformer (1:50) 1 1 2 1 1 2 L1 L2 L4, L5 L3 T1 T2 BU10--1311R6BL BU16--4021R5BL RFB0807--4R7L RFB0807--100L ETD--29 core, Lp = 385 uH T6522--AL Coilcraft Coilcraft Coilcraft Coilcraft See drawing Coilcraft http://onsemi.com 17 TND334 9 Board Pictures http://onsemi.com 18 TND334 10 Appendix References: • ENERGY STAR®: Set--top boxes specification • MURA110: 1 A, 100 V Ultrafast Rectifier • MMSD4148/D: 100 V Switching Diode • MMSZ5226B: Zener Diode 500 mW 3.3 V ±5% http://www.energystar.gov/index.cfm?c=revisions.setto p_box_spec • EfficientProducts.org http ://www.efficientproducts.org/ • Additional collateral from ON Semiconductor: • NCP1308: Current--Mode Controller for Free Running • • • • • • • • Quasi--Resonant Operation NCP1587: Low Voltage Synchronous Buck Controller TL431A: Programmable Precision Reference MC79L05: 100 mA, 5 V, Negative Voltage Regulator MMBT2222AW: General Purpose Transistor NPN MMBT2907AW: General Purpose Transistor PNP NTD4808N: Power MOSFET 30 V, 63 A, N--Channel NTB60N06L: Power MOSFET 60 Amps, 60 Volts, Logic Level • • • SOD--123 Design note DN06008/D: NCP1308: ±18 V Dual Output Power Supply Application Note AND8129/D: A 30 W Power Supply Operating in a Quasi--Square Wave Resonant Mode Application Note AND8089/D: Determining the Free--Running Frequency for QR Systems Application Note AND8252/D: High Efficiency 8 Output, 60 W Set Top Box Power Supply Design GreenPoint® Reference Design TND332/D: 8 W DTA Power Supply Reference Design Documentation GreenPoint is a registered trademark of Semiconductor Components Industries, LLC (SCILLC). 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