150 W High Performance LED Driver Evaluation Board User's Manual

NCL30030GEVB
150 W High Performance
LED Driver Evaluation Board
User'sManual
Overview
www.onsemi.com
This manual covers the specification, theory of operation,
testing and construction of the NCL30030GEVB evaluation
board. The NCL30030 board demonstrates a 150 W high
performance LED driver intended for commercial/
industrial applications. The NCL30030 combines a CrM
PFC boost converter and a QR flyback converter in a single
controller. An integrated HV start up is included in the
NCL30030.
EVAL BOARD USER’S MANUAL
Key Features
As illustrated, the key features of this evaluation board
include:
• Wide Mains including Support for 277 V ac US
Commercial Line Voltage
• Low THD across Line and Load
• High Power Factor across Wide Line and Load
• Remote On/Off (Mains Isolated)
• Integrated Auto−recovery Fault Protection (can be
latched by Choice of Options)
♦ On Board Over Temperature Shutdown via
NCL30030 Fault Input Pin
♦ LED Module Over Temperature Foldback Input (a
remote PTC on LED Array)
♦ Over Voltage
• CC/CV Modes
• Can be Configured for several Dimming Modes
♦ 1 − 10 V dc
♦ 0 – 5 V dc Analog
♦ 0 – 5 V PWM
♦ Bi−level
Table 1. SPECIFICATIONS
Parameter
Value
Input voltage (Class 2 Input,
no ground)
90 − 305 V ac
Line Frequency
50 Hz / 60 Hz
Power Factor (Load > 50%)
THD (Load > 30%)
Comment
0.9
20%
Max
Class 1 Output Mains
Isolated
Output Voltage Range
“Off” Mode CV Output Voltage
60 − 210 V dc
50 V dc
Output Current
710 mA dc
Output Ripple
50 mA P−P
Efficiency
Start Up Time
EMI (conducted)
Dimensions
±2%
90%
Typical
< 300 ms
Typical
Class A
FCC/CISPR
55 mm × 220 mm × 33 mm
Figure 1. Evaluation Board Picture (Top View)
© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 1
1
Publication Order Number:
EVBUM2247/D
NCL30030GEVB
THEORY OF OPERATION
PFC
control rather than on time control or average current
control. CrM boost converters typically have fidelity issues
near the zero crossing of the AC line. This is a natural
consequence of parasitics in the power stage. See a typical
CrM inductor current in Figure 2.
The boost topology is the most common converter type for
high performance power factor correction. Since this boost
converter operates in CrM, the peak to average input current
is always a 2:1 ratio. The converter operates in peak current
Figure 2. Inductor Current across a Line Cycle
Near the zero crossings, the current starts below zero
current. This is a real effect of energy stored in the
capacitance of the FET drain that does not get transferred to
the output capacitor. The consequence for on time
controllers is that the target peak current is never reached in
the on time which results in distortion at the zero crossing.
Figure 3. One Switching Cycle of Boost Inductor Current (simulated)
Peak current control corrects the on time error because the
on time is dependent on the peak current. This will naturally
increase on time at the zero crossing which reduces total
harmonic distortion (THD).
The error amplifier adjusts the gain of a PWM multiplier
to set the peak current threshold in the controller. The
multiplier output needs to be filtered to recover the scaled
current threshold signal. The value of the filter capacitor is
critical to obtain good THD over the entire line range. The
filter capacitor must be large enough to filter the PWM
carrier frequency but not so large as to cause excess phase
lag which will degrade the THD.
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2
NCL30030GEVB
• AC Input – J1 3 Pin Connector
Bi−Level Boost Follower
The HV pin provides start up current for the controller and
sense the HVDC voltage. The boost output reference for the
control loop is adjusted based on the input voltage. There are
3 options for this: 2:1, 1.77:1, and 1:1 (i.e. fixed output
voltage). This allows the boost converter to operate most
efficiently over a broad range of input voltages.
•
Current Sense and ZCD
1. AC Line
2. nc
3. AC Neutral
LED Output – J2 3 Pin Connector
1. LED +
2. nc
3. LED−
Control – J3 7 Pin Connector
1. 10 V
2. 1−10 V Dimming
3. 0−5 V Analog or Digital PWM Dimming
4. Lamp TCO
5. Bi−level Dimming
6. On−Off
7. Common
The current sense and ZCD are combined on one pin as
illustrated in Figure 5. During the switch on time, the peak
current is sensed through R24. D11 blocks the negative
voltage from the sense winding from affecting the current
sense. During the off time, D11 forward biases and pull the
pin high through R26. Collapsing voltage on the boost
inductor signals that the current has gone to zero and starts
a new switch cycle.
•
Flyback
Control Connections
The flyback converter isolates the output from the mains
and provides power for the secondary side control. For this
specific design given the high output voltage of the PFC Bus
rail and the high voltage range of the output, a two switch
flyback configuration was selected. The two switch
operation for the flyback optimizes efficiency because the
leakage energy is recycled back to the primary energy
storage. One limitation of the two switch flyback is that the
reflected output voltage must be less than the input voltage
otherwise all of the stored energy in the transformer will be
returned to the input energy storage. Since the turns ratio is
1:1 and the maximum output voltage is 210 V, that condition
is satisfied.
The converter operates in quasi−resonant mode. At heavy
loads, the turn on edge is timed to the first valley like CrM
mode. At progressively lighter loads, the controller moves
the turn on edge to progressively higher order valleys. The
voltage on the control determines the valley of operation.
There are several important benefits of this technique.
1. The frequency is more stable over the load range
2. The peak current remains higher across load as the
switching frequency is reduced. This keeps the
signal−to−noise ratio high on the CS pin.
10V
This connection provides a current limited 10 V source
which can be used to power the dimming interface. Current
is limited to 10 mA through a 1 kW resistor.
LED Lamp TCO
The LED assembly may have a PTC that “opens” when
the LED assembly exceeds a safe temperature. The cold
value of the PTC should be approximately 470 W and the
transition resistance should be greater than 5 kW. The action
of the TCO folds back the output current to maintain the
temperature at a safe level but does not turn the LEDs
completely off.
NOTE: Connect the Lamp TCO connection to common
if a TCO is not used.
On−Off
The driver can be turned “off” from the secondary side.
An open on the on−off connection defaults to “off”. Connect
the on−off connection to common to turn on the driver. Off
mode operates the output in a low voltage (50 V) CV mode
such that the output voltage is below the LED operational
voltage.
Feedback Control
Dimming Control Mode Setup
The NCL30030 has no internal error amplifier for the
flyback control. The feedback pin directly programs the
peak current and sets the valley selection. There is a current
source that pulls up the FB pin. Consequently, the control is
setup for secondary side feedback only.
The evaluation board can be configured to support
numerous dimming configurations; only one type of
dimming is supported at a time. In addition to a 1−10 V
Dimming interface, analog, digital and bi−level options are
supported. Bi−level can be used in conjunction with motion
sensors or timers to provide two light output levels
depending on the use case.
Connections to the Evaluation Board
There are several connections necessary to operate the
evaluation board.
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3
NCL30030GEVB
Table 2. CONFIGURING THE BOARD FOR DIMMING CONTROL
Mode
1 − 10 V
Connection
1 − 10 V
0 − 5 V Analog
1 − 10 V Analog Voltage
Open
0 − 5 V Analog
Open
Bi−Level
Open
0 − 5 Analog Voltage
N/A
Open
N/A
0 − 5 V Digital Input
Freq > 400 Hz
Open
0 − 5 V Digital
Bi−level
0 − 5 V Digital
Open
Open
Open = High Current
GND = Low Current
Modifications
Over Voltage Protection
It is possible for the user to select different operating
conditions for the evaluation board such as output current,
over voltage threshold, and over temperature threshold.
Zener D19 is used to set the primary side over voltage fault
protection level. As built, the CV loop will prevent an OV
fault under normal circumstances. D19 pulls up the fault pin
on U1 to trigger a fault. The fault shuts down U1 for
4 seconds and then recycles the fault latch. A non−resetting
latch is an option for U1. The set point for the trip point is
calculated as follows:
Output Current
R9 and R44 set the output current. R44 is a trim resistor
to make fine adjustments to the current set point. The
reference voltage for U2 is 62.5 mV. Ioutput is calculated as
follows:
I output +
OV + Vd19
30%
62.5 mV (R9 ) R44)
R9 R44
D19 must be replaced to change the OV threshold.
Thermal Protection
The low reference voltage makes even the copper PCB
trace resistance important in setting the output current.
There are limitations to setting the current without making
major component changes. Generally the current can
adjusted from 0.5 A – 1.0 A.
The evaluation board has an onboard thermal shutdown
utilizing the NTC R3 connected to the fault pin of U1. As R3
heats, the output current will shut off until the NTC cools
down. R3 can be replaced with a fixed resistor if no thermal
protection is desired.
CV Regulation
As illustrated in Figure 7, the NCP4328A (U2) also serves
as the CV regulator loop control. R12, R13, R14, and R28
set the CV output. As built, the evaluation board CV point
is 210 V dc. The reference voltage for the CV loop is 1.25 V.
R13 and R28 are in parallel. Their equivalent resistance is:
R eq + R13
R13
R28
R28
CV regulation is calculated as follows:
CV +
R13 ) Req ) R14
Req
1.25 V
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4
NCL30030GEVB
SCHEMATIC
F1
J1
L1
2A25 Slo
1
2
3
R1
320 V
CON3
D1
L2
C1
C4
C2
470nF
470nF
6.8mH
470nF
6.8mH
AC1
+
AC2
−
HVDC_Rect
GBU8M−BP
Figure 4. Input Circuit
D18
D15
MURS480ET3G
HVDC_Rect
R42
C6
Vcc
TX1
R6
620k
R43
Q1
16.9k
Vcc_Reg
D11
BAS16XV2T1G
2N5551G
R7
R5
27k
10uF 100V
Cvcc
27uF
R2
C29
10
Vcc
1uf
16
10k
D10
MMSZ18T1
Qdrv
12
Qzcd
9
Qcs
11
8
FB
6
R8
100k
C22
QDRV Pon/off
QZCD PDRV
QCS
Pcomp
QFB
Mult
QCTGND Fault
NCL30030
R26
Rgdp
13
100
4
3
Qfet1
AOTF20S60L
Rgdp1 D22
7
10
15
C8
C19
10nF
100nF
MBR0540T1G
C32
R24
2.2uF
220pF
1k
R10
20k
D16
C25
Rsens1
0.12
47nF
OVP
BAS21DW5T1G
C9
68uF 500V
Vboost = 450V @ High Line
5
C7
C23
68uF 500V
Vboost = 250V @ Low Line
1k
14
220pF
C21
620k
U1
1
BO/HV
Pfb PCS/ZCD
Vboost
33uH
NHPJ08S600G
16.9k
470nF
C24
L4
R3
R51
47nF 47k NTC
1k
Figure 5. PFC Schematic
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5
NCL30030GEVB
Dboot
MURA160T3G
Vboost
Vcc_Reg
1
Qdrv
2
3
R57
C33
4
100
1uf
U12
1uf
VCC
VB
In_H
HO
In_L
VS
Com
LO
8
C31
Qfet2
R53
7
AOTF20S60L
10
6
5
T1
C35
STTH810FP
LED+
D21
Qdrv_LO
1nF
220p 1kV
Dout
1:1
NCP5106ADR2G
C34
MURA160T3G
C14
D13
R25
D20
LED_rtn
Qzcd
D25
R32
BAT54T1G
C27
2N5551G
10
C18
UFM15PL
22pF
2.49k
Q2
D12
R58
UFM15PL
10k
4.7uF 250V
MURA160T3G
10uF 100V
D4
D19
V10
R50
10k
R23 C30
7.50k
OVP
MMSZ5267BT1G
22uF 50V
UFM15PL
U11
Vcc
Qdrv_LO
C17
Qfet
R54
AOTF20S60L
C26
TL431
10nF Y1
R27
220p 1kV
10
2.49k
R4
1k
Qcs
Rsens
C36
0.25
100pF
Figure 6. Flyback Schematic
L3
100uH
LED+
Active Preload
Iset = 700mA
R44
Qfet3
1.5
R52
J2
R14
1
2
3
604k
4.7k 1W
BSS127S−7
CON3
On/Off
R9
LED_rtn
0.09
R12
V10
R19
U6
1
2
3.32k
R48
U2A
10k
50V out = ”off”
R28
4
I
NCP4328A
C37
1k
V 5
3
FOD817A3SD
On/Off
R47
63.4k
10k
Current Control Loop
220pF
604k
R22
1
3
2
4
OVP = 210 V
R13
C10
R49
8.06k
R11
4.7nF
100k
10k
Ireg
C11
D14
100nF
R15
165k
R20
V10
10k
BAS21DW5T1G
U7A
1
1k
FB
Voltage Control Loop
V 5
3
I
Overtemp Foldback
4
TCO
2
R16
R21
NCP4328A
160k
C13
4.7nF
Figure 7. Control Schematic
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6
NCL30030GEVB
V10
C28
U9A
8
1uf
On/Off
+
1
R17
R18
R46
100k
100k
110k
On−Off − Open = ”Off”
V10
2
R31
4
−
3
LM358
R30
R40
24.9k
5.49k
R45
1k
1k
C15
1
2
3
4
5
6
7
2.2uf
V10
R34
+
7
−
LM358
5
R36
BAS21DW5T1G
1k
C12
D17
Ireg
Bi−level
R33
6
4
100k
U9B
8
100k
R35
100nF
R37
1−10V
100k
110k
V10
5
R39
U10
+
1
0−5V Analog or PWM
47.5k
3
Open Dimming Lines = Minimum Output
4
2
−
TLV271SN2T1G
J3
R38
R41
5.49k
5.49k
TCO
R29
1k
C16
47nF
Figure 8. Dimming Interface
BILL OF MATERIAL
Table 3. BILL OF MATERIAL*
Qty
Reference
Part
Manufacturer
Mfr_PN
PCB Footprint
Substitutions
Allowed
1
Cvcc
27uF
Panasonic
EEU−FC1E270
CAP_AL_5X11
Yes
4
C1,C2,C4, C6
470nF
Epcos
B32923C3474K
CAP−BOX−LS22M5−26MX7M
Yes
3
C7,C22, C37
220pF
Yageo
CC0805JRNPO9BN221
805
Yes
1
C8
10nF
AVX
0805YA103JAT2A
805
Yes
3
C9,C16, C25
47nF
Yageo
CC0805KRX7R9BB473
805
Yes
2
C10,C13
4.7nF
Yageo
CC0805KRX7R9BB472
805
Yes
3
C11,C12, C19
100nF
Yageo
CC0805KRX7R9BB104
805
Yes
1
C14
4.7uF 250V
Panasonic
ECQ−E2475KB
CAP−BOX−LS175−8M5X18
Yes
1
C15
2.2uf
Taiyo Yuden
UMK212BB7225KG−T
805
Yes
1
C17
10nF Y1
Vishay
440LS10−R
Cap_disc_20mm
Yes
2
C18,C24
10uF 100V
Rubycon
100PK10MEFC5X11
CAP_AL_5X11
Yes
1
C21
68uF 500V
Nichicon
UCY2H680MHD
CAP−ALEL−18X42−HOR−REV
Yes
1
C23
68uF 500V
Nichicon
UCY2H680MHD
CAP−ALEL−18X42−HOR
Yes
2
C26,C34
220p 1kV
Kemet
R76QD0220SE00J
CAP−BOX−LS5−3M5X7M2
Yes
1
C27
22pF
Yageo
CC0805JRNPO9BN220
805
Yes
4
C28,C29,
C31,C33
1uf
Yageo
CC0805KKX7R8BB105
805
Yes
1
C30
22uF 50V
Rubycon
50YXM22MEFC5X11
CAP_AL_5X11
Yes
1
C32
2.2uF
Yageo
CC0805KKX7R6BB225
805
Yes
*All Components to be RoHS Compliant
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7
NCL30030GEVB
Table 3. BILL OF MATERIAL*
Qty
Reference
Part
Manufacturer
Mfr_PN
PCB Footprint
Substitutions
Allowed
1
C35
1nF
Yageo
CC0805JRNPO9BN102
805
Yes
Yes
1
C36
100pF
Yageo
CC0805JRNPO9BN101
805
3
D13,D21, Dboot
MURA160T3G
ON Semiconductor
MURA160T3G
SMA
No
1
Dout
STTH810FP
ST
STTH810FP
TO−220−2_vert
Yes
1
D1
GBU8M−BP
MCC
GBU8M−BP
4P_inline
Yes
3
D4,D12, D20
UFM15PL
MCC
UFM15PL
SOD123FL
Yes
1
D10
MMSZ18T1
ON Semiconductor
MMSZ18T1
SOD123FL
No
1
D11
BAS16XV2T1G
ON Semiconductor
BAS16XV2T1G
SOD523
No
3
D14,D16, D17
BAS21DW5T1G
ON Semiconductor
BAS21DW5T1G
SC−88A
No
1
D15
NHPJ08S600G
ON Semiconductor
NHPJ08S600G
TO−220−UP
No
1
D18
MURS480ET3G
ON Semiconductor
MURS480ET3G
SMC
No
1
D19
MMSZ5267BT1G
ON Semiconductor
MMSZ5267BT1G
SOD123FL
No
1
D22
MBR0540T1G
ON Semiconductor
MBR0540T1G
SOD123FL
No
1
D25
BAT54T1G
ON Semiconductor
BAT54T1G
SOD123FL
No
1
F1
2A25 Slo
Littelfuse
02092.25MXEP
15mm_axial
Yes
2
J1,J2
CON3
Wurth
6.91E+11
Conn_3P_Scrmnt
Yes
1
J3
CON7
On Shore
OSTTA074163
Conn_7P_Scrmnt
Yes
2
L1,L2
6.8mH
Wurth
7.5E+08
HOR−4P−19X10
Yes
1
L3
100uH
Wurth
7.45E+08
Rad_Ind_LS5
Yes
1
L4
33uH
Wurth
7.45E+08
Rad_Ind_LS5
Yes
3
Qfet1,Qfet2, Qfet
AOTF20S60L
AOS
AOTF20S60L
TO−220−3−Vert
Yes
1
Qfet3
BSS127S−7
Diodes
BSS127S−7
SOT23
Yes
2
Q1,Q2
2N5551G
ON Semiconductor
2N5551G
TO92
No
2
R57,Rgdp
100
Yaego
RC0805FR−07100RL
805
Yes
4
Rgdp1,R53,
R54,R58
10
Yaego
RC0805FR−0710RL
805
Yes
1
Rsens
0.25
Vishay
WSL2512R2500FEA
2512
Yes
1
Rsens1
0.12
Yaego
RL2512FK−070R12L
2512
Yes
1
R1
320 V
Epcos
S20K320E2
MOV_20mm_disc
Yes
6
R2,R20, R25,R47,
R48,R49
10k
Yaego
RC0805FR−0710KL
805
Yes
1
R3
47k NTC
Epcos
B57431V2473J62
805
Yes
10
R4,R16,R22,R24,
R26,R29,
R31,R33,
R45,R51
1k
Yaego
RC0805FR−071KL
805
Yes
1
R5
27k
Yaego
RC0805FR−0727KL
805
Yes
2
R6,R7
620k
Yageo
RC1206FR−07620KL
1206
Yes
7
R8,R11, R17,R18,
R34,R35, R37
100k
Yaego
RC0805FR−07100KL
805
Yes
1
R9
0.09
Vishay
WSL1206R0900FEA
1206
Yes
1
R10
20k
Yaego
RC0805FR−0720KL
805
Yes
2
R12,R14
604k
Yageo
RC1206FR−07604KL
1206
Yes
1
R13
8.06k
Yaego
RC0805FR−078K06L
805
Yes
1
R15
165k
Yaego
RC0805FR−07165KL
805
Yes
1
R19
3.32k
Yaego
RC0805FR−073K32L
805
Yes
1
R21
160k
Yaego
RC0805FR−07160KL
805
Yes
1
R23
7.50k
Yaego
RC0805FR−077K5L
805
Yes
2
R27,R32
2.49k
Yaego
RC0805FR−072K49L
805
Yes
*All Components to be RoHS Compliant
www.onsemi.com
8
NCL30030GEVB
Table 3. BILL OF MATERIAL*
Qty
Reference
Part
Manufacturer
Mfr_PN
PCB Footprint
Substitutions
Allowed
1
R28
63.4k
Yaego
RC0805FR−0763K4L
805
Yes
1
R30
24.9k
Yaego
RC0805FR−0724k9L
805
Yes
2
R36,R46
110k
Yaego
RC0805FR−07110KL
805
Yes
3
R38,R40, R41
5.49k
Yaego
RC0805FR−075K49L
805
Yes
1
R39
47.5k
Yaego
RC0805FR−0747K5L
805
Yes
2
R42,R43
16.9k
Yageo
RC1206FR−0716K9L
1206
Yes
1
R44
1.5
Yageo
RC1206FR−071R5L
1206
Yes
1
R50
10k
Yaego
RC1206FR−0710KL
1206
Yes
1
R52
4.7k 1W
Yageo
RSF100JB−73−4K7
15MM_Axial
Yes
1
TX1
XFRM_LINEAR
Wurth
7.5E+08
PQ2625−X12
Yes
1
T1
XFRM_LINEAR
Wurth
750314657 Rev3
ER2817
Yes
1
U1
NCL30030
ON Semiconductor
NCL30030B1DR2G
SO16−P2
No
2
U2,U7
NCP4328A
ON Semiconductor
NCP4328A
TSOP−5
No
1
U6
FOD817A3SD
Fairchild
FOD817A3SD
4SMD
Yes
1
U9
LM358
ON Semiconductor
LM358DR2G
SO8M1
No
1
U10
TLV271SN2T1G
ON Semiconductor
TLV271SN2T1G
SOT23−5
No
1
U11
TL431
ON Semiconductor
TL431ACLPRAG
TO92
No
1
U12
NCP5106ADR2G
ON Semiconductor
NCP5106ADR2G
SO8M1
No
*All Components to be RoHS Compliant
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9
NCL30030GEVB
GERBER VIEWS
Figure 9. Top Side PCB
Figure 10. Bottom Side PCB
Figure 11. Top Silkscreen
Figure 12. Bottom Silkscreen
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NCL30030GEVB
CIRCUIT BOARD FABRICATION NOTES
11. Size tolerance of plated holes: ±0.003 in. :
non−plated holes ±0.002 in.
12. All holes shall be ±0.003 in. of their true position
U.D.S.
13. Construction to be SMOBC, using liquid photo
image (LPI) solder mask in accordance with
IPC−SM−B40C, Type B, Class 2, and be green in
color.
14. Solder mask mis-registration ±0.004 in. max.
15. Silkscreen shall be permanent non−conductive
white ink.
16. The fabrication process shall be UL approved and
the PCB shall have a flammability rating of
UL94V0 to be marked on the solder side in
silkscreen with date, manufactures approved logo,
and type designation.
17. Warp and twist of the PCB shall not exceed
0.0075 in. per in.
18. 100% electrical verification required.
19. Surface finish: electroless nickel immersion gold
(ENIG)
20. RoHS compliance required.
1. Fabricate per IPC−6011 and IPC6012. Inspect to
IPA−A−600 Class 2 or updated standard.
2. Printed Circuit Board is defined by files listed in
fileset.
3. Modification to copper within the PCB outline is
not allowed without permission, except where
noted otherwise. The manufacturer may make
adjustments to compensate for manufacturing
process, but the final PCB is required to reflect the
associated gerber file design ±0.001 in. for etched
features within the PCB outline.
4. Material in accordance with IPC−4101/21, FR4,
Tg 125°C min.
5. Layer to layer registration shall not exceed
±0.004 in.
6. External finished copper conductor thickness shall
be 0.0026 in. min. (ie 2oz)
7. Copper plating thickness for through holes shall be
0.0013 in. min. (ie 1oz)
8. All holes sizes are finished hole size.
9. Finished PCB thickness 0.062 in.
10. All un-dimensioned holes to be drilled using the
NC drill data.
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NCL30030GEVB
FLYBACK TRANSFORMER SPECIFICATION
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NCL30030GEVB
PFC INDUCTOR SPECIFICATION
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NCL30030GEVB
ECA PICTURES
Figure 13. Top View
Figure 14. Bottom View
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NCL30030GEVB
Figure 15. NCL30030 Heatspreader
TEST PROCEDURE
Equipment Needed
Test Connections
• AC Source – 90 to 305 V ac 50/60 Hz Minimum 500 W
1. Connect the LED Load to J2 through the ammeter
shown in Figure 16.
WARNING: Observe the correct polarity or the load may
be damaged.
2. Connect the AC power card to J1 and connect the
other end to the AC wattmeter shown in Figure 16.
3. Connect a Switch between J3−6 and J3−7. This
switch will provide on/off control.
4. Short J3−4 to J3−7. This replaces the external
TCO.
5. Connect a 100k Potentiometer to J3 as follows:
high side to J3−1, wiper to J3−2, low side to J3−7.
6. Connect the DC voltmeter as shown in Figure 16.
capability
• AC Wattmeter – 300 W Minimum, True RMS Input
•
•
•
Voltage, Current, Power Factor, and THD 0.2%
accuracy or better
DC Voltmeter – 300 V dc minimum 0.1% accuracy or
better
DC Ammeter – 1 A dc minimum 0.1% accuracy or
better
LED Load – 50 V – 210 V @ 1 A
AC Power
AC
Source
Wattmeter
UUT
DC Ammeter
DC Voltmeter
NOTE: Unless otherwise specified, all voltage measurements are taken at the terminals of the UUT.
Figure 16. Test Set Up
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LED Test
Load
NCL30030GEVB
Functional Test Procedure
3. Set the input power to 120 V 60 Hz.
WARNING: Do not touch the ECA once it is energized
because there are hazardous voltages
present.
4. Close the On/off switch.
1. Set the potentiometer to about 50% of its rotation.
NOTE: The on−off switch should be in the open state
until instructed otherwise.
2. Set the LED Load for 60 V output.
LINE AND LOAD REGULATION
Table 4. 120 V / MAX LOAD
Set the potentiometer fully CW (i.e. maximum output)
Output Current
710 mA + 14 mA
Output Power
Power Factor
Output Power
Power Factor
Output Power
Power Factor
Output Power
Power Factor
THD < 20%
60 V
120 V
210 V
Table 5. 120 V / MIN LOAD
Set the potentiometer fully CCW (i.e. minimum output)
Output Current
70 mA Max
60 V
120 V
210 V
Table 6. 277 V / MAX LOAD
Set the potentiometer fully CW (i.e. maximum output)
Output Current
710 mA + 14 mA
60 V
120 V
210 V
Table 7. 277 V / MIN LOAD
Set the potentiometer fully CCW (i.e. minimum output)
Output Current
70 mA Max
60 V
120 V
210 V
Efficiency + Vout Iout
Pin
100%
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THD < 20%
NCL30030GEVB
TEST DATA
Figure 17. Power Factor over Line and Load
Figure 18. THD over Line and Load
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NCL30030GEVB
Figure 19. Efficiency over Line and Load @ 60 V dc Output
Figure 20. Efficiency over Line and Load @ 120 V dc Output
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NCL30030GEVB
Figure 21. Efficiency over Line and Load @ 210 V dc Output
Figure 22. Minimum Load Regulation over Line
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NCL30030GEVB
Figure 23. Maximum Load Regulation over Line
Figure 24. Ripple Current at 120 V ac Maximum Load
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NCL30030GEVB
Figure 25. Ripple Current at 277 V ac Maximum Load
Figure 26. Start Up with AC Applied 120 V Maximum Load
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NCL30030GEVB
Figure 27. Start Up with On/Off 120 V Maximum Load
Figure 28. Start Up with AC Applied 277 V Maximum Load
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NCL30030GEVB
Figure 29. Start Up with AC Applied 277 V Maximum Load
Figure 30. Conducted EMI Pre−compliance QP Data 150 kHz − 1 MHz
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NCL30030GEVB
Figure 31. Conducted EMI Pre−compliance Peak Data 150 kHz − 30 MHz
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NCL30030GEVB
Figure 32. IEC61000−3−2 Report 277 V 50% Load 60 Hz
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NCL30030GEVB
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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EVBUM2247/D
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