FSTYC9055D, FSTYC9055R TM Data Sheet Radiation Hardened, SEGR Resistant P-Channel Power MOSFETs The Discrete Products Operation of Intersil has developed a series of Radiation Hardened MOSFETs specifically designed for commercial and military space applications. Immunity to Single Event Effects (SEE) is combined with 100K RADs of total dose hardness to provide devices which are ideally suited to harsh space environments. The dose rate and neutron tolerance necessary for military applications have not been sacrificed. The Intersil portfolio of SEGR resistant radiation hardened MOSFETs includes N-Channel and P-Channel devices in a variety of voltage, current and on-resistance ratings. Numerous packaging options are also available. This MOSFET is an enhancement-mode silicon-gate power field-effect transistor of the vertical DMOS (VDMOS) structure. It is specially designed and processed to be radiation tolerant. The MOSFET is well suited for applications exposed to radiation environments such as switching regulation, switching converters, motor drives, relay drivers and drivers for high-power bipolar switching transistors requiring high speed and low gate drive power. This type can be operated directly from integrated circuits. June 2000 File Number 4755.1 Features • 64A, -60V, rDS(ON) = 0.023Ω • Total Dose - Meets Pre-RAD Specifications to 100K RAD (Si) • Typical SEE Immunity - LET of 36MeV/mg/cm2 with VDS up to 80% of Rated Breakdown and VGS of 0V - LET of 26MeV/mg/cm2 with VDS up to 100% of Rated Breakdown and VGS of 5V Off-Bias • Dose Rate - Typically Survives 3E9 RAD (Si)/s at 80% BVDSS - Typically Survives 2E12 if Current Limited to IDM • Photo Current - 6nA Per-RAD (Si)/s Typically • Neutron - Maintain Pre-RAD Specifications for 3E13 Neutrons/cm2 - Usable to 3E14 Neutrons/cm2 Symbol D Reliability screening is available as either commercial, TXV equivalent of MIL-S-19500, or Space equivalent of MIL-S-19500. Contact Intersil for any desired deviations from the data sheet. G S Formerly available as type TA17750T. Ordering Information RAD LEVEL Packaging SCREENING LEVEL PART NUMBER/BRAND 10K Commercial FSTYC9055D1 10K TXV FSTYC9055D3 100K Commercial FSTYC9055R1 100K TXV FSTYC9055R3 100K Space FSTYC9055R4 1 SMD2 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000 FSTYC9055D, FSTYC9055R Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified FSTYC9055D, FSTYC9055R UNITS -60 -60 V V 64 41 192 ±20 A A A V 162 65 1.30 192 64 192 -55 to 150 300 W W W/ oC A A A oC oC Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulsed Avalanche Current, L = 100µH, (See Test Figure) . . . . . . . . . . . . . . . . . . . . . . . . IAS Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pulsed Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL (Distance >0.063in (1.6mm) from Case, 10s Max) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. TC = 25oC, Unless Otherwise Specified Electrical Specifications PARAMETER SYMBOL Drain to Source Breakdown Voltage Gate Threshold Voltage BVDSS VGS(TH) TEST CONDITIONS ID = 1mA, VGS = 0V VGS = VDS, ID = 1mA Zero Gate Voltage Drain Current IDSS VDS = -48V, VGS = 0V Gate to Source Leakage Current IGSS VGS = ±20V Drain to Source On-State Voltage Drain to Source On Resistance VDS(ON) rDS(ON)12 Turn-On Delay Time td(ON) Rise Time tr Turn-Off Delay Time td(OFF) Fall Time TC = -55oC TC = 25oC TC = 125oC TC = 25oC TC = 125oC TC = 25oC TC = 125oC VGS = -12V, ID = 64A ID = 41A, VGS = -12V TC = 25oC TC = 125oC VDD = -30V, ID = 64A, RL = 0.47Ω, VGS = -12V, RGS = 2.35Ω tf Total Gate Charge Qg(TOT) VGS = 0V to -20V Gate Charge at 12V Qg(12) VGS = 0V to -12V Threshold Gate Charge Qg(TH) VGS = 0V to -2V Gate Charge Source VDD = -30V, ID = 64A Qgs Gate Charge Drain Qgd Plateau Voltage V(PLATEAU) Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Thermal Resistance Junction to Case 2 RθJC MIN TYP MAX UNITS -60 - - V - - -7.0 V -2.0 - -6.0 V -1.0 - - V - - 25 µA - - 250 µA - - 100 nA - 200 nA - - -1.60 V - 0.016 0.023 Ω - - 0.037 Ω - - 60 ns - - 45 ns - - 90 ns - - 35 ns - - 330 nC - 160 190 nC - - 18 nC - 51 71 nC - 31 46 nC ID = 64A, VDS = -15V - -7 - V VDS = -25V, VGS = 0V, f = 1MHz - 7100 - pF - 2130 - pF - 370 - pF 0.77 oC/W - - FSTYC9055D, FSTYC9055R Source to Drain Diode Specifications PARAMETER SYMBOL Forward Voltage VSD Reverse Recovery Time TEST CONDITIONS ISD = 64A trr MIN TYP MAX UNITS -0.6 - -1.8 V - - 120 ns ISD = 64A, dISD/dt = 100A/µs Electrical Specifications up to 100K RAD TC = 25oC, Unless Otherwise Specified PARAMETER MIN MAX UNITS (Note 3) BVDSS VGS = 0, ID = 1mA -60 - V Gate to Source Threshold Volts (Note 3) VGS(TH) VGS = VDS, ID = 1mA -2.0 -6.0 V Gate to Body Leakage (Notes 2, 3) IGSS VGS = ±20V, VDS = 0V - 100 nA Drain to Source Breakdown Volts SYMBOL TEST CONDITIONS Zero Gate Leakage (Note 3) IDSS VGS = 0, VDS = -48V - 25 µA Drain to Source On-State Volts (Notes 1, 3) VDS(ON) VGS = -12V, ID = 64A - -1.60 V Drain to Source On Resistance (Notes 1, 3) rDS(ON)12 VGS = -12V, ID = 41A - 0.023 Ω NOTES: 1. Pulse test, 300µs Max. 2. Absolute value. 3. Insitu Gamma bias must be sampled for both VGS = -12V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS . Single Event Effects (SEB, SEGR) Note 4 ENVIRONMENT (NOTE 5) TYPICAL LET (MeV/mg/cm) TYPICAL RANGE (µ) APPLIED VGS BIAS (V) (NOTE 6) MAXIMUM VDS BIAS (V) TEST SYMBOL ION SPECIES Single Event Effects Safe Operating Area SEESOA Ni 26 43 20 -60 Br 37 36 10 -60 Br 37 36 15 -36 Br 37 36 20 -24 NOTES: 4. Testing conducted at Brookhaven National Labs; witnessed by Naval Surface Warfare Center (NSWC), Crane, IN. 5. Fluence = 1E5 ions/cm2 (typical), TC = 25oC. 6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR). Performance Curves Unless Otherwise Specified LET = 26MeV/mg/cm2, RANGE = 43µ LET = 37MeV/mg/cm2, RANGE = 36µ -70 1E-3 LIMITING INDUCTANCE (HENRY) FLUENCE = 1E5 IONS/cm2 (TYPICAL) -60 VDS (V) -50 -40 -30 -20 -10 TEMP = 25oC 0 0 5 10 15 20 25 VGS (V) FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA 3 1E-4 ILM = 10A 30A 1E-5 100A 300A 1E-6 1E-7 -10 -30 -100 -300 DRAIN SUPPLY (V) FIGURE 2. DRAIN INDUCTANCE REQUIRED TO LIMIT GAMMA DOT CURRENT TO IAS -1000 FSTYC9055D, FSTYC9055R Performance Curves Unless Otherwise Specified (Continued) 70 500 TC = 25oC ID , DRAIN CURRENT (A) 60 ID , DRAIN (A) 50 40 30 20 100 1ms 10 10ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 10 0 -50 0 50 100 1 -1 150 TC , CASE TEMPERATURE (oC) FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs TEMPERATURE 100µs -10 -100 VDS , DRAIN-TO-SOURCE VOLTAGE (V) -200 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 2.5 PULSE DURATION = 250ms, VGS = -12V, ID = 41A NORMALIZED rDS(ON) 2.0 QG -12V QGS QGD VG 1.5 1.0 0.5 0.0 -80 CHARGE -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) FIGURE 5. BASIC GATE CHARGE WAVEFORM FIGURE 6. NORMALIZED rDS(ON) vs JUNCTION TEMPERATURE NORMALIZED THERMAL RESPONSE (ZθJC) 10 1 0.5 0.1 0.2 0.1 0.05 0.02 0.01 0.01 PDM SINGLE PULSE 0.001 10-5 10-4 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC 10-3 10-2 t1 t2 10-1 100 t, RECTANGULAR PULSE DURATION (s) FIGURE 7. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE 4 101 FSTYC9055D, FSTYC9055R Performance Curves Unless Otherwise Specified (Continued) IAS , AVALANCHE CURRENT (A) 500 STARTING TJ = 25oC 100 STARTING TJ = 150oC IF R = 0 tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD) IF R ≠ 0 tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1] 10 0.1 10 1 tAV, TIME IN AVALANCHE (ms) FIGURE 8. UNCLAMPED INDUCTIVE SWITCHING Test Circuits and Waveforms ELECTRONIC SWITCH OPENS WHEN IAS IS REACHED VDS L BVDSS + CURRENT I TRANSFORMER AS VARY tP TO OBTAIN REQUIRED PEAK IAS 0V tP VDS IAS VDD + 50Ω tP VDD 50V-150V DUT 50W VGS ≤ 20V tAV FIGURE 9. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 10. UNCLAMPED ENERGY WAVEFORMS tON VDD tOFF td(ON) td(OFF) tr VDS RL tf 90% 90% VDS 10% 0V 10% DUT 90% VGS = -12V RGS 50% VGS 50% PULSE WIDTH 10% FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT 5 FIGURE 12. RESISTIVE SWITCHING WAVEFORMS FSTYC9055D, FSTYC9055R Screening Information Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table). Delta Tests and Limits (JANTXV Equivalent, JANS Equivalent) TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MAX UNITS Gate to Source Leakage Current IGSS VGS = ±20V ±20 (Note 7) nA Zero Gate Voltage Drain Current IDSS VDS = 80% Rated Value ±25 (Note 7) µA Drain to Source On Resistance rDS(ON) TC = 125oC at Rated ID ±20% (Note 8) Ω Gate Threshold Voltage VGS(TH) ID = 1.0mA ±20% (Note 8) V NOTES: 7. Or 100% of Initial Reading (whichever is greater). 8. Of Initial Reading. Screening Information TEST JANTXV EQUIVALENT JANS EQUIVALENT Gate Stress VGS = -30V, t = 250µs VGS = -30V, t = 250µs Pind Optional Required Pre Burn-In Tests (Note 9) MIL-S-19500 Group A, Subgroup 2 (All Static Tests at 25oC) MIL-S-19500 Group A, Subgroup 2 (All Static Tests at 25oC) Steady State Gate Bias (Gate Stress) MIL-STD-750, Method 1042, Condition B VGS = 80% of Rated Value, TA = 150oC, Time = 48 hours MIL-STD-750, Method 1042, Condition B VGS = 80% of Rated Value, TA = 150oC, Time = 48 hours Interim Electrical Tests (Note 9) All Delta Parameters Listed in the Delta Tests and Limits Table All Delta Parameters Listed in the Delta Tests and Limits Table Steady State Reverse Bias (Drain Stress) MIL-STD-750, Method 1042, Condition A VDS = 80% of Rated Value, TA = 150oC, Time = 160 hours MIL-STD-750, Method 1042, Condition A VDS = 80% of Rated Value, TA = 150oC, Time = 240 hours PDA 10% 5% Final Electrical Tests (Note 9) MIL-S-19500, Group A, Subgroup 2 MIL-S-19500, Group A, Subgroups 2 and 3 NOTE: 9. Test limits are identical pre and post burn-in. Additional Screening Tests PARAMETER SYMBOL MAX UNITS VDS = -48V, t = 10ms 9.0 A IAS VGS(PEAK) = -15V, L = 0.1mH 192 A Thermal Response ∆VSD tH = 10ms; VH = -25V; IH = 4A 65 mV Thermal Impedance ∆VSD tH = 500ms; VH = -20V; IH = 4A 135 mV Safe Operating Area SOA Unclamped Inductive Switching 6 TEST CONDITIONS FSTYC9055D, FSTYC9055R Rad Hard Data Packages - Intersil Power Transistors TXV Equivalent Class S - Equivalents 1. RAD HARD TXV EQUIVALENT - STANDARD DATA PACKAGE 1. RAD HARD “S” EQUIVALENT - STANDARD DATA PACKAGE A. Certificate of Compliance A. Certificate of Compliance B. Assembly Flow Chart B. Serialization Records C. Preconditioning - Attributes Data Sheet C. Assembly Flow Chart D. Group A - Attributes Data Sheet D. SEM Photos and Report E. Group B - Attributes Data Sheet F. Group C - Attributes Data Sheet G. Group D - Attributes Data Sheet E. Preconditioning - Attributes Data Sheet - HTRB - Hi Temp Gate Stress Post Reverse Bias Data and Delta Data - HTRB - Hi Temp Drain Stress Post Reverse Bias Delta Data 2. RAD HARD TXV EQUIVALENT - OPTIONAL DATA PACKAGE A. Certificate of Compliance B. Assembly Flow Chart C. Preconditioning - Attributes Data Sheet - Pre and Post Burn-In Read and Record Data D. Group A - Attributes Data Sheet E. Group B - Attributes Data Sheet - Pre and Post Read and Record Data for Intermittent Operating Life (Subgroup B3) - Bond Strength Data (Subgroup B3) - Pre and Post High Temperature Operating Life Read and Record Data (Subgroup B6) F. Group C - Attributes Data Sheet - Pre and Post Read and Record Data for Intermittent Operating Life (Subgroup C6) - Bond Strength Data (Subgroup C6) G. Group D - Attributes Data Sheet - Pre and Post RAD Read and Record Data F. Group A G. Group B - Attributes Data Sheet H. Group C - Attributes Data Sheet I. Group D - Attributes Data Sheet 2. RAD HARD MAX. “S” EQUIVALENT - OPTIONAL DATA PACKAGE A. Certificate of Compliance B. Serialization Records C. Assembly Flow Chart D. SEM Photos and Report E. Preconditioning - Attributes Data Sheet - HTRB - Hi Temp Gate Stress Post Reverse Bias Data and Delta Data - HTRB - Hi Temp Drain Stress Post Reverse Bias Delta Data - X-Ray and X-Ray Report F. Group A - Attributes Data Sheet - Subgroups A2, A3, A4, A5 and A7 Data G. Group B - Attributes Data Sheet - Subgroups B1, B3, B4, B5 and B6 Data H. Group C - Attributes Data Sheet - Subgroups C1, C2, C3 and C6 Data I. Group D 7 - Attributes Data Sheet - Attributes Data Sheet - Pre and Post Radiation Data FSTYC9055D, FSTYC9055R SMD2 3 PAD CERAMIC LEADLESS CHIP CARRIER INCHES E MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.130 0.142 3.30 3.60 3 D b 0.135 0.145 3.43 3.68 - D 0.520 0.530 13.20 13.46 - D1 0.435 0.445 11.05 11.30 - D2 0.115 0.125 2.92 3.17 - E 0.685 0.695 17.40 17.65 - E1 0.470 0.480 11.94 12.19 - E2 0.152 0.162 3.86 4.11 - NOTES: A 1. 2. 3. 4. E2 E1 No current JEDEC outline for this package. Controlling dimension: INCH. Measurement prior to pre-solder coating the mounting pads. Revision 3 dated 5-00. 2 D1 D2 3 1 b 1 - GATE 2 - SOURCE 3 - DRAIN All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 8 ASIA Intersil Ltd. 8F-2, 96, Sec. 1, Chien-kuo North, Taipei, Taiwan 104 Republic of China TEL: 886-2-2515-8508 FAX: 886-2-2515-8369