A1171 Datasheet

A1171
Micropower Ultrasensitive Hall Effect Switch
Features and Benefits
Description
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The A1171 integrated circuit is an ultrasensitive, Hall effect
switch with latched digital outputs and either unipolar or
omnipolar magnetic actuation. It features operation at low
supply currents and voltages, making it ideal for batteryoperated electronics. The low operating supply voltage,
1.65 to 3.5 V, and unique clocking algorithm assist in reducing
the average operating power consumption. For example, the
power requirement is less than 15 μW with a 2.75 V supply.
1.65 to 3.5 V battery operation
Low supply current
High sensitivity, BOP typically 30 G (3.0 mT)
Operation with either north or south pole
Configurable unipolar or omnipolar magnetic sensing
Complementary, push-pull outputs
Chopper stabilized
▫ Superior temperature stability
▫ Extremely low switchpoint drift
▫ Insensitive to physical stress
▪ Solid state reliability
▪ Small size
Package: 6 pin DFN/MLP (suffix EW)
Unlike more traditional Hall effect switches, the A1171 allows
the user to configure how the device is magnetically actuated.
Under default conditions the device activates output switching
with either a north or south polarity magnetic field of sufficient
strength. The magnetic actuation can be set via an external
selection pin to operate in a unipolar mode, switching only on
a north or south polarity but not both. Furthermore, the output
of the A1171 can be configured to switch either off or on in the
absence of any significant magnetic field. Lastly, the A1171
has two push-pull output structures.
This polarity-independence, as well as the minimal power
requirements, allows the A1171 to easily replace reed switches,
Continued on the next page…
Not to scale
Functional Block Diagram
VDD
Clock / Logic
Low-Pass
Filter
GND
1171-DS, Rev. 5
Logic
Amp
Sample and Hold
and Averaging
Dynamic Offset
Cancellation
VOUTPS
Latch
VOUTPN
Latch
SELECT
A1171
Micropower Ultrasensitive Hall Effect Switch
Description (continued)
providing superior reliability and ease of manufacturing while
eliminating the requirement for signal conditioning.
silicon chip, a Hall-voltage generator, a small-signal amplifier,
chopper stabilization, a latch, and a MOSFET output.
Improved stability is made possible through dynamic offset
cancellation using chopper stabilization, which reduces the residual
offset voltage normally caused by device overmolding, temperature
dependencies, and thermal stress. This device includes, on a single
The A1171 device offers a magnetically optimized solution, suitable
for most applications. Package type EW (0.40 mm maximum height)
offers a leadless surface mount solution. It is lead (Pb) free, with
NiPdAu leadframe plating.
Selection Guide
Part Number
Packing1
Package
A1171EEWLT-P2
DFN/MLP 1.5×2 mm; 0.40 mm maximum height
3000 pieces per 7 inch reel
1Contact Allegro™ for additional packing options.
2Allegro products sold in DFN package types are not intended for automotive applications.
Absolute Maximum Ratings
Characteristic
Symbol
Notes
Rating
Units
5
V
Supply Voltage
VDD
Reverse Supply Voltage
VRDD
–0.3
V
B
Unlimited
G
Magnetic Flux Density
Output Off Voltage
VOUTPx
5
V
Reverse Output Voltage
VROUTPx
–0.3
V
Output Current
IOUTPx(Source)
1
mA
IOUTPx(Sink)
–1
mA
Operating Ambient Temperature
TA
–40 to 85
ºC
Maximum Junction Temperature
TJ(max)
165
ºC
Tstg
–65 to 170
ºC
Storage Temperature
Range E
Terminal List Table
Pin-out Diagram
VOUTPS 1
6 VDD
VOUTPN 2
5 NC
SELECT 3
PAD
4 GND
Name
Number
Function
VOUTPS
1
Push-pull output (selectable omnipolar activation or unipolar
south pole activation)
VOUTPN
2
Push-pull output (selectable inverted omnipolar activation or
unipolar north pole activation)
SELECT
3
Sets activation mode for VOUTPx outputs; omnipolar output
when tied to VDD or floating, unipolar output when grounded
GND
4
Ground
NC
5
No connection
VDD
6
Connects power supply to chip
PAD
–
Exposed pad for enhanced thermal dissipation
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A1171
Micropower Ultrasensitive Hall Effect Switch
ELECTRICAL CHARACTERISTICS valid over operating voltage and temperature range (unless otherwise specified)
Characteristic
Supply Voltage Range2
Output Voltage
Period
Chopping Frequency
Supply Slew Rate3
Supply Current
VDD
SELECT Voltage4
Typ.1
Max.
Units
Operating, TA= 25°C
1.65
–
3.5
V
Operating, over full ambient temperature range
1.8
100
300
mV
–
mV
Test Conditions
VOUT(SAT)
NMOS on, ISINK = 1 mA, VDD = 2.75 V
VOUT(HIGH)
PMOS on, ISOURCE = –1 mA, VDD = 2.75 V
–
VDD–300 VDD–100
tPERIOD
–
50
100
ms
fC
–
200
–
kHz
20
–
–
V/ms
IDD(EN)
SR
Device in awake mode (enabled)
–
–
2.0
mA
IDD(DIS)
Device in sleep mode (disabled)
–
–
8.0
μA
VDD = 1.8 V, TA = 25°C
–
3.5
8
μA
VDD = 3.5 V, TA = 25°C
IDD(AV)
SELECT Current4
Min.
Symbol
–
7.1
12
μA
ISELECT
0
1
2
μA
VSELECT(LOW)
0
–
1/ V
3 DD
V
VSELECT(HIGH)
2/ V
3 DD
–
VDD
V
1Typical
data are for initial design estimations only, and assume optimum manufacturing and application conditions, such as TA = 25°C. Performance
may vary for individual units, within the specified maximum and minimum limits.
2Operate points, B
OPX, and release points, BRPX, vary with supply voltage.
3If SR < SR(min), then valid device output might be delayed for one Period, t
PERIOD , of device.
4Maximum V , minimum 0 V.
DD
MAGNETIC CHARACTERISTICS valid at 1.8 V ≤ VDD ≤ 3.5 V and TA = 25°C
Characteristic
Operate Point3
Release Point3
Hysteresis
Symbol
Test Conditions
Min.
Typ.1
Max.
Units2
BOPS
–
32
55
G
BOPN
–55
–32
–
G
BRPS
6
26
–
G
BRPN
–
–26
–6
G
–
6
–
G
BHYS
|BOPX - BRPX|
1Typical
data are for initial design estimations only, and assume optimum manufacturing and application conditions, such as TA = 25°C. Performance
may vary for individual units, within the specified maximum and minimum limits.
21 gauss (G) is exactly equal to 0.1 millitesla (mT).
3Operate points, B
OPX, and release points, BRPX, vary with supply voltage.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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A1171
Micropower Ultrasensitive Hall Effect Switch
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic
Symbol
Package Thermal Resistance
Test Conditions*
2-layer PCB, with 0.23
RθJA
in.2
copper area each side
4-layer PCB, based on JEDEC standard
Value
Units
125
ºC/W
64
ºC/W
*Additional thermal information available on Allegro Web site.
Power Dissipation versus Ambient Temperature
3000
2750
2500
Power Dissipation, PD (mW)
2250
2000
EW package
4-layer PCB
(RθJA = 64 ºC/W)
1750
1500
1250
EW package
2-layer PCB
(RθJA = 125 ºC/W)
1000
750
500
250
0
20
40
60
80
100
120
Temperature (°C)
140
160
180
Output Polarity Diagram
+B (South)
Magnetic Field
0
–B (North)
(Omnipolar
configuration)
Output Pin
(Activation Polarity)
VOUTPS
VOUTPN
(South)
VOUTPS
(Unipolar
configuration)
(North)
VOUTPN
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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A1171
Micropower Ultrasensitive Hall Effect Switch
Functional Description
Low Average Power
Internal timing circuitry activates the IC for a short period of
time, tAwake, and deactivates it for the remainder of the period
(tPeriod). A short awake state duration allows stabilization prior
to the sampling and data-latching on the falling edge of the timing pulse. The output during the sleep state is latched in the last
sampled state. The supply current is not affected by the output
state.
VOUTPN operates with the opposite output polarity. That is, the
output is low (on) in the absence of a magnetic field. The output
goes high (turns off) when sufficient field, or either north or
south polarity, is presented to the device.
tPeriod
Awake
Sleep
I DD(DIS)
0
The difference between the magnetic operate and release points
is the hysteresis, BHYS , of the device. This built-in hysteresis
allows clean switching of the output even in the presence of
external mechanical vibration and electrical noise.
Powering-on the device in a hysteresis region, between BOPX
and BRPX, allows an indeterminate output state. The correct state
is attained after the first excursion beyond BOPX or BRPX.
Sample and Output Latched
(A) VOUTPS
(B) VOUTPN
Switch to High
VOUT(HIGH)
VOUT
Switch to Low
VOUT
V+
Switch to Low
Switch to Low
Switch to Low
Switch to High
VOUT(HIGH)
Switch to High
V+
Switch to High
I DD(EN)
Operation
The VOUTPS output switches low (turns on) when the magnetic
field received at the Hall element in the A1171 exceeds the operate point, BOPS (or is less than BOPN). After turn-on, the output
voltage is VOUT(SAT). The output transistor is capable of sinking
current up to the short circuit current limit, IOM. When the magnetic field is reduced below the release point, BRPS (or increased
above BRPN), the device output switches high (turns off). The
pull-up transistor brings the output voltage to VOUT(HIGH).
VOUT(SAT)
BHYS
0
BRPS
BRPS
BRPN
B–
BOPS
BHYS
B+
BOPN
BHYS
0
BOPS
BOPN
B–
VOUT(SAT)
0
BRPN
0
B+
BHYS
Figure 1. Switching Behavior of Omnipolar Switches. On the horizontal axis, the B+ direction indicates increasing south polarity magnetic field strength, and the B– direction indicates decreasing south polarity field strength (including the case of increasing north polarity).
This output switching profile applies when the SELECT line is allowed to float, selecting omnipolar operation.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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A1171
Micropower Ultrasensitive Hall Effect Switch
(A) VOUTPN
(B) VOUTPS
V+
V+
Switch to High
VOUT
VOUT
VOUT(HIGH)
Switch to Low
Switch to Low
Switch to High
VOUT(HIGH)
VOUT(SAT)
BRPN
0
B+
BHYS
B–
0
BOPS
BOPN
B–
VOUT(SAT)
0
BRPS
0
B+
BHYS
Figure 2. Operation with Unipolar Mode Selected (SELECT Pin Grounded)
SELECT Pin Settings Effect on Output
Output Pin
Number
1
2
Name
SELECT Pin
Configuration
Output Description
Tied to VDD or floating
Omnipolar output; ON with magnetic field of sufficient
strength (B < BOPN or B > BOPS); OFF with low-strength
or no magnetic field (BRPN < B < BRPS)
Tied to ground
Unipolar output; ON with south polarity magnetic field of
sufficient strength (B > BOPS)
Tied to VDD or floating
Omnipolar output; OFF with magnetic field of sufficient
strength (B < BOPN or B > BOPS); ON with low-strength or
no magnetic field (BRPN < B < BRPS)
Tied to ground
Unipolar output; ON with north polarity magnetic field of
sufficient strength (B < BOPN)
VOUTPS
VOUTPN
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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A1171
Micropower Ultrasensitive Hall Effect Switch
Applications
It is strongly recommended that an external bypass capacitor be
connected (in close proximity to the Hall element) between the
supply and ground of the device to reduce both external noise
and noise generated by the chopper stabilization technique. As is
shown in figure 3, a 0.1μF capacitor is typical.
• Hall-Effect IC Applications Guide, AN27701
Extensive applications information on magnets and Hall-effect
devices is available in the following notes:
All are provided in Allegro Electronic Data Book, AMS-702,
and on the Allegro Web site, www.allegromicro.com.
• Hall-Effect Devices: Gluing, Potting, Encapsulating, Lead
Welding and Lead Forming AN27703.1
• Soldering Methods for Allegro Products (SMD and ThroughHole), AN26009
VS
VS
VOUTPS
CBYP
0.1 µF
Outputs
A1171
VOUTPS
VDD
VOUTPN
NC
SELECT
GND
CBYP
0.1 µF
(a)
Outputs
A1171
VDD
VOUTPN
NC
SELECT
GND
(b)
Figure 3. Typical Application Circuits: (a) Omnipolar operation, and (b) Unipolar Operation
Allegro MicroSystems, LLC
115 Northeast Cutoff
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A1171
Micropower Ultrasensitive Hall Effect Switch
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed
across the Hall element. This voltage is disproportionally small
relative to the offset that can be produced at the output of the
Hall element. This makes it difficult to process the signal while
maintaining an accurate, reliable output over the specified operating temperature and voltage ranges.
Chopper stabilization is a unique approach used to minimize
Hall offset on the chip. The patented Allegro technique, namely
Dynamic Quadrature Offset Cancellation, removes key sources
of the output drift induced by thermal and mechanical stresses.
This offset reduction technique is based on a signal modulationdemodulation process. The undesired offset signal is separated
from the magnetic field-induced signal in the frequency domain,
through modulation. The subsequent demodulation acts as a
modulation process for the offset, causing the magnetic field
induced signal to recover its original spectrum at baseband,
while the dc offset becomes a high-frequency signal. The magnetic sourced signal then can pass through a low-pass filter,
while the modulated dc offset is suppressed. This configuration
is illustrated in figure 4.
The chopper stabilization technique uses a high frequency clock.
For demodulation process, a sample and hold technique is used,
where the sampling is performed at twice the chopper frequency.
This high-frequency operation allows a greater sampling rate,
which results in higher accuracy and faster signal-processing
capability. This approach desensitizes the chip to the effects
of thermal and mechanical stresses, and produces devices that
have extremely stable quiescent Hall output voltages and precise
recoverability after temperature cycling.
The repeatability of magnetic field-induced switching is affected
slightly by a chopper technique. However, the Allegro high
frequency chopping approach minimizes the affect of jitter and
makes it imperceptible in most applications. Applications that
are more likely to be sensitive to such degradation are those
requiring precise sensing of alternating magnetic fields; for
example, speed sensing of ring-magnet targets. For such applications, Allegro recommends its digital device families with lower
sensitivity to jitter. For more information on those devices,
contact your Allegro sales representative.
Regulator
Amp
Low-Pass
Filter
Hall Element
Sample and
Hold
Clock/Logic
Figure 4. Chopper Stabilization Circuit (Dynamic Quadrature Offset Cancellation)
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A1171
Micropower Ultrasensitive Hall Effect Switch
Package EW, 6-pin DFN/MLP
1.50 ±0.15
0.75 F
E
6
0.50
0.30
6
1.00 F
2.00 ±0.15
A
0.70
1.575
F
1
1
0.325
1.10
7X
D
SEATING
PLANE
0.08 C
C
C
PCB Layout Reference View
0.38 ±0.02
0.50 BSC
B
+0.055
0.325 –0.045
0.70 ±0.10
NN
YWW
0.25 ±0.05
1
1
1.25 ±0.05
G
Standard Branding Reference View
N = Last two digits of device part number
Y = Last digit of year of manufacture
W = Week of manufacture
6
1.10 ±0.10
For Reference Only, not for tooling use (refernce DWG-2856; similar to
JEDEC Type 1, MO-229X2BCD)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
C Reference land pattern layout (reference IPC7351
SON50P200X200X100-9M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
D Coplanarity includes exposed thermal pad and terminals
E Active Area Depth 0.15 mm REF
F Hall Element (not to scale)
G Branding scale and appearance at supplier discretion
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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A1171
Micropower Ultrasensitive Hall Effect Switch
Revision History
Revision
Revision Date
Rev. 5
October 26, 2011
Description of Revision
Update Selection Guide
Copyright ©2005-2013, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
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use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
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115 Northeast Cutoff
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1.508.853.5000; www.allegromicro.com
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