19 V, 3 A, Universal Input AC-DC Adaptor Using NCP1271

AND8242/D
19 V, 3.0 A Universal
Input AC-DC Adaptor
Using NCP1271
Prepared by: Jon Kraft and Kahou Wong
ON Semiconductor
http://onsemi.com
APPLICATION NOTE
INTRODUCTION
This application note presents an example circuit
(Figure 1) using the NCP1271 (65 kHz version) in a flyback
topology. The design steps and subsequent measurements
are also included. An Excel based design worksheet is
available at www.onsemi.com.
The measurements show that the 19 V, 3.0 A circuit
delivers above 85% across a universal input (85 to 265 Vac).
The no load standby consumption is 83 mW at 230 Vac and
the light load operation is greater than 75% efficient.
The NCP1271 is one of the latest fixed-frequency
current-mode
PWM switching controllers with
(1) adjustable Soft-Skipt standby operation for low-level
audible noise, (2) integrated high-voltage startup for saving
standby power, (3) timer based overload fault detection, and
(4) internal latch protection features. Table 1 summarizes all
the features of an NCP1271 based power supply.
19 V / 3 A
-
D10 MZP4746A (18V)
IC4 TL431
R11 15.8k
R9 1.69k
C12
0.15 uF
R12 2.37k
R8
0.25 / 1W
R10 1.69k
R7 511
IC3 SFH615AA-X007
C13 100uF
C4 100uF
R6 10
C7 1.2 nF
C6 1.2 nF
R5 30.1k
R2 10
Flyback transformer :
Cooper CTX22-17179
Lp = 180uH, leakage 2.5uH max
np : ns : naux = 30 : 6 : 5
Hi-pot 3600Vac for 1 sec, primary to secondary
Hi-pot 8500Vac for 1 sec, winding to core
C10 2200 uF
C9 2200 uF
D5 MMSZ914
R1 100k / 2W
IC1 NCP1271A
+
D8 MBR3100
D7 MURS160
Q1 SPP06N80C3
T1
E3506-A
C5 10 nF
D6 MRA4005T3
C2 0.1 uF
Common
Mode Choke
C1 0.1 uF
85 to
265 Vac
C3 82uF / 400V
D1 - D4
1N5406 x 4
Fuse 2A
C11 1nF/ 1000V
Figure 1. Application Circuit Schematic
© Semiconductor Components Industries, LLC, 2007
July, 2007 - Rev. 3
1
Publication Order Number:
AND8242/D
AND8242/D
Table 1. Features of Power Supply Using NCP1271
Operation Mode
Features
Topology
CCM/DCM Flyback
•
•
•
•
•
Standby Condition
Soft-Skip Operation
• Adjustable skip level for optimal standby power consumption.
• Proprietary Soft-Skip to reduce the risk of low-frequency audible noise.
• Soft-Skip operation is automatically disabled if an abrupt transient load is applied
from standby operation. This improves the output response to a transient load.
Fault Condition
Double Hiccup
Restart
Latch Protection
Activated
Latch Off
Fixed-frequency current-mode control with inherent primary current limitation.
Frequency jittering to soften the EMI signature.
Built-in soft-start.
Output short-circuit fault detection independent of the auxiliary winding.
Integrated high voltage startup that minimizes standby power loss.
• Double Hiccup operation minimizes the power dissipation in a fault mode and
allows the application to auto-recover when the fault is removed.
• An internal latch makes it easy to add overtemperature protection (OTP) or
overvoltage protection (OVP) to any applications.
• Latch is reset by unplugging the AC input and allowing VCC to drop below 4 V (typ).
The Demo Board Specification
Input
85 to 265 Vac, 50 Hz
Output
19 Vdc, 3.0 A, Isolated
Features
•
•
•
•
•
Based on the results from the NCP1271 design
spreadsheet, the final values for this adapter's key flyback
parameters were calculated to be:
Np:Ns = 5:1
Lp = 180 mH
RCS = 0.3 Ohms
Ipeak(full load) = 3.5 A
Switch Rating = 6 A, 800 V
Diode Rating = 3 A, 100 V
Rsnubber = 100 kW
Csnubber = 10 nF
< 100 mW Input Power at 230 Vac
Excellent Light Load Performance
No Audible Noise
> 85% Full Load Efficiency
Short Circuit Protection Activates at < 100W
for Any Input Voltage
A Discontinuous Conduction Mode (DCM) flyback was
selected for this application. DCM gives very good stability,
small inductor size (lower leakage inductance), and good
transient response.
Setting the Short Circuit Protection Level
The current sense resistor (RCS or R8), provides two
functions. First it senses the primary current for current- mode
PWM operation. Secondly, it provides the maximum primary
current limitation according to equation 1:
Flyback Calculations
Several resources are available at www.onsemi.com to
calculate the necessary component values for a flyback
supply. In particular, an Excel based design spreadsheet can
be found at:
www.onsemi.com/collateral/NCP1271SHEET.xls
Additionally, most of the other NCP12xx application
notes also apply to the NCP1271. For detailed information
on designing a flyback power supply, please visit
AND8076/D. Other app notes which may also aid in the
design include:
AND8069/D
Tips and Tricks to Build Efficient Circuits
With the NCP1200
AND8205/D
How to Choose a Switching Controller for
Design
AND8023/D
Implementing the NCP1200 in Low-Cost
AC/DC Converters
AND8032/D
Conducted EMI Filter Design for the
NCP1200
AND8076/D
A 70 W Low Standby Power Supply with the
NCP12xx Series
Ip(max) + 1V
RCS
(eq. 1)
The short circuit protection activates when the Ip(max)
current is reached for more than 130 ms (typ). This also
corresponds to VFB being greater than or equal to 3 V for
130 ms. Therefore, RCS must be set large enough to ensure
that the required peak current can always be delivered, but
small enough to meet the short circuit protection
requirements. A DCM flyback converter has the following
relationship:
Pout + 1ń2
Lp
Ip2
FSW
h
(eq. 2)
Therefore, for an assumed efficiency of 80%, a peak
current of 4 A should trigger the short circuit protection
circuitry at 80 W. This corresponds to an RCS value of
0.25 W. This change in RCS may also require that the snubber
and transformer be re-calculated to handle this level of peak
current during the short circuit fault time. A few iterations
of the Excel based NCP1271 design spreadsheet should
produce a good starting point for the application's design.
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2
AND8242/D
Over Power Compensation
input voltage is due to the propagation delay (Tprop) of the
NCP1271. This propagation delay has a more pronounced
effect on the power delivered at high line than at low line as
shown in Figure 2.
For this demo board, the short circuit protection is
activated with an output load of 76 W at 85 Vac and 93 W
at 265 Vac. The variation in short circuit power level with
Peak Primary Current
Additional Power Delivered due to Prop Delay
Ip(max)
230 Vac
120 Vac
Slope = Vbulk/Lp
0
time
Tprop
Tprop
Figure 2. Effect of Propagation Delay on the Maximum Power Delivered at High Line and Low Line
NCP1271
This effect is called “Over Power” because it delivers
more power than what is requested by the feedback loop.
Specifically, for a DCM flyback system, the total power
delivered to the output including the prop delay effect is:
Aux
CS
DRV
ROPP
Pout + 1 @ Lp @ (Ip(max) ) VbulkńLp @ Tprop) 2 @ Fsw @ h
2
RCOMP
(eq. 3)
The NCP1271 has been designed with a very low Tprop
(50 ns typ). This minimizes the over power effect. However,
if reduced variation is required, then over power
compensation can be easily implemented by using one of the
circuits shown in Figures 3 and 4.
Figure 4. Over Power Compensation by Modifying
the Auxiliary Winding Topology
The circuit in Figure 3 simply modifies the CS setpoint
proportional to the HV bulk level. This creates an offset
which compensates for the propagation delay. However, this
does increase the standby power dissipation. Figure 4 gives
another option which results in much lower power
dissipation. By altering the position of the Aux winding
diode, a new point is created whose voltage is proportional
to Vin. The power dissipation is now reduced by a factor of
(Np:Naux)2. Values for Ropp are best found experimentally
to give suitable precision for the activation of the short
circuit protection.
VBULK
ROPP
NCP1271
CS
DRV
RCOMP
RCS
RCS
Figure 3. Over Power Compensation by means of
a Resistor to the Bulk Voltage
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AND8242/D
Biasing the Controller
bunch of skip pulses. To address this need, the NCP1271 has
a proprietary Soft-Skip feature which ramps each bunch of
pulses. This dramatically lowers acoustic noise and allows
a higher skip level to be set for greater power savings. The
NCP1271 also allows the designer to select the optimal level
of the peak current during skip through a simple resistor
from pin 1 to GND. This skip resistor sets the skip level
according to equation 4:
The NCP1271 includes a high voltage (HV) startup pin
(Pin 8) which charges VCC to its operating level. This pin can
be directly connected to the high voltage DC bus. Once the
device is powered up, an auxiliary winding powers VCC as
shown in Figure 5.
Rectified Input
Vskip + Iskip
Output
19V / 3A
HV
Rskip
(eq. 4)
where Iskip = 43 mA (typ)
The peak current when skip mode is activated can be
calculated with equation 5:
VCC 16 V
V
Ipeak(skip) + skip
3V
Ipeak(max)
(eq. 5)
For this demo board, Vskip was set to 1.3 V (Rskip =
30.1 kW). And Ipeak(max) is 1 V / 0.25 W = 4 A. Therefore,
Ipeak(skip) = 1.7 A.
NCP1271
Minimum On Time Limitation
Figure 5. VCC Biasing Scheme
The NCP1271 includes a current sense (CS) Leading
Edge Blanking (LEB) filter. The LEB filter blanks out the
first 180 ns (typ) of the CS voltage at the beginning of each
drive pulse. This helps to prevent a premature reset of the
output due to noise. However, this also results in a minimum
on time of the device. The duration is equal to the LEB time
(180 ns typical) and the propagation delay of logic (50 ns
typical). If the application circuit is configured for 0% skip
(by connecting Pin 1 to Ground), then that minimum on time
duration may result in an abnormally high output voltage
during no load conditions. Therefore, it is recommended to
set skip to some small value rather than disable it completely.
The range of VCC is from 10 V (min) to 20 V (max).
Therefore, the auxiliary winding should be designed to give
a level of VCC within this range over all output loads. When
the circuit is in standby mode, very few pulses are delivered
and the auxiliary level decreases. To provide enough voltage
range, a nominal VCC level of 16 V was selected for this
application. Additionally, an 18 V (±5%) Zener diode was
added externally to protect the controller from abnormally
high auxiliary levels. The 16 V bias supply is constructed
from a 6:5 turns ratio (19 V:16 V) between the main output
and the auxiliary winding.
Figure 6 shows the auxiliary supply circuit. A resistor is
included to provide the flexibility to redesign the circuit for
higher output voltages. Any extra bias voltage greater than
18 V is simply dissipated across the resistor.
Ramp Compensation
The NCP1271 also incorporates a feature called “ramp
compensation.” Ramp compensation is a known mean to
cure subharmonic oscillations. These oscillations take place
at half the switching frequency and occur only during
continuous conduction mode (CCM) with a duty-cycle
greater than 50%. To prevent these oscillations, one usually
injects between 50 and 75% of the inductor down slope into
the CS pin. The NCP1271 generates an internal current ramp
that is synchronized with the clock. This current ramp is then
routed to the CS pin.
Since the flyback design in this app note is well within
DCM operation, ramp compensation is not necessary.
However, for designs that do run in CCM with the NCP1271,
ramp compensation is easy to implement. It only requires
one external resistor between Rcs and the CS pin. The value
of the ramp resistor to obtain 50% inductor down slope
injection can be calculated with the following equation:
NCP1271
C4
100uF
18 V
C13
100uF
Figure 6. Auxiliary Supply
Soft-Skip Adjustment
When the load current drops, the compensation network
responds by reducing the peak current. When the peak
current reaches the skip peak current level, the NCP1271
enters skip operation to reduce the power consumption. The
peak current level at which skip is entered should be set high
for good standby power dissipation. However, it also needs
to be set low enough that no audible noise occurs during each
Rramp + 0.50
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4
RCS
ǒ(Vout ) Vf)
ǒLp
Fsw
NP
NS
Ǔ
100mA
0.80
Ǔ
(eq. 6)
AND8242/D
Maximum Duty Cycle and Ramp Compensation
If the ramp resistor is set too high, the maximum duty
cycle will be reduced. But as a long as Rramp is below 10 kW,
this will not be a problem. A typical graph of the maximum
duty cycle verses Rramp is shown in Figure 7. However, it is
not recommended to try to reduce the maximum duty cycle
by the Rramp value because this relationship is not
guaranteed by the production tests of the device.
NTC
resistor
R limit
2
90
80
70
MAXIMUM DUTY (%)
8
1
3
6
4
5
NCP1271
60
Figure 9. Overtemperature Protection Latch with a
NTC Thermistor
50
40
30
20
10
0
0
5
10
15
20
25
30
35
40
45
50
R limit
RRAMP, RESISTOR (kW)
OVP
Figure 7. Maximum Duty Cycle Characteristics
8
1
2
Optional Output OVP Latch
The NCP1271 includes a feature where if Pin 1 is brought
above 8.0 V (typ), the part will safely latch off the controller.
The controller is reset by unplugging the AC input. This
allows for easy implementation of overvoltage (OVP) or
overtemperature (OTP) protection.
In order to pull the Pin 1 voltage above the latch threshold,
a greater than 8.0 V source is needed. That is usually the bias
supply voltage VCC. Therefore, to protect Pin 1, a resistor
(Rlimit) is connected to limit the current below the maximum
allowed level. In addition, the internal ESD diode will limit
the maximum voltage on Pin 1 to about 10 V.
This latch off feature can be configured in a variety of
ways. Some of the most popular include using the auxiliary
winding to detect an overvoltage and using an NTC resistor
to detect an overtemperature condition. A few variations of
these circuits are listed in Figures 8 to 11.
3
6
4
5
NCP1271
Figure 10. Output Overvoltage Protection Using the
Auxiliary Winding
V out
R limit
8
1
2
opto
coupler
3
6
4
5
NCP1271
Figure 11. Output Overvoltage Protection Using an
Optocoupler
R limit
8
1
latch off
2
3
6
4
5
NCP1271
Figure 8. Simple Latchoff Circuit by Bipolar
Transistors
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AND8242/D
Layout Consideration
It is important to note that when Pin 1 is open it sets the
default skip level to 1.2 V. However, in this mode, pin 1 is
internally pulled high to the Vskip-reset level (6.5 V typ).
This only leaves about 1.5 V of noise margin before the part
latches off. Therefore, if a skip level of 1.2 V is desired, then
instead of leaving pin 1 open, it is always recommended to
place a 28 kW resistor from pin 1 to GND. Then the skip level
becomes 1.2 V (28 kW x 43 mA = 1.2 V), and the pin 1
voltage is also 1.2 V. This gives much better noise immunity
and reduces the chance of falsely triggering the latch due to
noise or leakage current from the external latch circuitry.
Additionally, a small capacitor should be added to pin 1 to
further increase the noise immunity.
Figures 9-10 show the layout of the design. It is a
single-layer PCB. As with any power converter, some care
must be exercised with the design and layout. The following
are some important guidelines.
1. Minimize the high-current loop and locate the IC
controller outside the high-current loop to prevent
malfunctioning of the IC internal logic due to
strong magnetic fields from the high current.
2. Locate the decoupling capacitors close to the
device to improve noise immunity.
3. Locate the VCC capacitor very close to the device
to prevent the circuit from entering a UVLO fault
condition because of noise.
4. Locate the output voltage sense resistor close to
the output load points.
5. Minimize the current sense trace. It can become
easily polluted with noise.
6. Minimize the distance between the feedback
opto-coupler and controller because this trace is
also easily polluted.
7. Minimize the distance between the MOSFET and
controller because the PCB trace is high frequency
and high current so it can easily pollute other parts
of the circuit.
Additionally, there are three pins in the NCP1271 that may
need external decoupling capacitors.
1. Skip/latch pin (Pin 1) – If the voltage on this pin is
above 8.0 V, the circuit enters latch-off protection
mode. Hence, a decoupling capacitor on this pin is
essential to improve noise immunity. Additionally,
a resistor should always be placed from this pin to
GND to prevent noise from causing the pin 1 level
from exceeding the latch-off level.
2. Feedback pin (Pin 2) – A small capacitor may be
necessary here for improved stability and noise
immunity.
3. VCC pin (Pin 6) – The NCP1271 maintains normal
operation when VCC is above VCC(off) (9.1 V
typical). If VCC drops below VCC(off), then the
circuit enters UVLO protection and restarts after a
double hiccup. Therefore, if VCC inadvertently
drops below VCC(off) due to switching noise, then
the circuit will recognize it as a fault condition.
Hence, it is important to locate the VCC capacitor
and a ceramic decoupling capacitor as close as
possible to the NCP1271.
HV Pin Protection Circuit
When the main power is interrupted in the application, the
high voltage DC bus may potentially go negative in a short
transient period. Since this is directly connected to pin 8, it
could create a reverse current out of the HV Pin and could
potentially damage the device. There are two easy solutions
to this problem. The first is demonstrated in Figure 12. The
inserted diode turns on when the HV Pin voltage goes below
the VCC biasing voltage. This eliminates the chance of
negative voltage on the HV pin. A second method is shown
in Figure 13. Here, the inserted resistor limits the negative
current to a low level and protects the HV pin. Either option
works well, but for this demo board, a diode between VCC
and HV was used.
HV
8
1
2
1N4005
Vcc
3
6
4
5
NCP1271
Figure 12. Protection Diode for HV Pin
>4.7 kW
HV
1
8
2
Vcc
3
6
4
5
NCP1271
Figure 13. Protection Resistor on HV Pin
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6
AND8242/D
Measurements
Figure 16 shows the go-to-standby transition from full
load operation. The output voltage (yellow trace) does not
consume current and remains at 19 V, but the VCC voltage
drops from 16 V to 15 V because the VCC auxiliary winding
is not supplying current to the controller. The minimum VCC
voltage in the transition can be as low as 12 V. This is why
the 16 V biasing voltage was selected to maintain VCC
above VCC(off) and prevent a VCC reset.
Standby Performance
Thanks to the features in the NCP1271, the demo board
power supply offers excellent no load and light load standby
performance. The 230 Vac power consumption of the 57 W
circuit is only 83 mW. And the input power at 230 Vac with
500 mW load is only 710 mW. Figure 14 shows the
efficiency with output loads from 500 mW to 60 W at
120 Vac and 230 Vac.
95
EFFICIENCY (%)
90 120 Vac
Vout
85
230 Vac
VCC
80
75
70
VCS
65
60
0
10
20
30
40
50
Figure 16. Operating to Standby
60
Pout (W)
Short Circuit Protection Measurements
Figure 14. Efficiency of the NCP1271 Demo Board at
Nominal Line Voltages
Figure 17 details the operation of the short circuit
protection . The load steps from 60 W to 100 W, causing the
peak current to increase to its maximum (1 V) as shown by
the blue CS voltage. After approximately 130 ms, the
controller shuts the power supply down and enters double
hiccup fault operation (Figure 18). This provides very low
power dissipation and protects the power components.
When the short circuit fault is removed, the application
recovers by executing a soft start and bringing the output
back to 19 V.
Dynamic Study
Figure 15 shows the startup transient waveforms of the
circuit when the input is 110 Vac. A 4 ms soft-start is
observed in the drain current. The VFB drops below 3.0 V
after 32 ms. Since this is shorter than the 130 ms fault
validation time, the circuit does not enter fault condition and
starts up normally.
Vfb
VCC
Vout
VCC
Vout
VCS
VCS
Figure 15. Startup Transient
Figure 17. Short Circuit Protection is Activated When
the Output Load Increases to about 100 W
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AND8242/D
Conclusion
A 57 W flyback power supply featuring over voltage and
short circuit protection using the NCP1271 was
demonstrated to have excellent light load power dissipation
and active mode efficiency. The NCP1271's proprietary
Soft-Skip t operation offers low-audible-noise and
excellent standby performance. The NCP1271 design
worksheet, as well as other design aid resources, are
available at www.onsemi.com.
VCC
Vout
VCS
Figure 18. The Controller Enters Double Hiccup Fault
Operation during a Continuous Short Circuit Event
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AND8242/D
Appendix I: Bill of Materials for the NCP1271 19 V/3.0 A Example Circuit
Designator
Qty
Part Number
Description
T1
1
E3506-A
3.0 A 508 mH Common-Mode Filter
Coilcraft
T2
1
CTX22-17179
Custom Transformer 180 mH 30:6:5,
2.5 mH Max Leakage
Cooper/Coiltronics
IC1
1
NCP1271D65R2
65 kHz Flyback PWM Controller, SO-7
ON Semiconductor
IC2
1
TL431AID
2.5 V 1% Voltage Reference, SO-8
ON Semiconductor
IC3–IC4
2
SFH615AA-X007
D1–D4
4
1N5406
D5
1
MMSZ914
D6
1
MRA4005T3
D7
1
D8
1
D10
1
Q1
1
SPP06N80C3
6.0 A 800 V N-MOSFET, TO-220AB
R1
1
P100KW-2BK
100 kW 2.0 W, Axial 5%
R2
1
CFR-25JB-10R
10 W, 1/4 W Axial
Yageo
R5
1
CRCW12063012F
30.1 kW, 1206
Vishay
R6
1
CRCW120610R0F
10 W, 1206
Vishay
R7
1
CRCW12065110F
511 W 1206
Vishay
Optocoupler
Manufacturer
Vishay
3.0 A 600 V Diode, Axial 267-05
ON Semiconductor
1.0 A 100 V Diode, SOD-123
ON Semiconductor
1.0 A 600 V Diode, SMA
ON Semiconductor
MURS160
1.0 A 600 V Diode, SMB
ON Semiconductor
MBR3100
3.0 A 100 V Schottky Diode, Axial 267-05
ON Semiconductor
MZP4746A
18 V @ 14 mA Zener Diode
ON Semiconductor
Infineon
-
R8
1
WSL2512R2500FEA
0.25 W 1.0 W 1%
Vishay
R9, R10
1
CRCW12061691F
1.69 kW, 1206
Vishay
R11
1
CRCW12061582F
15.8 kW, 1206
Vishay
R12
1
CRCW12062371F
2.37 kW, 1206
Vishay
C1-C2
2
PHE840MA6100MA04
C3
1
C4, C13
2
0.1 mF X2 Cap 10 mm Pitch
Evox Rifa
ECOS2GP820BA,
EETED2G820BA, or
EETXB2G820BA
82 mF 400 V Electrolytic
Panasonic
ECA1EM101
100 mF 25 V Electrolytic
Panasonic
10 nF 630 V Film Cap
C5
1
630MMB103J
C6-C7
1
VJ1206Y122KXXA
C9–C10
3
025YXG220M12.5X30
2200 mF 25 V Electrolytic
Rubycon
C11
1
ERO610RJ4100M
1.0 nF 1.0 kV 5.0 mm Pitch Y2 Cap
Evox Rifa
0.15 mF 25 V Ceramic
C12
1
VJ1206Y154KXXA
Fuse
1
1025TD2-R
1.2 nF 25 V, 1206
250 V 2.0 A Tie Delay Fuse
Heatsink for TO-220 Package
Rubycon
Vishay
Vishay
Cooper Fuse
Heatsink
1
590302B03600
Heatsink Insulation
1
4672
TO-220 Mica Insulation
Keystone
Aavid
IEC60320 C8 Connector
Qualtek
AC Connector
1
770W-X2/10
DC Connector
1
26- 60- 4030 or 009652038
Standoff
4
4804 K
Standoff M/F Hex 4-40 Nyl 0.750”
-
Heatsink Mechanic
1
30F698
4-40 1/4 Inch Screw
-
Heatsink/Standoff
Mechanic
5
31F2106
4-40 Screw Nuts
-
Nylon Washer
1
3049
Nylon Shoulder Washer #4
-
3-T erminal 3.96 mm Pitch Male Header
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Molex
AND8242/D
Appendix II: NCP1271 57 W Adaptor Layout
Figure 19. Top View
Figure 20. Bottom View
Soft-Skip is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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