AND8305/D 350 mA Buck Boost LED Driver using Bipolar Junction Transistors (BJTs), High Side Current Sensing and a NCP3063 Controller http://onsemi.com Prepared by: DENNIS SOLLEY ON Semiconductor INTRODUCTION (typically absorbed by avalanching alternator rectifiers or by a transient suppressor). Equally wide input variations can be expected when the driver is powered from a 12 Vac line transformer and bridge rectifier. Depending on the illumination required, a particular application may require a driver to supply 350 mA to 3, 4 or 5 LEDs in series. From Table 1, the driver must support output variations between 7 volts and 21 volts. Hence, a constant current converter with both a wide input (9-19 V) and wide overlapping output (7-21 V) range, is preferred. This application note targets a current regulated, non inverting buck boost converter. In automotive applications (e.g. emergency vehicles), a high side current sensing scheme can simplify wiring by returning the LED string to chassis ground. The basic buck boost topology, consisting of a buck and boost converter cascaded together, is illustrated in Figure1. Unlike traditional lighting, LEDs require driver solutions that address the challenges of providing a constant current to a load whose output voltage can vary by ±30% because of process and temperature effects. This application note and associated demo board will focus on driving multiple LEDs, at a regulated 350 mA, from low voltage DC or AC sources commonly used in lighting applications. LED Characteristics Due to the steep V/I curve of the LED and to achieve optimum performance, it is critical to drive LEDs with a constant current to achieve the specified brightness and color. For high brightness power LEDs, the specified current may be in the range 150 - 1500 mA, 350 mA being a common value. By combining LED manufacturer's data, taken from several product families, it is possible to come up with minimum and maximum forward voltage drops for a “generic” LED, operating at a specified current. This voltage variation is presented in Table 1, and extended to include 3 to 5 LED combinations. +Vin Table 1. Output Voltage Variation for a “Generic” 350 mA LED Generic LED # String D1 Current (A) VMIN (V) @ TJ(max)5C (Note 1) VMAX (V) @ 255C 1 LED 0.35 2.30 4.23 3 LEDs 0.35 6.90 12.69 4 LEDs 0.35 9.62 16.92 5 LEDs 0.35 11.50 21.15 Q2 Figure 1. Buck Boost Converter Theory of Operation To minimize power dissipation in the power circuit, low ripple current is required. So the converter is run in continuous current mode (CCM). For this analysis, all power components are assumed ideal. During the first switching interval D*TSW, Q1 and Q2 are turned ON by the controller across the input Vin and allow energy to be stored in the inductor. The current flow is illustrated in Figure 2. Driver Definition A typical automotive input requirement may require continuous operation between 9 V and 16 V, excursions between 18 V and 19 V for one hour, a double battery jump start to 26 V for one minute and finally a load dump to 70 V December, 2007 - Rev. 1 +Vout MOSFETs or BJTs can be selected as the primary switches Q1/Q2. However, in this lower power application (to 7watts) BJTs offer a cost effective solution. (See application note AND8306/D for higher power applications (to 20 watts) using FETs). 1. TJ(max) based on LED manufacturer's maximum rating © Semiconductor Components Industries, LLC, 2007 D2 Q1 1 Publication Order Number: AND8305/D AND8305/D +Vin V in @ D @ T SW + V out @ (1 * D) @ T SW +Vout Q1 (eq. 1) Rearranging Equation 1 the voltage gain of buck boost is given by: D * TSW Q2 D * TSW V out + V in @ During the second switching interval (1-D)*TSW, switches Q1 and Q2 are turned off by the controller, allowing diodes D1 and D2 to conduct and deliver the energy stored in the inductor to the load. The current flow during this interval is illustrated in Figure 3. D2 (eq. 2) Varying the duty cycle will vary the output. When D is below 0.5, the converter is in buck mode, when D is above 0.5, the converter is in boost mode and when D equals 0.5, the voltage gain Vout/Vin is unity. The ripple current in the inductor is given by expression Figure 2. Switch Conduction During First Switching Interval D*TSW +Vin D 1*D DI L1 + V in @ D @ T SW L1 (eq. 3) For a typical design case, where Vin = 12 V and D*TSW = 0.5*5 ms, a value for L1 of 150 mH (Equation 3) will maintain ±30% ripple current in a 350 mA application, thereby ensuring CCM operation. +Vout (1-D) * TSW BJT Refresher A BJT is a current controlled device. The turn on, turn off, saturation voltage and storage time of a BJT are all determined by the magnitudes of turn on IB1 and turn off IB2 base currents. These currents are identified in Figure 5. The collector current rise time is controlled by the magnitude of IB1. The ratio Ic/IB1 controls the VCE(sat) of the BJT but there is a trade off as a large IB1 will be associated with a long storage time TS. This is the time interval before the BJT comes out of saturation. D1 (1-D) * TSW Figure 3. Diode Conduction During the Second Switching Interval (1-D)*TSW (1-D) * TSW Collector Current IC Vout Turn On Base Current Vin Turn Off Base Current Collector Current IC =0A IB2 IB1 TS VCE(sat) D * TSW Figure 4. Voltage Waveform Across the Inductor Figure 5. Turn On IB1 and Turn Off IB2 Base Currents For the inductor flux (V*ms) to remain in equilibrium each switching cycle, the V*ms product across the inductor during each switch interval must balance (see Figure 4). A simplified power stage showing how the Q1 and Q2 base drives are derived is illustrated in Figure 6. Vin D2 L1 Q1 Vout IB2 IB1 Cout D1 Cin D IB1 Q2 IB2 Figure 6. Simplified Power Stage showing BJT Base Drives http://onsemi.com 2 AND8305/D output inductor and D2, but here, power continues to flow between the input and output. This mode of operation is preferred since higher conversion efficiency is possible. Depending on the drive resistors selected, the storage time of a typical BJT maybe 1 or 2 ms. Hence the converter's duty cycle D is modified by an additional term DDLY because of storage effects. Further the storage times for Q1 and Q2 may be significantly different, impacting converter operation. +Vin Q1 OFF FIRST Inductor Energy Cycles via D1 and Q2 Key Component Selection NSS40500UW3T2G and NSS40501UW3T2G from ONSemiconductor's e-PowerEdge family of BJTs were chosen for cost/performance criteria. They feature ultra low saturation voltage at a 10:1 drive ratio (Figure 8) and the WDFN3 package provides excellent thermal performance (RqJL = 23°C/W). +Vout Q2 D1 +Vin VCE(sat), COLLECTOR EMITTER SATURATION VOLTAGE (V) 1.8 D2 Q1 Q2 OFF FIRST Inductor Energy Flows Input to Output IC/IB = 100 1.6 1.4 1.2 1.0 0.8 0.6 IC/IB = 10 0.4 0.2 Figure 7. Energy Flow Depending on Whether Q1 or Q2 Turns Off First 0 0.001 If Q1 turns off first, energy flows between D1, the output inductor and Q2, until Q2's storage interval is completed. This mode of operation (shown in Figure 7) generates loss but no power flows between the input and output. Alternatively, if Q2 turns off first, losses still occur in Q1, the 0.01 0.1 The controller used is ON Semiconductor's NCP3063. A functional block diagram is shown in the Figure 9. NCP3063 1 TSD N.C. Switch Collector SET Dominant R Q S 7 Comparator + 2 S Q Switch Emitter SET Dominant R + 0.2 V Oscillator 6 3 Timing Capacitor CT +VCC 5 10 Figure 8. Collector Emitter Saturation Voltage vs. Collector Current 8 Ipk Sense 1.0 IC, COLLECTOR CURRENT (A) 1.25 V Reference Regulator Comparator + - 4 GND Inverting Input Figure 9. Block Diagram of NCP3063 http://onsemi.com 3 AND8305/D This device consists of a 1.25 V reference, comparator, oscillator, an active current limit circuit, a driver and a high current output switch. In its traditional operating mode, the NCP3063 is a hysteretic, regulator that uses a gated oscillator to control the output. Voltage feedback from the output is sensed at pin 5, and gates the oscillator on/off to regulate the output. The oscillator frequency and off-time of the output switch are programmed by the value selected for the timing capacitor; CT. CT is charged and discharged by a 1 to 6 ratio internal current source and sink, generating a ramp at pin 3. The ramp is controlled by two comparators whose levels are set 500 mV apart. In normal operation, D is fixed at 6/7 or 0.86. In this application, the “gated oscillator” mode is only used to protect the LED string if a LED fails “open”. The NCP3063 can also operate as a conventional PWM controller, by injecting current into the CT pin. The control current may be developed either from the input source, providing voltage feedforward or from the output current sensing circuit. In either case, the slope of the oscillator ramp changes causing D to be modulated as shown in Figure 10. VCC IFF important to select a device and package that will maintain the device temperature in the particular application to avoid thermal runaway. The effect is shown in Figure 11. 100 IR, REVERSE CURRENT (mA) TJ = 150°C 100°C 1 75°C 0.1 25°C 0.001 0 10 20 30 40 50 VR, REVERSE VOLTAGE (V) 60 When the driver is in boost mode driving multiple LEDs, maximum power (6 watts) is delivered through diode D2. Because of the storage delays discussed previously, both D2 and Q1 conduct for an extended duty cycle compared to D1 and Q2. In order to process 6 watts on a 1 in. x 1 in. demo board, MBRD340 was selected for D2. At lower power levels, D2 could be replaced with MBRA340 at board location D4. The schematic of the power stage is shown in Figure 12. Note the addition of the speed up diode D3 to ensure Q3 turns off ahead of Q1. As Q3 approaches saturation, the IB1 base current is diverted through D3 holding the transistor out of saturation. This technique reduces Q3's storage time an order of magnitude at the expense of incurring additional VCE(sat) losses NCP3063 Figure 10. Current Injection into CT Pin Providing Continuous Duty Cycle Modulation Schottky Diode Selection Schottky diodes have reverse leakage current which increases with reverse voltage and temperature. Hence it is ISENSP ISENSN D2 VIN TP1 R14 Q1 L1 TP2 LED+ R4 D4 R2 D1 R3 D3 + C1 Q3 U1 1 R1 CLK 2 3 4 C2 RTN SWC NC SWE ISENS CT VCC GND CMPINV 8 C3 R5 7 6 R7 5 R8 70 Figure 11. Reverse Leakage Characteristic of MBRD360 6 ICHARGE CT 125°C 0.01 ICHARGE IFB 10 LED- C4 I_CNTRL Figure 12. Schematic of Power Stage http://onsemi.com 4 AND8305/D I_SENSP R11 I_SENSN R10 Q6B Q6A Q5 I_CNTRL R8 Q7A VIN R9 C5 Q7B U2 R12 R13 Figure 15. Boost Mode from 12 Vin to 16 Vout It is evident from Figures 14 and 15 that the inductor waveforms differ from the classic buck boost illustrated in Figure4. We define TS to be the difference in storage times of Q1 and Q2. During buck operation (Figure 14) the voltage across the inductor is clamped at (Vin-Vout) for the duration TS. During this interval Q2 is off and Q1 is on for the remainder of its storage time. During this period, power is delivered to the output via Q1 and D2 as previously discussed. In boost mode (Figure 15), the inductor voltage is clamped at (Vout-Vin) for the interval TS. The effect is shown in Figure 16. Figure 13. High Side Current Sensing Control Circuit In Figure 12, the current sense resistor R4 is placed in series with LED+, to satisfy the high side sensing requirement. The control circuit is illustrated in Figure 13. Here the bandgap reference U2, together with dual NPN transistors Q7A, Q7B and R12, R13 create two equal current sinks. These currents flow through the PNP matched current pair of Q6A and Q6B configured as a current mirror. At the same time current flowing through resistor R10 creates a voltage reference VSENSE. When the current sense signal ILED*R4 equals VSENSE, Q6A turns on. The voltage follower Q5 controls the current flowing into the CT pin of U1, thereby regulating the LED current at the required value. Capacitor C5 provides loop compensation. The voltage reference VSENSE can be made small (150 mV) to limit dissipation in the current sense resistor R4. Modifications to VSENSE and the 350 mA set point, can be made by adding a parallel resistor at location R11 on the demo board. For less demanding applications, the 1.25 V bandgap reference U2 can be replaced with dual series switching diodes (BAV99LT1) having a similar drop. Buck Mode < 0.5 (Vin - Vout) * TS (Vout - Vin) * TS Boost Mode > 0.5 Converter Waveforms The voltage waveforms at both the input (upper trace) and output (lower trace) of the inductor L1 were measured while the difference waveform (middle trace) gives the voltage across the inductor. Figure 14 shows the converter operating in buck mode, while Figure 15 illustrates boost operation. Figure 16. Voltage Across Inductor when Storage Interval TS is Included If we define DDLY = TS / TSW, the flux balance expression given in Equation 1 is modified as follows: (eq. 4) V in @ D @ T SW " (V in * V out) @ T S + V out(1 * D * T DLY) @ T SW The transfer function given in Equation 2 is also modified and becomes: V out + V in @ (D ) D DLY) (1 * D) (eq. 5) The term DDLY appearing in Equation 5 expresses mathematically the fact that components Q1 and D2 have an extended duty cycle. Put another way, to achieve the same converter gain as in the classical case (Equation 2), switch Q2's duty cycle D is reduced. Figure 14. Buck Mode from 12 Vin to 8 Vout http://onsemi.com 5 AND8305/D Demo Board The top side component layout of the NCP3063 buck boost demo board is shown in Figure 17. Figure 17. Top Side Component Layout The bottom side component layout is shown in Figure 18. Note that the copper pours mounting the power components Q1, Q2, D1, D2 and L1 have been maximized within the 1in. x 1in. footprint of the board. Figure 18. Bottom Side Component Layout http://onsemi.com 6 AND8305/D Test Data 82 81 A 12 V source is connected between VIN (positive) and RTN (negative) and the LED string, consisting of 3, 4 or 5, 350mA rated devices are connected across LED+ and LED-. Efficiency data, measured over an extended overlapping input and output voltage range, is shown in Figure 19. As can be seen from the efficiency curves, the driver efficiency varies between 75% and 80 % over a wide input and output range. For Vin equal to 10 V, the efficiency starts to fall as Vout is increased above 14 V. Under these operating conditions, the driver performance is limited by the base drive supplied to BJT Q1. 18 V EFFICIENCY (%) 80 16 V 79 12 V 14 V 78 77 Vin = 10 V 76 75 74 73 72 8 10 12 14 Vout (V) 16 18 20 Figure 19. 350 mA Buck-Boost LED Driver Efficiency over Line and Load (3-7 W) The BOM for the NCP3063 buck_boost demo board is given in Table 2. Generic resistors and capacitors are referenced by Digi-Key part numbers. Table 2. BOM for NCP3063 Buck_boost Demo Board Designator Quantity Manufacturer Manufacturer Part Number U1 1 ON Semiconductor NCP3063DR2G U2 1 ON Semiconductor TLV431ASN1T1G Q1 1 ON Semiconductor NSS40500UW3T2G Q3 1 ON Semiconductor NSS40501UW3T2G Q5 1 ON Semiconductor 2N7002LTIG Q6 1 ON Semiconductor NST30010MXV6T1G Q7 1 ON Semiconductor MBT3904DW1T1G D1 1 ON Semiconductor MBRA340T3G D2 1 ON Semiconductor MBRD340T4G D3 1 ON Semiconductor BAT54T1G C1 1 100 mF/25 V P10413TB-ND C2 1 3900 pF/50 V 478-1222-2-ND C3 1 10 mF/25 V 490-3373-2-ND C4 1 1 mF/25 V 587-1248-2-ND C5 1 47 nF/35 V 587-1248-2-ND R1 1 Not required NA R2, R5 2 100/0603 541-100HTR-ND R3 1 200/0805 P200CTR-ND R4 1 IRC LRC-LR1206-01-R400-F R6 1 2.49 k/0603 P2.49KHTR-ND R7 1 41.2 k/0603 P41.2HTR-ND R8, R12, R13 3 2.21 k/0603 541-2.21KHTR-ND R9 1 4.99 k/0603 311-4.99KHTR-ND R10 1 499 k/0603 P499HTR-ND R11 1 Not Required NA R14 1 IRC LRC-LR1206-01-R100-F L1 1 TDK SLF10145T-151MR79-PF http://onsemi.com 7 AND8305/D ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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