A 160 W CRT TV Power Supply Using NCP1337

AND8246/D
A 160 W CRT TV Power
Supply using NCP1337
Prepared by: Nicolas Cyr
ON Semiconductor
http://onsemi.com
APPLICATION NOTE
Introduction
A 160 W TV Power Supply Design
Valley switching converters, also known as
quasi−resonant (QR) converters, allow designing flyback
Switch−Mode Power Supplies (SMPS) with reduced
Electro−Magnetic Interference (EMI) signature and
improved efficiency. Thanks to the low level of generated
noise, valley switching SMPS converters are therefore very
well suited to applications dealing with RF and video
signals, such as TVs.
ON Semiconductor NCP1337 is a powerful valley
switching controller, which eases the design of an
EMI−friendly TV power supply with only a few surrounding
components. Moreover, very low standby power (less than
1 W) can be achieved without any noise.
Power Supply Specification
•
•
•
•
•
•
•
160 W
+135 V, 1 A max (135 W) regulated
+20 V, 800 mA max (16 W)
+12 V, 500 mA max (6 W)
+8 V, 500 mA max (4 W)
Standby output :
+5 V, 100 mA derived from +8 V through
a regulator
Protections
Standby Power
• Automatic Valley Switching
• Current−Mode
• Soft Ripple Mode with Minimum Switching Frequency
•
•
•
Universal input 90 Vac to 265 Vac
Outputs
Main Features of the Controller
•
Input Voltage
Output Power
Short−circuit, over−power, over−voltage
and brown−out
below 1 W
for Noise−Free Standby
Auto−Recovery Short−Circuit Protection Independent
of Auxiliary Voltage
Over Voltage Protection
Brown−Out Protection
2 Externally Triggerable Fault Comparators
(Auto−Recovery or Permanent Latch)
Internal 5 ms Soft−Start
500 mA Peak Current Source/Sink Capability
130 kHz Max Frequency
Internal Leading Edge Blanking
Internal Temperature Shutdown
Direct Optocoupler Connection
Dynamic Self−Supply
© Semiconductor Components Industries, LLC, 2005
November, 2005 − Rev. 1
1
Publication Order Number:
AND8246/D
AND8246/D
Schematic
C19
R17
D13
135V
12
C20
D5
R2
R1
C8
R10
D141
T1
C4
6
D111
R3
Rbo1
Rhyst
C2
Rbo2
C7
L1
8
D6
20V
Out20V
R35
R11
12V
C141
Out12V
17
4
D11
D7
C5
R34
Out20V
C131
Rbo
M1
2
R31
D1
D14
18
C9
0V
R33
11
DZ3
C26
Out12V
16
IC3
8V
C13
1
8
2
7
C14 Out8V
Out8V
15
D12
IC4
D16
Reg 5V OUT
IN
3
6
4
5
14
C11
C10
C15
C3
IC1
5Vstby
ADJUST
C18
C16
C17
DZ2
13
X1
R4
C12
C1
R8
R19
SW1
R18
R5
F1
C25
R6
Rs2
Rs1
IC3x
C21
D10
R12
mains
R7
C23
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IC2
P1
R13
Q1
R21
R16
AND8246/D
Design Steps
At this time we don’t know the value of LLEAK, but we
can choose a value of 3% of the primary inductance (i.e.
10 mH), which would not be too far from the final value.
Considering 330 pF on the drain, at 375 V input voltage
and 160 W of output power, which gives IP = 4.2 A, we
obtain: VOVLEAK 730 V.
But we only have 100 V available before reaching the
MOSFET breakdown voltage. So we will need to add a
clamp to limit the spike at turn−off.
Please refer to application note AN1679 (available at
www.onsemi.com) to calculate this clamp. You can also use
a SPICE simulator to test the right values for the
components.
We chose to use an RCD clamp, using a 1N4937 diode, a
47 kW resistor and a 10 nF capacitor: it is an aggressive
design (the maximum drain voltage will be very close to the
maximum voltage allowable for the MOSFET), but it gives
enough protection without degrading the efficiency too
much.
1. Reflected Voltage
Let us first start the design by selecting the amount of
secondary voltage we want to reflect on the primary side,
which will give us the primary to secondary turn ratio of the
transformer. If we decide that we want to use a rather cheap
and common 600 V MOSFET, we will select the turn ratio
by:
VINmax N · (VOUT VF) 600 V
VINmax is 375 V and (VOUT + VF) is about 135.5 V. If we
decide to keep a 100 V safety margin, it gives N < 0.92. We
will choose a turn ratio of N = 0.91, which will give a
reflected voltage of 123 V.
2. Peak Current
Knowing the turn ratio, we can now calculate the peak
primary current needed to supply the 75 W of output power.
If we neglect the delay TW between the zero of the current
and the valley of the drain voltage, we can calculate IPmax
by:
5. Brown−Out Protection
We want the power supply to turn on at 90 Vac, and turn
off at 70 Vac.
Start−up level is directly given by the resistor divider
connected between high input voltage and BO pin, knowing
that the threshold of the internal comparator is 500 mV.
90 Vac means 127 Vdc, so the ratio of the divider must be
254.
Once the controller has started, an internal 10 mA current
source is activated and flows out of BO pin, creating
hysteresis. 70 Vac means 99 Vdc, so we want a 28 V
hysteresis, corresponding to 22% of the start−up level. The
corresponding threshold for the comparator is 390 mV, so
the 10 mA current must create an offset of 110 mV across the
equivalent resistance of the resistor divider.
Those 2 conditions lead to 2 equations:
VINmin N · (VOUT VF)
IPmax 2 · POUT ·
h · N · VINmin · (VOUT VF)
VINmin is 110 V and η is 85%. Plugging the other values
gives us a maximum peak current of IPmax = 6.5 A.
NCP1337 max current sense setpoint is 500 mV, so we
should put a sense resistor RS = 0.5 V / 6.5 A = 0.077 W. We
will use two standard 0.15 W resistors in parallel, that will
allow IPmax = 6.67 A.
3. Primary Inductance
To calculate the primary inductance LP, we need to decide
the switching frequency range in which we allow the
controller to operate. There are two constraints: at low line,
maximum power, the switching frequency should be above
the audible range (higher than 20 kHz). At high line, 50%
nominal power, the switching period should be higher than
7.5 ms, to prevent the controller from jumping between
valleys (because these discrete jumps between 2 valleys can
generate noise in the transformer as well). If we still neglect
TW, LP is then given by:
1
LP 2 · FSWmin · POUTmax
RBOhigh RBOlow
RBOlow
and
RBOhigh · RBOlow
RBOhigh RBOlow
2
VINminN · (VOUTVF)
h · N · VINmin · (VOUTVF)
· 10−5 0.11
Solving these equations gives RBOhigh = 2.8 MW and
RBOlow = 11 kW.
But in reality there will be a non−negligible ripple on the
DC input voltage, and the hysteresis should be increased in
order to obtain the desired turn−on and turn−off levels.
Final value for RBOlow is 15k (RBO2 in schematic), and
3.9 MW for RBOhigh (split in RBO = 2.7 MW and RBO1 =
1.2 MW to sustain the high voltage).
A capacitor C7 is added between BO pin and ground to
filter any noise, and to ensure a DC voltage. This capacitor
value should be small enough, otherwise it may introduce a
delay between input voltage collapsing and Power supply
turn−off (a 10 nF ceramic capacitor gives good results).
If we choose 20 kHz min for 160 W of output power at
110 Vdc, we obtain: LP 380 mH.
To take tolerances into account, we can choose LP =
330 mH, and verify if it satisfies the second condition:
For 80 W output power at 375 Vdc, TSW = 9 ms, i.e.
FSW = 112 kHz.
4. Clamp
We can calculate the overvoltage due to the leakage
inductance: VOVLEAK IP
254
LCLEAK
.
TOT
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AND8246/D
6. Overpower Protection
when the input voltage is high: as a result overvoltage
protection on VCC pin is lost.
We have seen that full load maximum peak current at low
input voltage is 6.5 A, but only 4.2 A at high input voltage.
We need to create an offset on the current sense signal. As
500 mV on CS pin corresponds to 6.67 A, 2.3 A corresponds
to a 172 mV offset. At 375 Vdc input voltage, BO voltage is
1.55 mV: as a result a 73.5 mA current flows out of CS pin
during ON time. To create the desired 172 mV offset, it is
necessary to insert a 2.34 kW resistor R6 in series. We choose
a standard 2.2 kW value.
Static Measurements
Brown−Out Protection
• Input voltage turn−ON level:
• Input voltage turn−OFF level:
95 Vac
80 Vac
Efficiency
• At 230 Vac, 148 W IN for 135 W OUT • At 110 Vac, 154 W IN for 135 W OUT 7. Standby
In order to reduce as much as possible the power wasted
during standby mode, NCP1337 enters an efficient and quiet
soft−skip mode. But because of the high output voltage of
135 V, any leakage current will create a significant output
power, preventing the power supply to reach the
requirement of less than 1 W standby power. This
demonstration board thus includes a simple patented circuit
that allows collapsing all unused outputs, while still
powering the 5 V standby rail. This circuit is made of a
regulated rectifier (around M1) connected between the high
voltage output winding and the input of the 5 V linear
regulator IC4, and of a switch (Q1) that changes the
regulation setpoint. DZ2 is added to prevent voltage drops
during transition from normal to standby mode.
If the leakage current on the 135 V output is extremely
low, this circuit can be omitted (see appendix schematic A).
91%
87%
Standby Power
• Noise−free
• All outputs are low (135 V output is 12.7 V), except
5 V standby output which is maintained. IOUT
consumption is taken on 5 V standby output. Controller
is powered thanks to the Dynamic Self−Supply (DSS).
IOUT
VIN
0
10
20
30
40
230 Vac
390 mW
600 mW
780 mW
980 mW
1.18 W
110 Vac
230 mW
460 mW
700 mW
860 mW
975 mW
• All outputs are low (135 V output is 12.7 V), except
5 V standby output which is maintained. IOUT
consumption is taken on 5 V standby output. Controller
is powered thanks to a forward−coupled auxiliary
winding.
8. Controller Supply
NCP1337 includes a DSS able to supply the controller
without the help of any auxiliary supply. However this is
possible only if the gate current is low, i.e. during standby in
our case. So an auxiliary winding is necessary to supply the
controller during normal mode, but DSS can be activated in
standby, for instance in the case all voltages are decreased by
the circuit described above. In order to minimize the power
consumption of the DSS, HV pin can be connected to the
half−wave rectified input voltage instead of the full−wave
rectified bulk voltage.
To further decrease the power consumed by the controller
during standby, it may be interesting to prevent the DSS to
turn on: this can be achieved by inverting the coupling of the
auxiliary winding (see appendix schematic B). By creating
the auxiliary supply from a forward winding instead of a
flyback winding, it is possible to ensure a sufficient supply
voltage even in standby mode with all voltages reduced.
VCC voltage must then be clamped to protect the controller
IOUT
VIN
0
10
20
30
40
230 Vac
340 mW
470 mW
580 mW
730 mW
900 mW
110 Vac
140 mW
350 mW
540 mW
700 mW
820 mW
• All outputs are at their nominal values. IOUT
consumption is taken on 5 V standby output. Controller
is powered thanks to the auxiliary winding.
IOUT
VIN
0
10
20
30
40
230 Vac
260 mW
380 mW
620 mW
740 mW
880 mW
110 Vac
180 mW
280 mW
400 mW
540 mW
690 mW
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AND8246/D
Static Measurements
Soft−Start
CS
CS
Drain
Drain
At 230 Vac, full load
At 110 Vac, no load
CS
CS
Drain
Drain
At 230 Vac, no load
At 110 Vac, no load
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AND8246/D
Valley Switching
At 230 Vac, full load
At 110 Vac, full load
At 230 Vac, half load
At 110 Vac, half load
Load Transients
At 230 Vac, 20% to 80% load on 135 V output
At 110 Vac, 20% to 80% load on 135 V output
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AND8246/D
Standby
Vcc
Vcc
Standby burst at 110 Vac
Vcc
Vcc
Standby burst at 230 Vac
Transitions Between Modes
5V Standby
5V Standby
135V output
135V output
Normal to Standby Transition
Standby to Normal Transition
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7
AND8246/D
Board Layout
20V
12V
8V
5V
135V
Standby switch:
Left: normal mode
Right: standby mode
AC input
Bill of Material
IC1
IC2
IC3
IC4
X1
M1
Q1
T1
L1
F1
D1
D5, D10, D14, D16, D141
D6
D7
D11, D12, D111
D13
DZ2
DZ3
R1, R35
R2
Rbo
Rbo1
Rbo2
Rhyst
R3
R4
R5, R21
Rs1, Rs2
R6
NCP1337
TL431
SFH615A
MC78L05
IRFIB6N60A
BS108
BC547
TDK SRW42/15EC−X21V017, CLICK BCK4201−304
OREGA 47283900 RM4
2A 250V
KBU4K
1N4007
1N4937
1N4148
MUR420
MUR460
3V9
6V2
1k
47k −
−2W
2.7Meg
1.2Meg
15k
−
47
15
33k
0.15
2.2k
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8
R7
R8
R10
R11
R12
R13, R16
R17
R18, R31
R19
R33,R34
P1
C1, C2
C3
C4
C5
C7
C8
C9
C10
−4kV
10Meg −
330
150k
120k
5.6k
100k
−
18k
1.5k
47k
1k
330p −
−300Vac −X2
10p −
−2kV
−
220u −450V
450V
1u −
−63V
10n −
−630V
−
33u −
−25V
C11, C13, C15, C25, C131
C12
C14, C16, C141
C17
C18
C20
C21
C23
C26
100n
330p −
−1.5kV
1000u −35V
100u −25V
25V
1000u −16V
100u −200V
1n
2.2n −Y1
Y1
470n
AND8246/D
Board Picture
Appendix Schematic A
C19
R17
D13
135V
12
C20
0V
11
R2
D5
C8
R10
R1
T1
C4
6
D111
R31
4
D11
D7
Rbo1
Out12V
16
IC3
C14
C13
1
Rhyst
C2
12V
Out12V
17
8
D6
R11
C141
C131
C9
C5
Out20V
18
Rbo
D1
20V
Out20V
2
R3
8
2
7
3
6
8V
Out8V
Out8V
15
IC4
D12
IN
C7
Rbo2
4
L1
5
C10
C11
R4
C1
C16
C15
C3
IC1
X1
R8
C12
F1
R19
R18
C25
Rs2 Rs1
IC3x
C21
D10
mains
R12
R7
C23
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9
5Vstby
OUT
C17
DZ2
13
R5
R6
Reg 5V
ADJUST
14
IC2
P1
AND8246/D
Appendix Schematic B
C19
R17
D13
135V
12
C20
R2
D5
C8
R10
R1
D141
T1
C4
0V
R33
11
D111
D14
M1
R34
Out20V
20V
Out20V
2
8
R3
R31
D6
4
D11
C5
Rbo1
Rhyst
C2
C7
L1
Rbo2
12V
Out12V
17
6
D7
R11
C141
C131
C9
Rbo
D1
R35
18
Out12V
DZ3
C26
16
IC3
C13
1
8
2
7
DZ1
C14
8V
Out8V
Out8V
15
D12
IC4
D16
3
6
4
5
14
C11
C10
ADJUST
C15
C3
IC1
5Vstby
Reg 5V OUT
IN
C18
C16
C17
DZ2
13
X1
R4
R8
C12
C1
R19
SW1
R18
R5
C25
F1
R6
Rs2
Rs1
IC3x
C21
D10
R12
mains
R7
IC2
R13
P1
Q1
C23
R21
R16
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