4-BIT MAGNITUDE COMPARATOR

SN74LS85
4−Bit Magnitude
Comparator
The SN74LS85 is a 4-Bit Magnitude Camparator which compares
two 4-bit words (A, B), each word having four Parallel Inputs
(A0 −A3, B0 −B3); A3, B3 being the most significant inputs. Operation
is not restricted to binary codes, the device will work with any
monotonic code. Three Outputs are provided: “A greater than B”
(OA > B), “A less than B” (OA < B), “A equal to B” (OA = B). Three
Expander Inputs, IA > B, IA < B, IA = B, allow cascading without external
gates. For proper compare operation, the Expander Inputs to the least
significant position must be connected as follows: IA < B= IA > B = L,
IA = B = H. For serial (ripple) expansion, the OA > B, OA < B and OA = B
Outputs are connected respectively to the IA > B, IA < B, and IA = B
Inputs of the next most significant comparator, as shown in Figure 1.
Refer to Applications section of data sheet for high speed method of
comparing large words.
The Truth Table on the following page describes the operation of the
SN74LS85 under all possible logic conditions. The upper 11 lines
describe the normal operation under all conditions that will occur in a
single device or in a series expansion scheme. The lower five lines
describe the operation under abnormal conditions on the cascading
inputs. These conditions occur when the parallel expansion technique
is used.
• Easily Expandable
• Binary or BCD Comparison
• OA > B, OA < B, and OA = B Outputs Available
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LOW
POWER
SCHOTTKY
16
1
PLASTIC
N SUFFIX
CASE 648
16
1
SOIC
D SUFFIX
CASE 751B
GUARANTEED OPERATING RANGES
Symbol
VCC
Parameter
Supply Voltage
Min
Typ
Max
Unit
4.75
5.0
5.25
V
0
25
70
°C
1
SOEIAJ
M SUFFIX
CASE 966
TA
Operating Ambient
Temperature Range
IOH
Output Current − High
−0.4
mA
IOL
Output Current − Low
8.0
mA
16
ORDERING INFORMATION
Device
Package
Shipping
SN74LS85N
16 Pin DIP
2000 Units/Box
SN74LS85D
SOIC−16
38 Units/Rail
SN74LS85DR2
SOIC−16
2500/Tape & Reel
SN74LS85M
SOEIAJ−16
See Note 1
SN74LS85MEL
SOEIAJ−16
See Note 1
1. For ordering information on the EIAJ version of
the SOIC package, please contact your local
ON Semiconductor representative.
© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev. 8
1
Publication Order Number:
SN74LS85/D
SN74LS85
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC
A3
B2
A2
A1
B1
A0
B0
16
15
14
13
12
11
10
9
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual In-Line Package.
1
2
3
4
B3
IA<B
IA=B
IA>B
8
5
6
7
OA>B OA=B OA<B GND
LOADING (Note a)
PIN NAMES
A0 − A3, B0 − B3
IA = B
IA < B, IA > B
OA > B
OA < B
OA = B
Parallel Inputs
A = B Expander Inputs
A < B, A > B, Expander Inputs
A Greater than B Output
B Greater than A Output
A Equal to B Output
HIGH
LOW
1.5 U.L.
1.5 U.L.
0.5 U.L.
10 U.L.
10 U.L.
10 U.L.
0.75 U.L.
0.75 U.L.
0.25 U.L.
5 U.L.
5 U.L.
5 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.
LOGIC SYMBOL
10 12 13 15 9 11 14 1
4
2
3
A0 A1 A2 A3 B0 B1 B2 B3
IA>B
OA>B
IA<B
OA<B
IA=B
OA=B
VCC = PIN 16
GND = PIN 8
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2
5
7
6
SN74LS85
LOGIC DIAGRAM
A3
B3
(15)
(1)
(5)
A2
B2
(13)
(14)
(2)
A<B (3)
A=B (4)
A>B
A1
B1
(6)
OA=B
(12)
(11)
(7)
A0
B0
OA>B
OA<B
(10)
(9)
TRUTH TABLE
CASCADING
INPUTS
COMPARING INPUTS
OUTPUTS
A3,B3
A2,B2
A1,B1
A0,B0
IA>B
IA<B
IA=B
OA>B
OA<B
OA=B
A3>B3
A3<B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
X
X
A2>B2
A2<B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
X
X
X
X
A1>B1
A1<B1
A1=B1
A1=B1
A1=B1
A1=B1
A1=B1
A1=B1
A1=B1
X
X
X
X
X
X
A0>B0
A0<B0
A0=B0
A0=B0
A0=B0
A0=B0
A0=B0
X
X
X
X
X
X
X
X
H
L
X
H
L
X
X
X
X
X
X
X
X
L
H
X
H
L
X
X
X
X
X
X
X
X
L
L
H
L
L
H
L
H
L
H
L
H
L
H
L
L
L
H
L
H
L
H
L
H
L
H
L
H
L
L
H
L
L
L
L
L
L
L
L
L
L
H
L
L
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3
H = HIGH Level
L = LOW Level
X = IMMATERIAL
A0 A1 A2 A3 B0 B1 B2
L
L
H
IA > B
IA < B
SN74LS85
IA = B
B3
A0 A1 A2 A3 B0 B1 B2
OA > B
OA < B
IA > B
IA < B
OA = B
IA = B
Bn
B n1
B n2
B n3
An
A n1
B3
A n2
A0 A1 A2 A3 B0 B1 B2
A n3
SN74LS85
B3
A>B
A<B
A=B
OA > B
OA < B
OA = B
SN74LS85
L = LOW LEVEL
H = HIGH LEVEL
Figure 1. Comparing Two n-Bit Words
APPLICATIONS
Figure 2 shows a high speed method of comparing two
24-bit words with only two levels of device delay. With the
technique shown in Figure 1, six levels of device delay result
when comparing two 24-bit words. The parallel technique
can be expanded to any number of bits, see Table 1.
Table 1
WORD LENGTH
NUMBER OF PKGS.
1 −4 Bits
5 −24 Bits
25 −120 Bits
1
2 −6
8 −31
NOTE:
The SN74LS85 can be used as a 5-bit comparator only
when the outputs are used to drive the A0−A3 and B0−B3
inputs of another SN74LS85 as shown in Figure 2 in positions #1, 2, 3, and 4.
INPUTS
(LSB)
A0 A1 A2 A3 B0 B1 B2 B3
(MSB)
A20 A21 A22 A23 B20 B21 B22 B23
L
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
A19
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
L
IA < B
OA < B
B19
IA < B
H
IA = B
OA = B
L
IA = B
#5
#1
OA < B
OA = B
NC
INPUTS
A5 A6 A7 A8 B5 B6 B7 B8
A4
B4
L
A10 A11 A12 A13 B10 B11 B12 B13
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
#4
IA < B
OA < B
A9
IA > B
IA = B
OA = B
B9
NC
L
A15 A16 A17 A18 B15 B16 B17 B18
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
#3
IA < B
OA < B
IA > B
IA = B
OA = B
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
#2
IA < B
OA < B
IA > B
A14
B14
NC
IA = B
L
OA = B
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
IA < B
IA = B
MSB = MOST SIGNIFICANT BIT
LSB = LEAST SIGNIFICANT BIT
L = LOW LEVEL
H = HIGH LEVEL
NC = NO CONNECTION
Figure 2. Comparison of Two 24-Bit Words
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4
#6
OA < B
OA = B
OUTPUTS
NC
SN74LS85
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Min
Parameter
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VIK
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
Typ
Max
2.0
0.8
−0.65
2.7
−1.5
3.5
Input LOW Current
A < B, A > B
Other Inputs
IOS
Output Short Circuit Current (Note 2)
ICC
Power Supply Current
V
Guaranteed Input HIGH Voltage for
All Inputs
V
Guaranteed Input LOW Voltage for
All Inputs
V
VCC = MIN, IIN = − 18 mA
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
0.4
V
IOL = 4.0 mA
0.35
0.5
V
IOL = 8.0 mA
20
60
μA
VCC = MAX, VIN = 2.7 V
0.1
0.3
mA
VCC = MAX, VIN = 7.0 V
−0.4
−1.2
mA
VCC = MAX, VIN = 0.4 V
−100
mA
VCC = MAX
20
mA
VCC = MAX
A < B, A > B
Other Inputs
IIL
Test Conditions
0.25
Input HIGH Current
A < B, A > B
Other Inputs
IIH
Unit
−20
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
2. Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)
Limits
Typ
Max
Unit
tPLH
tPHL
Any A or B to A < B, A > B
24
20
36
30
ns
tPLH
tPHL
Any A or B to A = B
27
23
45
45
ns
tPLH
tPHL
A < B or A = B to A > B
14
11
22
17
ns
tPLH
tPHL
A = B to A = B
13
13
20
26
ns
tPLH
tPHL
A > B or A = B to A < B
14
11
22
17
ns
Symbol
Min
Parameter
Test Conditions
VCC = 5.0 V
CL = 15 pF
AC WAVEFORMS
VIN
1.3 V
1.3 V
tPHL
VOUT
1.3 V
VIN
1.3 V
tPHL
tPLH
1.3 V
1.3 V
VOUT
Figure 3.
tPLH
1.3 V
1.3 V
Figure 4.
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5
SN74LS85
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 648−08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
−A−
16
9
1
8
B
F
C
DIM
A
B
C
D
F
G
H
J
K
L
M
S
L
S
SEATING
PLANE
−T−
H
K
G
D
M
J
16 PL
0.25 (0.010)
T A
M
M
INCHES
MIN
MAX
0.740
0.770
0.250
0.270
0.145
0.175
0.015
0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008
0.015
0.110
0.130
0.295
0.305
0_
10 _
0.020
0.040
MILLIMETERS
MIN
MAX
18.80
19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B−05
ISSUE J
−A−
16
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
9
−B−
1
P
8 PL
0.25 (0.010)
8
M
B
S
G
R
K
F
X 45 _
C
−T−
SEATING
PLANE
J
M
D
16 PL
0.25 (0.010)
M
T B
S
A
S
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6
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
SN74LS85
PACKAGE DIMENSIONS
M SUFFIX
SOEIAJ PACKAGE
CASE 966−01
ISSUE O
16
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
LE
9
Q1
E HE
1
M_
L
8
Z
DETAIL P
D
e
VIEW P
A
A1
b
0.13 (0.005)
c
M
0.10 (0.004)
DIM
A
A1
b
c
D
E
e
HE
L
LE
M
Q1
Z
MILLIMETERS
MIN
MAX
−−−
2.05
0.05
0.20
0.35
0.50
0.18
0.27
9.90
10.50
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 _
0_
0.70
0.90
−−−
0.78
INCHES
MIN
MAX
−−− 0.081
0.002
0.008
0.014
0.020
0.007
0.011
0.390
0.413
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 _
0_
0.028
0.035
−−− 0.031
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