NCL30002: 200-265 Vac Low Ripple Buck LED Driver

DN05042/D
200-265 Vac Low Ripple
Buck LED Driver
Overview
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High voltage LEDs such as Philips-Lumileds Luxeon
H50−2 offer the opportunity to use a cost effective
non-isolated topology such as the NCL30002 based CrM
LED driver. This design note shows a compelling
implementation for a very simple driver for a string of 3 high
voltage LED’s with a nominal forward voltage of 50 V per
LED. The basic architecture is scalable to higher current
LEDs and can support other HV−LEDs on the market.
This makes the CrM buck topology an excellent
architecture as an LED driver for the following reasons:
 Low RMS Current Stress on the FET and Output Diode
since the Current is Much Lower for the HV LEDs and
the Duty Cycle is Relatively High
 Low Current Stress Allows the Use of Smaller FETS
and Diodes Leading to Optimum Bill-of-material
(BOM) Cost
 Standard Mass Produced Inductors Can Also Be Used
which Further Supports a Cost Effective Design
 Low Output Current Ripple
DESIGN NOTE
Please note the input bulk capacitor was sized to comply
with EN61000−3−2 Class C (EU), but the same basic design
can be used for other lower voltage mains regions like US,
Canada, and Latin America for example where that standard
does not apply.
The key reason this controller was selected is that it has a
very accurate current sense threshold of 485 mV 2% which
is important to achieve good current regulation accuracy.
In addition, in this design the inductor was also the focus
of change from the standard implementation to eliminate the
need for auxiliary winding for VCC power and ZCD (Zero
Current Detector). This allows the designer to use a standard
off-the-shelf inductor rather than a custom inductor.
Key Features
Operation of the NCL30002 CrM controller for buck
operation is detailed in AND9094D. While that application
note describes how the device can be used to implement a
high power factor buck implementation, this design note
will describe a low ripple configuration.
Figure 1. NCL30002
Table 1. DEVICE DETAILS
Device
Application
Input Voltage
Output Power
Topology
I/O Isolation
NCL30002
LED Lighting
200 to 265 Vac
3.8 W
CRM Buck
No
Table 2. OTHER SPECIFICATIONS
Output Specification
Output Voltage
Nominal Current
24.5 mA
Harmonic Content
EN61000−3−2 Class C
Efficiency
84.8% Typical
LED
Luxeon 3  H50−2
 Semiconductor Components Industries, LLC, 2013
May, 2013 − Rev. 1
156 V
1
Publication Order Number:
DN05042/D
1
AC_L
1
AC_N
D6
D4
Rfuse1
D7
D5
R2
C10
C5
R13
L3
R3
C4
2
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Figure 2. Schematic
C9
4
3
2
1
NCL30002
8
VCC
7
Comp Gdrv
6
Gnd
CT
5
ZCD
CS
MFP
U1
CVCC
D10
Rzcd
Rgd
D9
D1
R12
Rstart
C11
Rsens
Qfet
Dout
L2
Cout
1
1
LED_P
1
LED_N
1
DN05042/D
DN05042/D
V(vds)
330 V
300 V
−I(C3)
60 mA
40 mA
VCC Charging Current
270 V
20 mA
240 V
0 mA
210 V
−20 mA
180 V
−40 mA
150 V
−60 mA
120 V
−80 mA
90 V
−100 mA
Drain Voltage
60 V
−120 mA
−140 mA
30 V
0V
−160 mA
195.6 ms
195.9 ms
196.2 ms
196.5 ms
196.8 ms
197.1 ms
197.4 ms
197.7 ms
198.0 ms
198.3 ms
198.6 ms
Figure 3. Simulation of Drain Voltage and Charge Current
V(vds)
400 V
−I(C3)
160 mA
120 mA
320 V
80 mA
FET Turn On
40 mA
240 V
0 mA
160 V
−40 mA
Charge Pump
Discharge
80 V
−80 mA
−120 mA
−160 mA
0V
190 ms
191 ms
192 ms
193 ms
194 ms
195 ms
196 ms
197 ms
198 ms
199 ms
200 ms
Figure 4. FET Drain Voltage and Charge Pump Capacitor Current
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3
201 ms
DN05042/D
Referencing the schematic, VCC power and ZCD now
come from a charge pump driven from the drain of the FET.
The charge pump consists of C11, D1, D9, and R12. When
the FET turns off, drain current charges C11 providing a
pulse of current into the VCC capacitor via D9.
Figure 3 and 4 show some simulations of the charge
pump. The 2 noteworthy items from figure 3 are that the
current is limited because it is driven by the inductor. Also
the drain voltage has well defined rise time which reduces
EMI and reduces the trailing edge power losses. At turn on,
the FET is fast but turns on into a low current.
The turn on of the FET discharges the charge pump
capacitor through R12. The on time needs to be at least 3RC
time constants of C11 and R12 to ensure good discharge.
R12 should be chosen to provide the lowest discharge
current while still allowing for a complete discharge of C11.
Since this is a CrM control, the peak to average current is
2:1. So by controlling the peak current by choice of Rsens, we
can control the average current. In any open loop control,
there are error sources that show up in the regulation. The
two major error sources are:
1. Propagation Delay in the Sensing and Control:
The delays in the current sense cause the current to
overshoot the target value resulting in the output
current creeping up with the line voltage. This is a
relatively linear effect. Higher frequency operation
will show this more than low frequency operation.
2. Charge-pump Operation:
The charge pump capacitor causes a delay in rise
time of the drain voltage. This effect is more
prominent at higher switching frequency which is
the case at higher line voltages.
Start-up
Conclusion
The start-up resistor (Rstart) connects to the output. This
type of connection has three key advantages:
1. Fast Start-up:
The start-up resistor precharges the output
capacitor while also charging the VCC capacitor.
2. Low Dissipation:
In operation, the output voltage is much lower than
the HVDC bulk voltage.
3. Inherent Open Circuit Protection:
If the load is open, there is no current available to
start switching.
The charge pump buck LED driver is best used in a single
line range configuration. The charge pump current increases
with frequency and voltage. The nature of CrM operation
causes both frequency and voltage to increase together. The
charge pump capacitor is sized by the lowest operating
voltage (which is also the lowest frequency). As the line
voltage increases, excess charge pump current is dissipated
in D10. The effect of this is seen in the efficiency curves. The
effect on efficiency is most noticed in low power
applications. While 3% regulation is very good over the
extremes of a single line range, the addition of feed forward
into the current sense node can further improve the line
regulation. This requires the addition of 2 resistors R4 and
R5 shown in the Figure 5.
Regulation
The NCL30002 controller operates as a peak current limit
controller with no feedback. The internal error amplifier is
bias by R2 and R3 to saturate the error amplifier output high.
The error amplifier input cannot be left open as this is
detected as an open feedback divider and the controller will
shutdown. The value of the timing capacitor (C9) is chosen
to be long enough not to limit the on time.
DI +
(V in * V LED)
V
@ t on + LED @ t off + I peak
L
L
I LED +
I peak
2
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DN05042/D
Table 3. BILL OF MATERIALS
Qty
Reference
Part
Manufacturer
Part Number
RoHS
Substitution
1
1
CVCC
4.7 mF
Murata
GRM188C81E475KE11D
Yes
Yes
Cout
100 nF
Kemet
C1206C104K2RACTU
Yes
Yes
1
C4
68 nF, 400 V
Epcos
B32559C6683+***
Yes
Yes
1
C5
1 mF, 400 V
Rubycon
400LLE1MEFC6.3X11
Yes
Yes
1
C9
10 nF
Kemet
C0402C103K3GACTU
Yes
Yes
1
C10
1 nF
Kemet
C0402C102K3GACTU
Yes
Yes
1
C11
100 pF
Johanson
501R15N101K4T
Yes
Yes
2
D1, Dout
UFM15PL
MCC
UFM15PL
Yes
Yes
4
D4, D5, D6, D7
SM4006PL
MCC
SM4006PL
Yes
Yes
1
D9
BAS21DW5T1G
ON Semiconductor
BAS21DW5T1G
Yes
No
1
D10
NZ9F18VT5G
ON Semiconductor
NZ9F18VT5G
Yes
No
1
L2
10 mH
Bourns
RL875S−103K−RC
Yes
Yes
1
L3
1.5 mH
Wurth
7447462152
Yes
Yes
1
Qfet
BSS127S−7
Diodes
BSS127S−7
Yes
Yes
1
Rfuse1
10 W
Yageo
FRM−25JR−52−10R
Yes
Yes
1
Rgd
10 W
Yageo
RC0402FR−0710RL
Yes
Yes
1
Rsens
9.53 W
Stackpole
RMCF0603FT9R53
Yes
Yes
1
Rstart
1.0 MW
Yageo
RC0805FR−071ML
Yes
Yes
1
Rzcd
24.9 kW
Yageo
RC0402FR−0724k9L
Yes
Yes
3
R2, R4, R5
100 kW
Yageo
RC0402FR−07100kL
Yes
Yes
1
R3
681 kW
Yageo
RC0402FR−07681kL
Yes
Yes
1
R12
10 kW
Yageo
RC1206JR−0710KL
Yes
Yes
1
R13
220 W
Yageo
RC0805JR−07220RL
Yes
Yes
1
U1
NCL30002
ON Semiconductor
NCL30002DR2G
Yes
No
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5
DN05042/D
Rstart
C4
Dout
D10
D1
L2
D9
R12
C11
CVCC
R4
1
2
3
4
U1
MFP
Comp
VCC
Gdrv
CT
Gnd
CS
ZCD
8
7
6
5
Qfet
Rgd
Rzcd
NCL30002
R5
C9
Rsens
Figure 5. Proposed Line Regulation Feed Forward Improvement
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DN05042/D
RESULTS
26.00
25.75
25.50
Output Current (mA)
25.25
25.00
24.75
24.50
24.25
24.00
23.75
23.50
23.25
23.00
200
205
210
215
220
225
230
235
240
245
250
255
260
265
Line Voltage (Vac)
Figure 6. Output Current across Input Line Voltage without Line Feed Forward
90%
89%
88%
Efficiency (%)
87%
86%
85%
84%
83%
82%
81%
80%
200
205
210
215
220
225
230
235
240
245
250
255
260
Line Voltage (Vac)
Figure 7. Output Efficiency across Line (Vf = 156 Vdc Nominal)
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265
DN05042/D
4%
3%
Relative Current Error (%)
2%
1%
0%
−1%
−2%
−3%
−4%
200
205
210
215
220
225
230
235
240
245
250
255
260
265
Line Voltage (Vac)
Figure 8. Normalized Output Current across Input Line Voltage (Vf = 156 Vdc Nominal)
Table 4. EN61000−3−2
Fundamental
3rd Harm
5th Harm
Class C < 25 W
Ref
86%
61%
Measured
****
78.8%
49.1%
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