dsPIC30F to PIC24H Conversion Guidelines

dsPIC30F to PIC24H
dsPIC30F to PIC24H Conversion Guidelines
Author:
Run, Sleep and Idle currents are not yet characterized.
Run and Idle currents will be reduced on the PIC24H
devices versus the dsPIC30F devices.
Richard L. Fischer
Microchip Technology Inc.
GENERAL INFORMATION
This document provides an overview of considerations
for converting from dsPIC30F to PIC24H devices. If you
are undertaking this conversion, it is recommended
that you download data sheets and errata documents
on
these
devices
from
our
web
site,
www.microchip.com.
The PIC24H devices are 3.3 VDC operational devices.
If the dsPIC30F design was originally implanted at 3.3
VDC, this will greatly simplify the conversion to the
PIC24H family.
PIC24H and dsPIC30F 64-pin TQFP devices are pincompatible with the exception of one pin. The PIC24H
VDDCORE pin (pin 56) must be connected to circuit
ground via a 1µF capacitor. On dsPIC30F devices, this
same pin is a VSS pin and must be tied to ground.
The PIC24H devices do not feature the Low-VoltageDetect (LVD) as on the dsPIC30F devices. Conversion
can be simplified if the dsPIC30F LVD feature is not
implemented.
The PIC24H devices support a Brown-out Reset (BOR)
feature, but not an equivalent dsPIC30F BOR with
adjustable trip points.
Both families support the Programmable Power-up
Timer (POR). The port I/O sink/source current is 4mA
for the PIC24H devices versus 25mA for the dsPIC30F
devices.
TABLE 1:
The PIC24H devices have a programmable PLL,
whereas the dsPIC30F PLL features x4, x8 or x16
modes.
PIC24H does not support DSP instructions or associated operations and conditional instructions which
depend on accumulator status bits. The remaining
instruction set is 100% identical to the dsPIC30F product
family.
In general, Assembly and C language code developed
for the dsPIC30F devices are directly portable to
PIC24H devices using the associated device header
(.h), include (.inc) and linker (.gld) support files.
PIC24H devices support more interrupt sources, therefore the interrupt vector table length has increased.
User code starts at 0x200 versus 0x100 on the
dsPIC30F devices. Using the associated device linker
(.gld) support file makes this change transparent.
Some peripherals have new features therefore, additional bits have been added in respective SFRs. Some
SFR bits have moved or been renamed between the
dsPIC30F and PIC24H devices. If existing Assembly
and C language code utilizes the provided device support files, code conversion is straight forward.
Table 1 presents a summary of the key differences
between the dsPIC30F to PIC24H devices. Please
refer to the specific device data sheets for further information.
KEY DIFFERENCES BETWEEN dsPIC30F AND PIC24H DEVICES
Channels
Peripheral Module
Comments
dsPIC30F
PIC24H
Interrupt Controller
45
61
SFR bits are located in different SFRs. There are more interrupts
and associated SFRs on the PIC24H devices. Old SFR bit names
are retained for compatibility.
Timers 16-bit
5
9
No SFR bit name changes. Four new timers on the PIC24H
devices.
Input Capture
5
8
No SFR bit name changes. Three new channels on the PIC24H
devices.
Output Compare
5
8
No SFR bit name changes. Three new channels on the PIC24H
devices.
10-bit 1 Msps ADC
16
0
New module on the PIC24H devices.
12-bit 200 Ksps ADC
16
0
New module on the PIC24H devices.
© 2006 Microchip Technology Inc.
DS70173A-page 1
dsPIC30F to PIC24H
TABLE 1:
KEY DIFFERENCES BETWEEN dsPIC30F AND PIC24H DEVICES (CONTINUED)
Channels
Peripheral Module
10- to 12-bit ADC
Comments
dsPIC30F
PIC24H
0
32
10-bit 1.1 Msps
ADxCON1 SFR: No bit name changes.
New modes/SFR bits added: 10/12 ADC mode bit.
12-bit 500 Ksps
Added SFR bits to support 32 ADC channels.
UART
2
2
UxMODE SFR: No bit name changes. New modes/SFR bits
added. UxSTA SFR: No bit name changes. New mode/SFR bit
added. Features added on PIC24H devices: IrDA®, LIN support
and Interrupt-on-TSR empty.
I2C™
1
2
No SFR bit name changes. New SFR (I2CxMSK) and address
masking feature added.
SPI
2
2
SPIxSTAT SFR: No bit name changes. SPIxCON1 SFR: No bit
name changes. New bits added and some relocated to new
SFR SPIxCON2. FIFO and Frame modes added.
DCI (CODEC)
1
0
N/A
CAN
2
0
N/A
ECAN™ Technology
0
2
New module on PIC24H devices.
Motor Control PWM
8
0
N/A
QEI
1
0
N/A
Ports A-G
Ports A-G
0
8
Yes
Yes
2
3
New Doze mode added to existing Sleep and Idle modes.
—
Use new device support files (.h, .inc and .gld) for support.
I/O Ports
DMA
Clock Switching
Power Saving Mode
Device Configuration
PLL modes
—
x4, x8 and
x16 PLL
New feature added: Open Drain output on some ports.
8 channels assignable to several peripherals.
Additional clock modes/features on PIC24H devices. Oscillator
control SFRs are different.
Programmable See Section 8.1 of the PIC24H data sheet (DS7xxxx) for
PLL
system clock selection information.
Programming Pins
1 pair
3 pairs
Debugging Pins
4 pairs
3 pairs
There are now 3 PGC/EMUC and PGD/EMUD pairs of pins,
which can be used for both programming and debugging.
PERIPHERALS
The PIC24H peripheral set is enhanced versus the first
generation dsPIC30F product family. Several
peripherals have identical features with some
peripherals supporting additional features.
The ADC module on the PIC24H devices are slightly
different from the dsPIC30F ADC module. The basic
functionality is the same, however the PIC24H ADC
module is selectable between 10- and 12-bit operation,
supports higher conversion rates and features more
external ADC pins.
Additional status bits for determination of specific Math
Exception Traps are available on the PIC24H devices.
These bits are located in the INTCON1 SFR.
PIC24H digital I/O ports are 5V tolerant. New open
drain features are provided on some ports. Configured
as digital I/O pins, the PIC24H analog pins are 3.6V
tolerant. See the PIC24H data sheet (DS70175) for
further information.
The PIC24H supports 8 channels of DMA, which are
assignable to the following peripherals: UART, SPI,
ADC, Input Capture, Output Compare/Standard PWM
and ECAN™ technology.
DS70173A-page 2
© 2006 Microchip Technology Inc.
dsPIC30F to PIC24H
FLASH PROGRAM MEMORY
Like the dsPIC30F devices, the PIC24H devices
support Run-Time-Self-Programming (RTSP) . Table 2
lists some small RTSP differences between the two
families
SFR registers, NVMADR and NVMADRU, are not
available or utilized for programming/erasing
operations on PIC24H Flash program memory.
The PIC24H Program Flash Erase/Write endurance
specifications differ from dsPIC30F devices. Please
refer to the PIC24H data sheet (DS70175) for further
information.
All program/erase operations of the PIC24H devices
are self-timed like the dsPIC30F devices, therefore no
additional timer is required to terminate a program/
erase operation.
.
The PIC24H devices do not support data EEPROM.
Likewise, there is no vector location for the NVM
interrupt as there is on the dsPIC30F devices. The
interrupt vector location is reserved.
TABLE 2:
RTSP DIFFERENCES BETWEEN PIC24H AND dsPIC30F FAMILIES
Parameter
PIC24H
dsPIC30F
Smallest PM Erase Size
1 Page - 512 instructions/1536 bytes
1 Row - 32 instructions/96 bytes
Smallest PM Program Size
1 Row - 64 instructions/192 bytes
1 Row - 32 instructions/96 bytes
Basic PM Erase Code
Sequence
; Setup NVMCON for page erase
operation
MOV #0x4042, w0
MOV w0, NVMCON
; Setup NVMCON for row erase
operation
MOV #0x4041, w0
MOV w0, NVMCON
; Init pointer for Erase Op.
MOV #tblpage(PROG_ADDR), w0
MOV w0, TBLPAG
MOV #tbloffset(PROG_ADDR), w0
TBLWTL w0, [w0]
; Set base
address of erase block
; Disable interrupts, if enabled
; Init pointer for Erase Op.
MOV #tblpage(PROG_ADDR), w0
MOV w0, NVMADRU
MOV #tbloffset(PROG_ADDR), w0
MOV w0, NVMADR
; Write the KEY sequence
MOV #0x55, w0
MOV w0, NVMKEY
MOV #0xAA, w0
MOV w0, NVMKEY
Write the KEY sequence
MOV #0x55, w0
MOV w0, NVMKEY
MOV #0xAA, w0
MOV w0, NVMKEY
; Start the erase operation
BSET NVMCON, #WR
; Start the erase operation
BSET NVMCON, #WR
; Insert two NOPs (required)
NOP
NOP
Re-enable interrupts, if needed
; Insert two NOPs (required)
NOP
NOP
Re-enable interrupts, if needed
; Setup the address pointer to
program space
MOV #tblpage(PROG_ADDR), w0
; get table page value
MOV w0, TBLPAG ; load TBLPAG
register
MOV #tbloffset(PROG_ADDR), w0
; load address LS word
; Setup the address pointer to
program space
MOV #tblpage(PROG_ADDR), w0
; get table page value
MOV w0, TBLPAG ; load TBLPAG
register
MOV #tbloffset(PROG_ADDR), w0
; load address LS word
; Load write data into W registers
MOV #PROG_LOW_WORD, w2
MOV #PROG_HI_BYTE, w3
; Load write data into W registers
MOV #PROG_LOW_WORD, w2
MOV #PROG_HI_BYTE, w3
; Perform the table writes to load
the latch
TBLWTL w2, [w0]
TBLWTH w3, [w0++]
; Perform the table writes to load
the latch
TBLWTL w2, [w0]
TBLWTH w3, [w0++]
Basic PM Program Code
Sequence
(Example loading 1 write
latch only)
© 2006 Microchip Technology Inc.
; Disable interrupts, if enabled;
DS70173A-page 3
dsPIC30F to PIC24H
ELECTRICAL CHARACTERISTICS
Operating from 3.0 to 3.6 VDC and rated at 40 MIPS @
85ºC, the PIC24H product family is designed using
0.25 µm process technology. Therefore, the DC and AC
Electrical Specifications are different from the
dsPIC30F product family. Please refer to the PIC24H
data sheet (DS70175) for further information.
PACKAGE CONVERSION
CONSIDERATIONS
Table 3 presents a summary of the programming/
debugging pin differences between the dsPIC30F "A"
devices and the PIC24H devices.
Check the mechanical/package footprint of a 64-pin
TQFP dsPIC30F and PIC24H device. Layout PCB to
accommodate a common 10x10x1 mm package.
PIC24H is not currently offered in the 80-pin TQFP
package.
TABLE 3:
PROGRAMMING/DEBUGGING PIN DIFFERENCES
dsPIC30F
PIC24H
dsPIC30F
PIC24H
64-pin
64-pin
80-pin
80-pin
PGC/EMUC + PGD/EMUD
RB6 + RB7
—
RB1 + RB0
—
EMUC1/EMUD1
RC14 + RC13
—
RC14 + RC13
—
EMUC2/EMUD2
RD0 + RD1
—
RD0 + RD1
—
EMUC3/EMUD3
RF6 + RF3
—
RF6 + RF8
—
Programming/Debugging Pins
PGC1/EMUC1 + PGD1/EMUD1
—
RB6 + RB7
—
RB6 + RB7
PGC2/EMUC2 + PGD2/EMUD2
—
RC14 + RC13
—
RC14 + RC13
PGC3/EMUC3 + PGD3/EMUD3
—
RB1 + RB0
—
RB1 + RB0
Legend: PGC - Primary Programming Clock Pin;
PGD - Primary Programming Data Pin
EMUCx - Debugging Clock Pin (where x = 1, 2 or 3)
EMUDx - Debugging Data Pin (where x = 1, 2 or 3)
PROGRAMMING SUPPORT
No high voltage is required or provided by the MPLAB®
ICD 2 or MPLAB PM 3 tools when programming the
PIC24H devices. The ~12.5 VDC currently supplied by
MPLAB ICD 2 or MPLAB PM 3, when programming the
dsPIC30F devices, is not required for the PIC24H
devices.
Note:
Possible damage to the MCLR pin will be
sustained if more than 5.5 VDC is applied.
DS70173A-page 4
© 2006 Microchip Technology Inc.
dsPIC30F to PIC24H
DEVELOPMENT TOOLS AND
BOARDS
MPLAB IDE, MPLAB C30, MPLAB ICD 2, MPLAB PM3
and Real ICE™ In-Circuit Emulator tools support the
PIC24H product family of devices. See Table 4 below
for information on tool version support.
TABLE 4:
DEVELOPMENT TOOL SUPPORT FOR THE PIC24H FAMILY
Development Tools
MPLAB®
IDE
PIC24H
MPLAB IDE 7.40 or later
MPLAB C30
MPLAB C30 2.00
MPLAB ICD 2 Programmer/Debugger
MPLAB ICD2 1.40
MPLAB PM3 Device Programmer
MPLAB PM3 7.40
MPLAB ICE 4000
No
Real ICE™ In-Circuit Emulator
Yes
The dsPICDEM™ 80-pin Starter Development Board
(DM300019) and the Explorer 16 Development Board
(DM240001) support the PIC24H silicon.
APPENDIX A:
REVISION HISTORY
Plug-in modules (PIMs) are not currently available for
the PIC24H product family.
Original version of the document.
Revision A (01/2006)
APPLICATION LIBRARIES
Several advanced application libraries developed for
the dsPIC30F product family support the PIC24H
product family. These libraries are scheduled for testing
and release after the PIC24H devices are released to
production.
© 2006 Microchip Technology Inc.
DS70173A-page 5
dsPIC30F to PIC24H
DS70173A-page 6
© 2006 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
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Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
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•
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© 2006 Microchip Technology Inc.
DS70173A-page 7
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DS70173A-page 8
© 2006 Microchip Technology Inc.
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