DG408L, DG409L www.vishay.com Vishay Siliconix Precision 8-Ch / Dual 4-Ch Low Voltage Analog Multiplexers DESCRIPTION FEATURES The DG408L, DG409L are low voltage pin-for-pin compatible companion devices to the industry standard DG408, DG409 with improved performance. • Pin-for-pin compatibility with DG408, DG409 • 2.7 V to 12 V single supply or ± 3 V to ± 6 V dual Available supply operation • Lower on-resistance: RDS(on) - 17 typ. Available • Fast switching: tON - 38 ns, tOFF - 18 ns • Break-before-make guaranteed Available • Low leakage: IS(OFF) - 0.2 nA max. • Low charge injection: 1 pC • TTL, CMOS, LV logic (3 V) compatible • 82 dB off-isolation at 1 MHz • 2000 V ESD protection (HBM) • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 Using BiCMOS wafer fabrication technology allows the DG408L, DG409L to operate on single and dual supplies. Single supply voltage ranges from 3 V to 12 V while dual supply operation is recommended with ± 3 V to ± 6 V. The DG408L is an 8 channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3 bit binary address (A0, A1, A2). The DG409L is a dual 4 channel differential analog multiplexer designed to connect one of four differential inputs to a common dual output as determined by its 2 bit binary address (A0, A1). Break-before-make switching action to protect against momentary crosstalk between adjacent channels. The DG408L, DG409L provides lower on-resistance, faster switching time, lower leakage, less power consumption, and higher off-isolation than the DG408, DG409. Note * This datasheet provides information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details. BENEFITS • • • • High accuracy Single and dual power rail capacity Wide operating voltage range Simple logic interface APPLICATIONS • • • • • • • Data acquisition systems Battery operated equipment Portable test equipment Sample and hold circuits Communication systems SDSL, DSLAM Audio and video signal routing FUNCTIONAL BLOCK DIAGRAMS AND PIN CONFIGURATIONS DG408L Dual-In- Line, SOIC, and TSSOP A0 EN VS1 S2 S3 S4 D 16 1 2 Decoders/Drivers 15 3 14 4 13 5 12 6 11 7 10 8 9 Top View S16-0276-Rev. J, 22-Feb-16 DG409L Dual-In- Line, SOIC, and TSSOP A1 A0 A2 EN GND V- V+ S1a S5 S2a S6 S3a S7 S4a S8 Da 16 1 2 Decoders/Drivers 15 3 14 4 13 5 12 6 11 7 10 8 9 A1 GND V+ S1b S2b S3b S4b Db Top View Document Number: 71342 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408L, DG409L www.vishay.com Vishay Siliconix TRUTH TABLE (DG408L) TRUTH TABLE (DG409L) A2 A1 A0 EN ON SWITCH A1 A0 EN ON SWITCH X X X 0 None X X 0 None 0 0 0 1 1 0 0 1 1 0 0 1 1 2 0 1 1 2 0 1 0 1 3 1 0 1 3 0 1 1 1 4 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 Logic “0” = VAL 0.8 V Logic “1” = VAH 2.4 V X = do not care Note • For low and high voltage levels for VAX and VEN consult “Digital Control” parameters for specific V+ operation. ORDERING INFORMATION (DG408L) ORDERING INFORMATION (DG409L) TEMP. RANGE TEMP. RANGE PACKAGE 16-pin SOIC -40 °C to +85 °C 16-pin TSSOP PART NUMBER DG408LDY DG408LDY-E3 DG408LDY-T1 DG408LDY-T1-E3 PACKAGE 16-pin SOIC -40 °C to +85 °C DG408LDQ DG408LDQ-E3 DG408LDQ-T1 DG408LDQ-T1-E3 16-pin TSSOP PART NUMBER DG409LDY DG409LDY-E3 DG409LDY-T1 DG409LDY-T1-E3 DG409LDQ DG409LDQ-E3 DG409LDQ-T1 DG409LDQ-T1-E3 ABSOLUTE MAXIMUM RATINGS PARAMETER LIMIT Voltage Referenced V+ to V- e GND 7 Digital Inputs a, VS, VD 30 Peak Current, S or D (pulsed at 1 ms, 10 % duty cycle max.) 100 Power Dissipation (package) b V (V-) - 0.3 to (V) + 0.3 Current (any terminal) Storage Temperature UNIT 14 (A suffix) -65 to +150 (D suffix) -65 to +125 16-pin plastic TSSOP c 650 16-pin narrow SOIC c 600 16-pin CerDIP d 900 LCC-20 e 750 mA °C mW Notes a. Signals on SX, DX, AX, or EN exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads soldered or welded to PC board. c. Derate 7.6 mW/°C above 75 °C. d. Derate 12 mW/°C above 75 °C e. Derate 10 mW/°C above 75 °C S16-0276-Rev. J, 22-Feb-16 Document Number: 71342 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408L, DG409L www.vishay.com Vishay Siliconix SPECIFICATIONS (Single Supply 12 V) PARAMETER SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED V+ = 12 V, ± 10 %, V- = 0 V VEN = 0.8 V or 2.4 V f A SUFFIX D SUFFIX -55 °C to +125 °C -40 °C to +85 °C TEMP. b TYP. d UNIT MIN. c MAX. c MIN. c MAX. c Analog Switch Analog Signal Range e Drain-Source On-Resistance RDS(on) Matching Between Channels g On-Resistance Flatness i Switch Off Leakage Current a VANALOG RDS(on) RDS RFLAT(on) IS(off) ID(off) Channel On Leakage Current a ID(on) Full - 0 12 0 12 VD = 10.8 V, VD = 2 V or 9 V, IS = 10 mA, sequence each switch on Room 17 - 29 - 29 Full - - 38 - 35 VD = 10.8 V, VD = 2 V or 9 V, IS = 10 mA, Room 1 - 3 - 3 Room 3 - 7 VEN = 0 V, VD = 11 V or 1 V, VS = 1 V or 11 V VS = VD = 1 V or 11 V V 7 Room - -1 1 -1 1 Full - -15 15 -10 10 Room - -1 1 -1 1 Full - -15 15 -10 10 Room - -1 1 -1 1 Full - -15 15 -10 10 nA Digital Control Logic High Input Voltage VINH Full - 2.4 - 2.4 - Logic Low Input Voltage VINL Full - - 0.8 - 0.8 Input Current IIN VAX = VEN = 2.4 V or 0.8 V Full - -1.5 1.5 -1 1 30 - 60 - 60 tTRANS VS1 = 8 V, VS8 = 0 V, (DG408L) VS1b = 8 V, VS4b = 0 V, (DG409L) see figure 2 Room Transition Time Full - - 68 - 65 Break-Before-Make Time tOPEN VS(all) = VDA = 5 V, see figure 4 Room 11 1 - 1 - Full - - - - - Room 38 - 55 - 55 V μA Dynamic Characteristics Enable Turn-On Time Enable Turn-Off Time Charge Injection e tON(EN) tOFF(EN) Q Off Isolation e, h OIRR Crosstalk e XTALK VAX = 0 V, VS1 = 5 V (DG408L) VAX = 0 V, VS1b = 5 V (DG409L) see figure 3 CL = 1 nF, VGEN = 0 V, RGEN = 0 f = 100 kHz, RL = 1 k Full - - 60 - 60 Room 18 - 25 - 25 Full - - 30 - 30 Room 1 - 5 - 5 Room -70 - - - - Room -82 - - - - ns pC dB Source Off Capacitance e CS(off) f = 1 MHz, VS = 0 V, VEN = 0 V Room 7 - - - - Drain Off Capacitance e CD(off) f = 1 MHz, VD = 2.4 V, VEN = 0 V Room 20 - - - - Drain On Capacitance e CD(on) f = 1 MHz, VD = 0 V, VEN = 2.4 V (DG409L only) Room 31 - - - - - 3 12 3 12 V VEN = VA = 0 V or 5 V Room 0.2 - 0.7 - 0.7 μA pF Power Supplies Power Supply Range V+ Power Supply Current I+ Notes a. Leakage parameters are guaranteed by worst case test condition and not subject to production test. b. Room = 25 °C, Full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. RDS(on) = RDS(on) max. - RDS(on) min. h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin. i. RDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal. S16-0276-Rev. J, 22-Feb-16 Document Number: 71342 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408L, DG409L www.vishay.com Vishay Siliconix SPECIFICATIONS (Dual Supply V+ = 5 V, V - = -5 V) PARAMETER SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED V+ = 5 V, ± 10 %, V- = -5 V VEN = 0.6 V or 2.4 V f A SUFFIX D SUFFIX -55 °C to +125 °C -40 °C to +85 °C TEMP. b TYP. d UNIT MIN. c MAX. c MIN. c MAX. c Analog Switch Analog Signal Range e Drain-Source On-Resistance VANALOG RDS(on) Switch Off Leakage Current a IS(off) ID(off) Channel On Leakage Current a ID(on) VD = ± 3.5 V, IS = 10 mA, sequence each switch on V+ = 5.5, V- = 5.5 V VEN = 0 V, VD = ± 4.5 V, VS = ± 4.5 V V+ = 5.5 V, V- = -5.5 V, VEN = 2.4 V, VD = ± 4.5 V, VS = ± 4.5 V Full - -5 5 -5 5 V Room 20 - 40 - 40 Full - - 50 - 50 Room - -1 1 -1 1 Full - -15 15 -10 10 Room - -1 1 -1 1 Full - -15 15 -10 10 Room - -1 1 -1 1 Full - -15 15 -10 10 nA Digital Control Logic High Input Voltage VINH Full - 2.4 - 2.4 - Logic Low Input Voltage VINL Full - - 0.6 - 0.6 Input Current a IIN VAX = VEN = 2.4 V or 0.6 V Full - -1.5 1.5 -1 1 30 - 60 - 60 tTRANS VS1 = 3.5 V, VS8 = 0 V, (DG408L) VS1b = 3.5 V, VS4b = 0 V, (DG409L) see figure 2 Room Transition Time e Full - - 78 - 65 Break-Before-Make Time e tOPEN VS(all) = VDA = 3.5 V, see figure 4 Room 8 1 - 1 - Full - - - - - Room 25 - 55 - 55 Full - - 68 - 60 Room 20 - 40 - 40 Full - - 50 - 45 V μA Dynamic Characteristics Time e tON(EN) Enable Turn-Off Time e tOFF(EN) Enable Turn-On VAX = 0 V, VS1 = 3.5 V (DG408L) VAX = 0 V, VS1b = 3.5 V (DG409L) see figure 3 Source Off Capacitance e CS(off) f = 1 MHz, VS = 0 V, VEN = 0 V Room 6 - - - - Drain Off Capacitance e CD(off) f = 1 MHz, VD = 0 V, VEN = 0 V Room 15 - - - - Drain On Capacitance e CD(on) f = 1 MHz, VD = 0 V, VEN = 2.4 V Room 29 - - - - ns pF Notes a. Leakage parameters are guaranteed by worst case test condition and not subject to production test. b. Room = 25 °C, full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. RDS(on) = RDS(on) max. - RDS(on) min. h. Worst case isolation occurs on channel 4 do to proximity to the drain pin. i. RDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal. S16-0276-Rev. J, 22-Feb-16 Document Number: 71342 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408L, DG409L www.vishay.com Vishay Siliconix SPECIFICATIONS (Single Supply 5 V) PARAMETER SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED V+ = 5 V, ± 10 %, V- = 0 V VEN = 0.6 V or 2.4 V f A SUFFIX D SUFFIX -55 °C to +125 °C -40 °C to +85 °C TEMP. b TYP. d UNIT MIN. c MAX. c MIN. c MAX. c Analog Switch Analog Signal Range e Drain-Source On-Resistance VANALOG RDS(on) RDS(on) Matching Between Channels g RDS On-Resistance Flatness i RFLAT(on) Switch Off Leakage Current a IS(off) ID(off) Channel On Leakage Current a ID(on) Full - 0 5 0 5 V+ = 4.5 V, VD or VS = 1 V or 3.5 V, IS = 5 mA Room 35 - 49 - 40 Full - - 62 - 62 V+ = 4.5 V, VD = 1 V or 3.5 V, IS = 5 mA Room 1.5 - 3 - 3 V+ = 5.5 V, VS = 1 V or 4 V, VD = 4 V or 1 V V+ = 5.5 V, VD = VS = 1 V or 4 V, sequence each switch on Room - - 4 - 4 Room - -1 1 -1 1 10 Full - -15 15 -10 Room - -1 1 -1 1 Full - -15 15 -10 10 Room - -1 1 -1 1 Full - -15 15 -10 10 V nA Digital Control Logic High Input Voltage VINH Logic Low Input Voltage VINL Input Current a V+ = 5 V Full - 2.4 - 2.4 - Full - - 0.6 - 0.6 IIN VAX = VEN = 2.4 V or 0.6 V Full - -1.5 1.5 -1 1 VS1 = 3.5 V, VS8 = 0 V, (DG408L) VS1b = 3.5 V, VS4b = 0 V, (DG409L) see figure 2 Room 44 - 125 - 125 tTRANS Full - - 138 - 135 VS(all) = VDA = 3.5 V, see figure 4 Room 17 1 - 1 - V μA Dynamic Characteristics Transition Time e Break-Before-Make Time e Enable Turn-On Time e Enable Turn-Off Time e Charge Injection e tOPEN tON(EN) tOFF(EN) Q Off Isolation e, h OIRR Crosstalk e XTALK VAX = 0 V, VS1 = 3.5 V (DG408L) VAX = 0 V, VS1b = 3.5 V (DG409L) see figure 3 CL = 1 nF, RGEN = 0 , VGEN = 0 V f = 100 kHz, RL = 1 k Full - - - - - Room 43 - 60 - 60 Full - - 70 - 65 Room 26 - 45 - 45 Full - - 60 - 50 Room -1 - - - - Room -70 - - - - Room -80 - - - - Source Off Capacitance e CS(off) f = 1 MHz, VS = 0 V, VEN = 0 V Room 8 - - - - Drain Off Capacitance e CD(off) f = 1 MHz, VD = 0 V, VEN = 0 V Room 21 - - - - Drain On Capacitance e CD(on) f = 1 MHz, VD = 0 V, VEN = 2.4 V Room 32 - - - - ns pC dB pF Notes a. Leakage parameters are guaranteed by worst case test condition and not subject to production test. b. Room = 25 °C, full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. RDS(on) = RDS(on) max. - RDS(on) min. h. Worst case isolation occurs on channel 4 do to proximity to the drain pin. i. RDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal. S16-0276-Rev. J, 22-Feb-16 Document Number: 71342 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408L, DG409L www.vishay.com Vishay Siliconix SPECIFICATIONS (Single Supply 3 V) PARAMETER SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED V+ = 3 V, ± 10 %, V- = 0 V VEN = 0.4 V or 2 V f A SUFFIX D SUFFIX -55 °C to +125 °C -40 °C to +85 °C TEMP. b TYP. d UNIT MIN. c MAX. c MIN. c MAX. c Analog Switch Analog Signal Range e VANALOG Drain-Source On-Resistance RDS(on) IS(off) Switch Off Leakage Current a ID(off) Channel On Leakage Current a ID(on) V+ = 2.7 V, VD = 0.5 or 2.2 V, IS = 5 mA V+ = 3.3 V, VS = 2 or 1 V, VD = 1 or 2 V V+ = 3.3 V, VD = VS = 1 V or 2 V, sequence each switch on Full - 0 3 0 3 V Room 60 - 80 - 80 Full - - 105 - 100 Room - -1 1 -1 1 Full - -15 15 -10 10 Room - -1 1 -1 1 Full - -15 15 -10 10 Room - -1 1 -1 1 Full - -15 15 -10 10 nA Digital Control Logic High Input Voltage VINH Full - 2 - 2 - Logic Low Input Voltage VINL Full - - 0.4 - 0.4 Input Current a IIN VAX = VEN = 2.4 V or 0.4 V Full - -1.5 1.5 -1 1 75 - 150 - 150 tTRANS VS1 = 1.5 V, VS8 = 0 V, (DG408L) VS1b = 1.5 V, VS4b = 0 V, (DG409L) see figure 2 Room Transition Time Full - - 175 - 175 Break-Before-Make Time tOPEN VS(all) = VDA = 1.5 V, see figure 4 Room 32 1 - 1 - Full - - - - - Room 70 - 95 - 95 V μA Dynamic Characteristics Enable Turn-On Time tON(EN) Enable Turn-Off Time Charge tOFF(EN) Injectione Q Off Isolation e, h OIRR Crosstalk e XTALK Source Off Capacitance e VAX = 0 V, VS1 = 1.5 V (DG408L) VAX = 0 V, VS1b = 1.5 V (DG409L) see figure 3 CL = 1 nF, RGEN = 0 , VGEN = 1.5 V f = 100 kHz, RL = 50 Full - - 115 - 105 Room 55 - 100 - 100 Full - - 115 - 105 Room 0.4 - - - - Room -70 - - - - Room -79 - - - - CS(off) f = 1 MHz, VS = 0 V, VEN = 0 V Room 8 - - - - Drain Off Capacitance e CD(off) f = 1 MHz, VD = 0 V, VEN = 0 V Room 19 - - - - Drain On Capacitance e CD(on) f = 1 MHz, VD = 0 V, VEN = 2 V (DG409L only) Room 33 - - - - ns pC dB pF Notes a. Leakage parameters are guaranteed by worst case test condition and not subject to production test. b. Room = 25 °C, full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. RDS(on) = RDS(on) max. - RDS(on) min. h. Worst case isolation occurs on channel 4 do to proximity to the drain pin. i. RDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S16-0276-Rev. J, 22-Feb-16 Document Number: 71342 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408L, DG409L www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 25 R DS(on) - Drain-Source On-Resistance ( ) R DS(on) - Drain-Source On-Resistance ( ) 80 70 60 V+ = 2.7 V 50 40 V+ = 4.5 V 30 V+ = 12 V 20 10 0 2 4 6 8 10 15 10 5 12 -5 -3 -1 1 3 5 VD - Drain Voltage (V) VD - Drain Voltage (V) RDS(on) vs. VD and Power Supply RDS(on) vs. VD and Power Supply 50 R DS(on) - Drain-Source On-Resistance ( ) 1.8 Upper Threshold Limit 1.6 1.4 1.2 VT (V) V+ = 5 V V- = - 5 V 0 0 Low Threshold Limit 1.0 0.8 0.6 0.4 0.2 85 °C 125 °C 40 30 25 °C - 55 °C 20 10 0 0.0 0 2 4 6 8 10 12 0 14 1 2 3 4 5 V+ - Positive Supply Voltage (V) VD - Drain Voltage (V) Input Threshold vs. V+ Supply Voltage RDS(on) vs. VD and Temperature 35 70 30 60 25 85 °C 125 °C Switching Speed (nS) R DS(on) - Drain-Source On-Resistance ( ) 20 20 25 °C 15 - 55 °C 10 6 50 40 tTRANS 30 tON 20 tOFF 10 5 0 0 -6 -4 -2 0 2 4 RDS(on) vs. VD and Temperature S16-0276-Rev. J, 22-Feb-16 6 0 2 4 6 8 10 12 14 Switching Time vs. Positive Supply Voltage Document Number: 71342 7 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408L, DG409L www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 10 40 35 IS(off) 30 Switching Speed (nS) Leakage Current (pA) 0 - 10 ID(off) ID(on) - 20 tON 25 tTRANS 20 tOFF 15 10 - 30 5 - 40 -5 -3 -1 1 3 0 5 VD, V S - Analog Voltage (V) 3 4 5 ± - Dual Power Supply Voltage (V) Leakage Current vs. Analog Voltage Switching Time vs. Dual Power Supply Voltage 1.0 6 10 CL = 1000 pF - 10 V+ = 12 V V- = 0 V - 30 Loss (dB) Q - Charge Injection (pC) 0.8 0.6 - 50 Insertion Loss - 3 dB = 280 MHz Off Isolation 0.4 V+ = 5 V V- = - 5 V - 70 V+ = 5 V V- = 0 V 0.2 Crosstalk - 90 0.0 -5 0 5 VS - Source Voltage (V) - 110 0.1 10 Charge Injection vs. Analog Voltage 10 Frequency (MHz) 1 100 1000 Insertion Loss, Off Isolation, and Crosstalk vs. Frequency (Single Supply) 35 35 CD, CS - Drain/Source Capacitance (pF) CD, CS - Drain/Source Capacitance (pF) V+ = 3 V V- = 0 V RL = 50 CD(on) 30 V+ = 12 V V- = 0 V 25 20 CD(off) 15 10 CS(off) 5 0 0 2 4 6 8 10 12 Drain/Source Capacitance vs. Analog Voltage S16-0276-Rev. J, 22-Feb-16 CD(on) 30 25 V+ = 5 V V- = - 5 V 20 CD(off) 15 10 CS(off) 5 0 -5 -4 -3 -2 -1 0 1 2 3 4 5 Charge Injection vs. Analog Voltage Document Number: 71342 8 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408L, DG409L www.vishay.com Vishay Siliconix SCHEMATIC DIAGRAM (Typical Channel) V+ GND D A0 V+ VLevel Shift AX Decode/ Drive S1 V+ EN Sn V- Fig. 1 TEST CIRCUITS V+ V+ A2 S1 A1 50 A0 3V EN VS1 S2 - S7 DG408L S8 VS8 VO D GND V35 pF 300 Logic Input VAX tr < 20 ns tf < 20 ns 3V 50 % 0V VVS8 VO A1 A0 50 90 % VS1 S1a - S4a, Da V+ S4b tTRANS VSB4 VO Db EN GND 50 % VS1 S1b DG409L 3V 90 % Switch Output V+ V300 35 pF S1 ON tTRANS S8 ON (DG408L) or S4 ON (DG409L) V- Fig. 2 - Transition Time S16-0276-Rev. J, 22-Feb-16 Document Number: 71342 9 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408L, DG409L www.vishay.com Vishay Siliconix TEST CIRCUITS V+ V+ VS1 S1 EN S2 - S8 A0 DG408L A1 A2 GND VO D V- 50 Logic Input 50 % 0V 35 pF 300 tr < 20 ns tf < 20 ns 3V tON(EN) V- tOFF(EN) 0V 10 % V+ Switch Output VO V+ 90 % VS1 S1b VO EN S1a - S4a, Da S2b - S4b A0 DG409L A1 Db GND VO V- 50 35 pF 300 V- Fig. 3 - Enable Switching Time bbm.5 3V EN V+ 4/9 VS1 All S and Da A0 Logic Input tr < 20 ns tf < 20 ns 3V 50 % 0V DG408L DG409L A1 A2 Db, D GND 50 Ω VO VS V- V- 300 Ω 80 % Switch Output 35 pF VO 0V tOPEN Fig. 4 - Break-Before-Make Interval S16-0276-Rev. J, 22-Feb-16 Document Number: 71342 10 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG408L, DG409L www.vishay.com Vishay Siliconix TEST CIRCUITS V+ Rg V+ SX Logic Input EN Vg OFF ON OFF 0V A0 Channel Select 3V VO D A1 CL 1 nF A2 GND V- VO Switch Output VO is the measured voltage due to charge transfer error Q, when the channel turns off. V- Q = CL x VO Fig. 5 - Charge Injection V+ V+ VIN VIN V+ SX VS SX VS Rg = 50 S8 A0 D A2 GND RL 50 V- EN S8 VO A1 V+ S1 A0 Rg = 50 D VO A1 A2 EN GND RL 50 V- VV- VOUT Off Isolation = 20 log Crosstalk = 20 log VIN VOUT VIN Fig. 6 - Off Isolation Fig. 7 - Crosstalk V+ V+ VS V+ S1 V+ Rg = 50 A0 D VO A1 A2 GND EN V- S1 Meter A2 Channel Select A0 RL 50 D GND VInsertion Loss = 20 log S8 A1 VOUT EN V- HP4192A Impedance Analyzer or Equivalent f = 1 MHz V- VIN Fig. 8 - Insertion Loss Fig. 9 - Source Drain Capacitance Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?71342. S16-0276-Rev. J, 22-Feb-16 Document Number: 71342 11 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix SOIC (NARROW): 16ĆLEAD JEDEC Part Number: MS-012 MILLIMETERS 16 15 14 13 12 11 10 Dim A A1 B C D E e H L Ĭ 9 E 1 2 3 4 5 6 7 8 INCHES Min Max Min Max 1.35 1.75 0.053 0.069 0.10 0.20 0.004 0.008 0.38 0.51 0.015 0.020 0.18 0.23 0.007 0.009 9.80 10.00 0.385 0.393 3.80 4.00 0.149 0.157 1.27 BSC 0.050 BSC 5.80 6.20 0.228 0.244 0.50 0.93 0.020 0.037 0_ 8_ 0_ 8_ ECN: S-03946—Rev. F, 09-Jul-01 DWG: 5300 H D C All Leads e Document Number: 71194 02-Jul-01 B A1 L Ĭ 0.101 mm 0.004 IN www.vishay.com 1 Package Information Vishay Siliconix TSSOP: 16-LEAD DIMENSIONS IN MILLIMETERS Symbols Min Nom Max A - 1.10 1.20 A1 0.05 0.10 0.15 A2 - 1.00 1.05 0.38 B 0.22 0.28 C - 0.127 - D 4.90 5.00 5.10 E 6.10 6.40 6.70 E1 4.30 4.40 4.50 e - 0.65 - L 0.50 0.60 0.70 L1 0.90 1.00 1.10 y - - 0.10 θ1 0° 3° 6° ECN: S-61920-Rev. D, 23-Oct-06 DWG: 5624 Document Number: 74417 23-Oct-06 www.vishay.com 1 PAD Pattern www.vishay.com Vishay Siliconix RECOMMENDED MINIMUM PAD FOR TSSOP-16 0.193 (4.90) 0.171 0.014 0.026 0.012 (0.35) (0.65) (0.30) (4.35) (7.15) 0.281 0.055 (1.40) Recommended Minimum Pads Dimensions in inches (mm) Revision: 02-Sep-11 1 Document Number: 63550 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SO-16 RECOMMENDED MINIMUM PADS FOR SO-16 0.372 (9.449) 0.152 0.022 0.050 0.028 (0.559) (1.270) (0.711) (3.861) 0.246 (6.248) 0.047 (1.194) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.com 24 Document Number: 72608 Revision: 21-Jan-08 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Material Category Policy Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000