Smart FET Robustness Testing

Smart FET Robustness Testing
1
Agenda
• Repetitive Clamp Testing
• Repetitive Short Circuit Testing
• Cold Bulb Testing
• DV/Dt Testing
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Repetitive Clamping Test (RCL)
• The purpose of this test is to determine the repetitive
inductive avalanche switching capability of power devices.
• The RCL test is an endurance test which verifies the
effectiveness of the load flyback protection over the device
lifetime
• This test establishes the load current versus inductance
curve for the device
• Test is based on JESD24-8 Standard
Insert representative
power curve here as
an example
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Repetitive Clamping Test
• Energy delivered must drive the device to a peak
temperature of TJmax during test
• Device must be avalanched and survive the customer
required number of avalanche events (Typically 1-2 million
cycles)
On
Input
Off
Voltage
Across
DUT
V(Br)
VDD
IAR
Current
Through
DUT
tav
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Repetitive Clamping Test
• A Gate to Drain Zener Clamp provides inductive flyback
protection
• Current through the clamp allows the device to turn on
• Energy is dissipated through the channel as opposed to
breaking down the body diode
5
Repetitive Clamping Test
• Current is ramped up in the inductor and goes to ground
through a resistor
• Once the current reaches the required level, the switch is
opened
• The DUT then goes into avalanche as the inductor flies back
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Repetitive Clamping Test
• Measurements are taken periodically to insure that the repetitive
clamping stress has not affected the parametric performance of
the device.
54
RDSon (mOhm)
53
52
51
50
49
48
47
0
256k
1024k
2048k
Readout
NCV8403 RCL Drift Analysis
VS=16V, 15A, 100µH, 145C Ta
48
VClamp (100µA) [V]
47.5
47
46.5
46
45.5
45
44.5
0
256k
1024k
Readout
7
2048k
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
1.10
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
NCV8403 RCL Drift Analysis
VS=16V, 15A, 100µH, 145C Ta
0.3
0.25
0.2
Ileak(28V) (µA)
55
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
1.10
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
0.15
0.1
0.05
0
0
256k
1024k
2048k
Readout
NCV8403 RCL Drift Analysis
VS=16V, 15A, 100µH, 145C Ta
1.655
1.65
1.645
1.64
Vth (1mA) [V]
NCV8403 RCL Drift Analysis
VS=16V, 15A, 100µH, 145C Ta
1.635
1.63
1.625
1.62
1.615
1.61
1.605
0
256k
1024k
Readout
2048k
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
1.10
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
1.10
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
Repetitive Short Circuit Testing (RSC)
• The purpose of this test is to determine the reliability of
protected drivers when operating in a continuous short circuit
condition
• The results of this test predict the survivability of a device
under short circuit conditions (e.g. Weibull Plot)
• RSC testing is detailed in AEC Q100-12 Specification
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Repetitive Short Circuit Testing
• The AEC Q100-12 specification describes tests for autorestart and latched devices
• Our current product portfolio falls into the auto-restart
category
• The specification describes 2 main test types
– Long Pulse (-40 C & 25 C)
– Continuous (Hot RSC)
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Repetitive Short Circuit Testing
• Long Pulse Testing
–
–
–
–
Test is run at -40 C and 25 C
Device under test is place into a short circuit for 300 ms
Device must cool down to ambient between test pulses
Pulses continue until one of 2 conditions are met
• 50% of the population has failed (parametric, or gross failure)
• 100,000 cycles are met with 0 failures
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Repetitive Short Circuit Testing
• Continuous (Hot) Repetitive Testing
–
–
–
–
Test is run at 25 C ambient
Device under test is placed into a continuous short circuit
Device toggles in and out of Thermal Shutdown
Pulses continue until one of 2 conditions are met
• 50% of the population has failed (parametric, or gross failure)
• 100 hours have elapsed with 0 failures
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Repetitive Short Circuit Testing
• Test Schematics and Load Conditions
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Repetitive Short Circuit Testing
• Long Pulse Example Waveforms
-40 C
13
25 C
Repetitive Short Circuit Testing
• Long Pulse Weibull Plot
– Shows ppm levels for given number of short circuit cycles
Weibull Plot - NCV8403 LSC (-40C, 25C)
-40C
25C
Power (-40C)
Power (25C)
100.0000
1 ppm fail rate
Cumulative Failures (%)
10.0000
1.0000
0.1000
First room failure at
48 k cycles
0.0100
First cold failure at
14 k cycles
0.0010
0.0001
1
10
100
1000
Cycles to Failure
14
10000
100000
1000000
Cold Bulb Testing (CBT)
• This test is used to determine the bulb inrush current
survivability
• Example test sequence
– Step 1: Preconditioning 30 sec. Continuous (Hot) RSC
– Step 2: Preconditioning Repetitive Short Circuit- Long Pulse
• 100 cycles, 25 C
– Step 3: Cold Bulb Test
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Cold Bulb Testing
• Cold Bulb Test
–
–
–
–
–
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Bulb Load in -40 C chamber
V(supply) = 15 V
DUT held at room temperature
DUT turned on 100,000 times with load connected
DUT on until bulb current stabilizes (200 ms), off until bulb returns to
-40 C
Cold Bulb Testing
• Test Schematic
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Cold Bulb Testing
• Step 1: Preconditioning 30 sec. Continuous (Hot) RSC Test
Example Waveform
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Cold Bulb Testing
• Step 2: Preconditioning Repetitive Short Circuit- Long Pulse
Example Waveform
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Cold Bulb Testing
• Step 3: Cold Bulb Test Example Waveform
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Cold Bulb Testing
•
Step 3: Cold Bulb Test Results
– Parametrics periodically monitored to ensure the devices are within spec
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DV/Dt Testing
•DV/Dt testing is done to verify the devices ability to survive
fast transients
•Fast transients have been shown to cause damage in
Protected FET’s
Over-stressed
Transistor
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DV/Dt Testing
•Test setup that produces fast voltage transients and has been
used to induce damage on the bench.
Fast Voltage
transient
on Drain
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DV/Dt Testing
•Test Schematic
•Z-Test- Used to verify the robustness of our new designs
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DV/Dt Testing
•Test Results- Z Test
•Redesigned NCV portfolio withstood 50 fast transient
pulses with zero device failures
Z-Test Survival Rate (50 pulses)
120
100
80
Survival Rate (%)
60
Sample Size
40
20
0
NID5001
25
NIF5002
NIF5003
New 5003
(NCV8403)
DV/Dt Testing
•Test Schematic
•IEC Pulse Tester Used to characterize Robustness of new
designs
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DV/Dt Testing
•Test Results- IEC Pulse Tester
•Redesigned NCV portfolio withstood 30 kV transients with up to 40 V on the Drain
•Old NIF/NID portfolio failed with <30 kV transients
Experiment with Self-Protected FET -- IEC Pulse on Biased Drain (Vgs = 0 V)
100,000
IEC Pulse Voltage (V) at Last Pass
30 kV Max
10,000
NIF5002
NIF62514 Fix
NIF62514 No Fix
1,000
NCV8403
NIF5003
NID5001NT4
NCV8401
100
10
5
15
25
Vds Bias Voltage (V)
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35
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Conclusions
• ON Semiconductor NCV Smart FET devices are
characterized with the following tests:
– Repetitive Clamp Testing
• Determines the repetitive inductive avalanche switching capability of
power devices.
– Repetitive Short Circuit Testing
• Determines the reliability of protected drivers when operating in a
continuous short circuit condition
– Cold Bulb Testing
• Determines the bulb inrush current survivability
– DV/Dt Testing
• Verifies the devices ability to survive fast transients
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For More Information
•
View the extensive portfolio of power management products from ON
Semiconductor at www.onsemi.com
•
View reference designs, design notes, and other material supporting
automotive applications at www.onsemi.com/automotive
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