DG2592 Datasheet

DG2592
www.vishay.com
Vishay Siliconix
Audio Jack Detector with Send / End Detect
DESCRIPTION
FEATURES
The DG2592 is an audio jack detector and pop noise control
switch IC. It integrates the circuits necessary to detect the
presence of a stereo headset with a microphone and send /
end control button.
• Wide operating voltage range: 1.6 V to 5.5 V
• Low quiescent current of 10 μA, max. at
VDD = 1.8 V
• Integrated sense comparator for audio L of
1.4 V ± 5 % threshold
When there is no ear phone detected, the DG2592 connects
the microphone bias line to ground through the MIC pin. The
DG2592 also gives a logic high signal to the baseband
controller through the DET pin.
• 1.2 /max. MIC bias switch provides quick discharge and
clamping
• ESD Protected
- Human body model > 8 kV
- Charged device model > 2 kV
- IEC 61000-4-2 air discharge > 15 kV
- IEC 61000-4-2 contact discharge > 8 kV
The DG2592 senses the DC levels at both L_Detect and
GND_Detect. When an ear phone is plugged in, the voltage
at both pins will go low. The DG2592 will indicate the
presence of the ear phone by pulling DET low and the MIC
switch will turn off.
• Ultra thin and compact miniQFN10 and UTDFN10
The DG2592 is available in small miniQFN10 of
1.4 mm x 1.8 mm x 0.55 mm and ultra thin UTMQFN10 of
0.35 mm thickness.
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
APPLICATIONS
•
•
•
•
Cellular phones
Tablet devices
Portable media players
Digital cameras
VDD2
GPIO
GPIO
R4
Base Band
Processor
R3
S/E_detect
8
DG2592DN
S/E_REF
VDD2 S/E
9
10
7
+
MIC
VDD
3
2
1.6 MΩ
L_DET
4
GND_DET
5
1 MΩ
1.6 MΩ
+
-
6
DET
3.6 MΩ
Base Band
Audio Codec
MIC Line Bias
R2
GND
1
R1
MIC
GND_DET
L _DET
L
R
GND
MIC
Audio
Output
L
R
Fig. 1 - Typical Application Circuit
S15-2797-Rev. D, 30-Nov-15
Document Number: 62970
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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DG2592
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Vishay Siliconix
PACKAGE OUTLINE
VDD2
S/E_REF
8
MIC
9
10
GND
S/E_DET
1
2
4
L_DET
S/E
6
DET
5
3
VDD
7
GND_DET
Fig. 2 - Device Pin Out miniQFN10 Top View, Pin 1 Dot Marking is on Top of the Device
PIN DESCRIPTION
PIN#
1
NAME
GND
TYPE
Power
Ground
FUNCTION
2
MIC
Output
Microphone bias switch input
3
VDD
Power
Power supply for ear jack plug in detection circuit. A bypass capacitor of
0.1 μF is recommended as close as possible to this pin
4
L_DET
Input
Connected to L_DET pin at audio jack
5
GND_DET
Input
Connect to GND_DET pin at audio jack
6
DET
Output
Detect logic output connected to baseband controller
7
S/E
Output
S/E detect comparator output
8
S/E_DET
Input
Non-inverting input of S/E press detection comparator
9
S/E_REF
Input
Inverting input of S/E press detection comparator. External voltage is
provided as press detection reference threshold
10
VDD2
Power
Power supply pin for the S/E detection circuit. A bypass capacitor of 0.1 μF
is recommended as close as possible to this pin
ORDERING INFORMATION
FUNCTION
TEMPERATURE
RANGE
Audio jack detector
with S/E detect
-40 °C to 85 °C
PART NUMBER
DG2592DN-T1-GE4
DG2592DN1-T1-GE4
PACKAGE
SIZE
REEL
QUANTITY
miniQFN-10
1.4 mm x 1.8 mm x 0.55 mm
3000
UTMQFN-10
1.4 mm x 1.8 mm x 0.35 mm
3000
DEVICE MARKING
PIN 1
7 = DG2592 Marking Code, W = Date / Lot Traceability Code
S15-2797-Rev. D, 30-Nov-15
Document Number: 62970
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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DG2592
www.vishay.com
Vishay Siliconix
S/E_detect
8
S/E_REF VDD2
10
9
S/E
7
+
DG2592DN
VDD 3
2 MIC
1.6 MΩ
1.6 MΩ
L_detect 4
GND_detect 5
1.0 MΩ
+
-
6 DET
3.6 MΩ
1 GND
Fig. 3 - Functional Block Diagram
TRUTH TABLE
INPUTS
OUTPUTS
AUDIO JACK
L_DET
0
GND_DET
0
DET
Low
MIC
High
1
0
High
Low
Not detected
0
1
High
Low
Not detected
1
1
High
Low
Not detected
Detected
ABSOLUTE MAXIMUM RATINGS
PINS OR PARAMETERS
VDD, VDD2
L_Detect, GND_Detect, DET
S/E_DET, S/E_REF, S/E
MIC
Storage Temperature
MSL
IMIC
IMICPEAK
Latch Up Current
CONDITIONS
Reference to GND
Reference to GND
Reference to GND
Moisture sensitivity level (JEDEC® J-STD-020)
Switch DC current
Switch peak current (pulsed at 1 ms, < 10 % duty cycle)
JESD78
Human body model; ANSI / ESDA / JEDEC JS-001
Charged device model; JESD22-C101
ESD
Machine model; JESD22-A115
Contact
IEC61000-2-4, level 4
L_DET, GND_DET, MIC and GND pins
Air
RECOMMENDED OPERATING CONDITION
VDD, VDD2
Ear Jack Detection Input Pins
S/E Press Detection Input Pins
MIC Bias Voltage
Operating Junction Temperature
LIMITS
-0.3 to 6
-0.3 V to VDD
-0.3 V to VDD2
-0.3 to 6
-65 to +150
1
200
500
± 600
> 8000
> 2000
> 400
> 8000
> 15 000
UNIT
1.6 to 5.5
0 to VDD
0 to VDD2
0 to 5.5
-40 to +125
V
V
V
V
°C
V
°C
Level
mA
V
Note
• The control logic pins should not float and should be set to either high or low logic levels.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S15-2797-Rev. D, 30-Nov-15
Document Number: 62970
3
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG2592
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Vishay Siliconix
ELECTRICAL CHARACTERISTICS
TEST CONDITION
LIMITS
SYMBOL
UNLESS OTHERWISE SPECIFIED,
VDD = 1.8 V, VDD2 = 2.1 V, TA = -40 °C to 85 °C,
TYPICAL VALUES are at 25 °C
MIN.
TYP.
MAX.
Quiescent Current
IQ
L_Detect, GND_Detect are open
-
6
10
Ear Jack In Current
IDD
L_Detect, GND_Detect are connected with 10 k to GND
-
3
6
PARAMETER
S/E Detection Current
IDD2
S/E_DET =0 V, S/E_REF = 1.05 V
-
2
3.5
VTH_L
L_DET switching low to high
1.33
1.4
1.5
Propagation Delay to DET
tPLH
COUT = 15 pF, GND_DET = 0 V,
L_DET = 1.52 V to DET = 0.9 V
80
149
300
Propagation Delay to DET
tPHL
COUT = 15 pF, GND_DET = 0 V,
L_DET = 1.31 V to DET = 0.9 V
130
325
550
L_Detect Reference Voltage
UNIT
μA
V
ns
Low Voltage L_DET Leakage
ILL_DET
L_DET = 0 V
-
0.84
2
μA
High Voltage L_DET Leakage
IHL_DET
L_DET = 1.8 V
-
30
-
pA
L_DET Input Capacitance
CL_DET
-
4
-
pF
GND_Detect Logic Low
Voltage
VIL_GND
0.63
0.86
-
GND_Detect Logic High
Voltage
VIH_GND
-
0.89
1.17
GND_DET Propagation
Delay to DET
tPGND_DET
COUT = 15 pF, RL = 1 M, L_DET = 0 V,
GND_DET switches between 0 V and 1.8 V
-
10
-
ns
Low Voltage GND_DET
Leakage
IIL
GND_DET = 0 V
-
0.93
2
μA
High Voltage GND_DET
Leakage
IIH
GND_DET = 1.8 V
-
80
-
pA
GND_DET Input Capacitance
MIC Pull Down Resistance
V
CG_DET
f = 1 MHz
-
3.5
-
pF
RMIC
IMIC = 1 mA L_Detect, GND_Detect = open
-
-
1.25

VMIC = 2.4 V
-1
-
1
μA
MIC Leakage
DET Pull Up Resistance
ROUTH
L_Detect, GND_Detect = open
-
135
200
DET Pull Down Resistance
ROUTL
L_Detect, GND_Detect are connected with 10 k to GND
-
120
200
DET High Logic Voltage
VOUTH
IDET = 0.1 mA, L_Detect, GND_Detect = open
1.6
-
-
DET Low Logic Voltage
VOUTL
IDET = 0.1 mA, L_Detect, GND_Detect are connected with
10 k to GND
-
-
0.3
DET Rise Time
tDET_R
COUT = 15 pF, RL = 1 M, DET = 10 % to 90 %
-
14
-
DET Fall Time
tDET_F
COUT = 15 pF, RL = 1 M, DET = 90 % to 10 %
-
4.4
-
tPS/E
COUT = 15 pF, RL = 1 M, VCM = mid-supply,
100 mV overdrive
50
170
500
Input Leakage
ISE_IN
VCM = 0.9 V
-
4
-
pA
Input Capacitance
CSE_IN
f = 1 MHz
-
3.5
-
pF
Propagation Delay to S/E
Voltage Output Low
VOL
IOL = 0.1 mA
-
-
0.2
Voltage Output High
VOH
IOH = 0.1 mA
1.9
-
-
Rise Time
tS/E_R
COUT = 15 pF, RL = 1 M, S/E = 10 % to 90 %
-
16
-
Fall Time
tS/E_F
COUT = 15 pF, RL = 1 M, S/E = 90 % to 10 %
-
12.1
-
S15-2797-Rev. D, 30-Nov-15

V
ns
V
ns
Document Number: 62970
4
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DG2592
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TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
3.4
55
TA = +25°C
VDD = 1.8 V
IDD - Ear Jack In Current (μA)
50
IQ - Quiescent Current (μA)
45
40
35
30
25
20
15
3.3
3.2
3.1
3
10
5
0
1.0
2.9
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-40
5.5
20
100
TA = +25 °C
IDD2 - S/E Detection Current (μA)
12
5.5
10
8
6
4
2
0
- 20
0
20
40
60
80
100
1.0
1.5
2.0
2.5
Temperature (°C)
3.0
3.5
4.0
4.5
5.0
5.5
VDD2 (V)
S/E Detection Current vs. VDD2
Quiescent Current vs. Temperature
30
2.4
TA = +25 °C
2.3
IDD2 - S/E Detection Current (μA)
IDD - Ear Jack In Current (μA)
80
14
6.0
20
15
10
5
0
1.0
60
Ear Jack In Current vs. Temperature
6.5
25
40
Quiescent Current vs. VDD
VDD = 1.8 V
IQ - Quiescent Current (μA)
0
Temperature (°C)
7.0
5.0
- 40
-20
VDD (V)
VDD2 = 2.1 V
2.2
2.1
2
1.9
1.8
1.7
1.6
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VDD (V)
Ear Jack In Current vs. VDD
S15-2797-Rev. D, 30-Nov-15
5.0
5.5
-40
-20
0
20
40
60
80
100
Temperature (°C)
S/E Detection Current vs. Temperature
Document Number: 62970
5
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TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
100
1000
950
IMIC(OFF) - MIC Leakage Current (nA)
RMIC - MIC On-Resistance (mΩ)
TA = +25 °C
IMIC = 100 mA
900
850
800
750
700
650
600
550
500
450
400
350
300
1.5
VDD = 1.8 V
VMIC = 2.4 V
10
1
0.1
0.01
IMIC = 1 mA, 10 mA
2.0
2.5
3.0
3.5
4.0
VDD (V)
4.5
5.0
5.5
0.001
-40
ROUTL - DET Pulldown Resistance (Ω)
RMIC - MIC On-Resistance (mΩ)
IMIC = 100 mA
750
IMIC = 10 mA
700
650
IMIC = 1 mA
600
550
60
80
100
-20
0
20
40
60
Temperature (°C)
80
125
124
123
122
121
VDD = 1.8 V
TA = +25 °C
120
1.0
100
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
IOUT (mA)
DET Pulldown Resistance vs. IOUT
MIC On Resistance vs. Temperature
126
0.10
TA = +25 °C
ROUTL - DET Pulldown Resistance (Ω)
IMIC(OFF) - MIC Leakage Current (nA)
40
126
VDD = 1.8 V
800
0.08
0.06
0.04
0.02
0.00
1.5
20
MIC Leakage Current vs. Temperature
900
500
-40
0
Temperature (°C)
MIC On Resistance vs. VDD
850
-20
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VMIC (V)
MIC Leakage Current vs. VMIC
S15-2797-Rev. D, 30-Nov-15
5.5
125
VDD = 1.8 V
124
IOUT = 1 mA
123
122
121
120
119
118
117
116
115
114
-40
-20
0
20
40
60
80
100
Temperature (°C)
DET Pulldown Resistance vs. Temperature
Document Number: 62970
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TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
170
280
VDD = 1.8 V
TA = +25 °C
VDD2 = 2.1 V
RSEL - SE Pulldown Resistance (Ω)
ROUTH - DET Pullup Resistance (Ω)
165
160
155
150
145
140
135
130
275
IS/E = 100 μA
270
265
260
255
250
-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
-40
-20
0
DET Pullup Resistance vs. IOUT
60
80
100
SE Pulldown Resistance vs. Temperature
320
150
148
146
144
142
140
138
136
134
132
130
128
126
124
122
120
VDD2 = 2.1 V
TA = +25 °C
VDD = 1.8 V
IOUT = -1 mA
RSEH - SE Pullup Resistance (Ω)
ROUTH - DET Pullup Resistance (Ω)
40
Temperature (°C)
IOUT (mA)
315
310
305
300
-40
-20
0
20
40
60
80
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1
100
Temperature (°C)
IOUT (mA)
SE Pullup Resistance vs. IOUT
DET Pullup Resistance vs. Temperature
270
340
269
335
RSEH - SE Pullup Resistance (Ω)
RSEL - SE Pulldown Resistance (Ω)
20
268
267
266
265
264
263
262
VDD2 = 2.1 V
TA = +25 °C
261
VDD2 = 2.1 V
IS/E = -100 μA
330
325
320
315
310
305
300
295
290
285
260
280
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
IOUT (mA)
SE Puldown Resistance vs. IOUT
S15-2797-Rev. D, 30-Nov-15
1.0
-40
-20
0
20
40
60
80
100
Temperature (°C)
SE Pullup Resistance vs. Temperature
Document Number: 62970
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TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
400
1.6
L_Detect Threshold Voltage (V)
1.55
L_Detect to DET - Propagation Delay (ns)
VDD = 1.8 V
1.5
1.45
VIH
1.4
VIL
1.35
1.3
1.25
350
VDD = 1.8 V
RDET = 1 MΩ, CDET = 15 pF
tPHL
300
250
200
tPLH
150
100
1.2
50
-40
-20
0
20
40
60
80
-40
100
-20
0
Temperature (°C)
60
80
100
L_Detect to DET Propagation Delay vs. Temperature
14
GND_Detect to DET - Propagation Delay (ns)
1.1
VDD = 1.8 V
1.05
GND_Detect Threshold Voltage (V)
40
Temperature (°C)
L_Detect Threshold Voltage vs. Temperature
1
0.95
VIH
0.9
0.85
VIL
0.8
0.75
0.7
-40
-20
0
20
40
60
80
VDD = 1.8 V
RDET = 1 MΩ, CDET = 15 pF
12
DET falling
10
8
6
DET rising
4
2
0
-40
100
-20
0
Temperature (°C)
20
40
60
80
100
Temperature (°C)
GND_Detect to DET Propagation Delay vs. Temperature
GND_Detect Threshold Voltage vs. Temperature
200
1.3
VDD2 = 2.1 V
S/E_REF = 1.05 V
1.25
1.2
S/E_Detect to S/E - Propagation Delay (ns)
S/E_Detect Threshold Voltage (V)
20
VIH
1.15
VIL
1.1
1.05
1
-40
-20
0
20
40
60
80
100
Temperature (°C)
S/E_Detect Threshold Voltage vs. Temperature
S15-2797-Rev. D, 30-Nov-15
VDD2 = 2.1 V
RS/E = 1 MΩ, CS/E = 15 pF
180
S/E falling
160
140
120
100
S/E rising
80
60
-40
-20
0
20
40
60
80
100
Temperature (°C)
S/E_Detect to S/E Propagation Delay vs. Temperature
Document Number: 62970
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TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
500
VDD = 1.8 V
MIC = 2.2 klΩ to +2.4 V
L_Detect to MIC - Propagation Delay (ns)
450
MIC rising
400
350
300
250
200
MIC falling
150
100
-40
-20
0
20
40
60
80
100
Temperature (°C)
L_Detect to MIC Propagation Delay vs. Temperature
20
VDD = 1.8 V
RDET = 1 MΩ, CDET = 15 pF
10 % to 90 %
DET Rise/Fall Time (ns)
15
DET rise time
10
5
DET fall time
0
-40
-20
0
20
40
60
80
100
Temperature (°C)
DET Rise / Fall Time vs. Temperature
20
VDD2 = 2.1 V
RS/E = 1 MΩ, CS/E = 15 pF
10 % to 90 %
S/E Detect Rise / Fall Time (ns)
18
S/E rise time
16
14
12
S/E fall time
10
8
6
-40
-20
0
20
40
60
80
100
Temperature (°C)
S/E_Detect to Rise / Fall Time vs. Temperature
S15-2797-Rev. D, 30-Nov-15
Document Number: 62970
9
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TEST CIRCUIT
1.8 V
V DD
L_Detect
MIC Bias = 2.4
MIC
RMIC = 2.2 kΩ
GND_Detect
R1
R2
DET
C1
SW1
SW2
R3
GND
Fig. 4 - Test Circuit
TIMING DIAGRAM
1.8 V
1.53 V
1.31 V
L_Detect
0V
1.8 V
DET
0.9 V
0.9 V
0V
tpLH
tpHL
GND_Detect = 0 V
Fig. 5 - Timing Diagram









Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?62970.
S15-2797-Rev. D, 30-Nov-15
Document Number: 62970
10
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
www.vishay.com
Vishay Siliconix
MINI QFN-10L CASE OUTLINE
DIM
MILLIMETERS
INCHES
MIN.
NAM.
MAX.
MIN.
NAM.
MAX.
A
0.45
0.55
0.60
0.0177
0.0217
0.0236
A1
0.00
-
0.05
0.000
-
0.002
b
0.15
0.20
0.25
0.006
0.008
0.010
0.150 or 0.127 REF (1)
c
0.006 or 0.005 REF (1)
D
1.70
1.80
1.90
0.067
0.071
0.075
E
1.30
1.40
1.50
0.051
0.055
0.059
e
0.40 BSC
0.016 BSC
L
0.35
0.40
0.45
0.014
0.016
0.018
L1
0.45
0.50
0.55
0.0177
0.0197
0.0217
Note
(1) The dimension depends on the leadframe that assembly house used.
ECN T16-0163-Rev. B, 16-May-16
DWG: 5957
Revision: 16-May-16
1
Document Number: 74496
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
PAD Pattern
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR MINI QFN 10L
1.700
(0.0669)
9x
0.563
(0.0221)
0.663
(0.0261)
0.200
(0.0079)
1
2.100
(0.0827)
0.400
(0.0157)
Pitch
10 x
0.225
(0.0089)
Mounting Footprint
Dimensions in mm (inch)
Document Number: 66554
Revision: 05-Mar-10
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1
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Revision: 02-Oct-12
1
Document Number: 91000
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