DG401BMIL, DG403BMIL, DG405BMIL Datasheet

DG401BMIL, DG403BMIL, DG405BMIL
www.vishay.com
Vishay Siliconix
Low-Power, High-Speed CMOS Analog Switches
DESCRIPTION
FEATURES
The DG401B, DG403B, DG405B monolithic analog switches
are replacements for the popular DG401, DG403, DG405
analog switches and provide improved performance,
combining high speed (tON: 100 ns, typ.) with low power
consumption make the DG401B series ideal for portable
and battery powered applications.
Built on the Vishay Siliconix proprietary high-voltage silicon
gate process to achieve high voltage rating and superior
switch on/off performance, break-before-make is
guaranteed for the SPDT configurations.
Each switch conducts equally well in both directions when
on, and blocks up to 30 V peak-to-peak when off.
On-resistance is very flat over the full ± 15 V analog range.
The DG401B has two independent SPST switches. The
DG403B has four SPST switches in NO/NC combinations.
The DG405B has four switches in two SPST pairs (see
Functional Block Diagrams and Pin Configurations on pages
1 and 2.)
The DG401B, DG403B and DG405B is available in the
16-pin CerDIP package.
•
•
•
•
•
•
•
44 V supply max. rating
± 15 V analog signal range
On-resistance - RDS(on): 23 
Low leakage - ID(on): 40 pA
Fast switching - tON: 100 ns
Upgrade to DG401, DG403, DG405
TTL, CMOS compatible
• Single supply capability
BENEFITS
• Wide dynamic range
• Break-before-make switching action (DG403B only)
• Simple interfacing
APPLICATIONS
• Audio and video switching
• Sample-and-hold circuits
• Test equipment
• PBX, PABX
• High-Rel systems
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG401B
DG403B
Dual-In-Line
Dual-In-Line
D1
1
16 S1
D1
1
16 S1
NC
2
15 IN1
NC
2
15 IN1
NC
3
14 V-
D3
3
14 V-
NC
4
13 GND
S3
4
13 GND
NC
5
12 NC
S4
5
12 NC
D4
6
11 V+
NC
6
11 V+
NC
7
10 IN2
NC
7
10 IN2
D2
8
S2
D2
8
9 S2
9
Top View
Top View
Two SPST Switches per Package
Four SPST Switches in Two Pairs per Package
TRUTH TABLE
TRUTH TABLE
LOGIC
SWITCH
LOGIC
SW1, SW2
0
Off
0
Off
On
1
On
1
On
Off
Notes
• Logic “0”  0.8 V
• Logic “1”  2.4 V
S13-1749-Rev. A, 05-Aug-13
SW3, SW4
Notes
• Logic “0”  0.8 V
• Logic “1”  2.4 V
Document Number: 67937
1
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DG401BMIL, DG403BMIL, DG405BMIL
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FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION




Four SPST Switches in Two Pairs per Package
DG405B
Dual-In-Line
D1
1
16 S1
NC
2
15 IN1
D3
3
14 V-
S3
4
13 GND
S4
5
12 NC
D4
TRUTH TABLE
11 V+
6
NC
7
10 IN2
D2
8
9 S2
LOGIC
SWITCH
0
Off
1
On
Notes
• Logic “0”  0.8 V
• Logic “1”  2.4 V
Top View
ORDERING INFORMATION
PART
CONFIGURATION
DG401B
SPST x 2, NO
DG403B
SPST x 4,
two complementary
pairs per package
DG405B
SPST x 4,
two pairs per
package
TEMP. RANGE
- 55 °C
to 125 °C
PACKAGE
ORDERING PART
GENERIC
DSCC NUMBER
16-pin CerDIP
DG401BAK/883
DG401BAK/883
(Vishay qualified,
DSCC approval in
progress)
16-pin CerDIP
DG403BAK/883
DG403BAK/883
(Vishay qualified,
DSCC approval in
progress)
16-pin CerDIP
DG405BAK/883
DG405BAK/883
(Vishay qualified,
DSCC approval in
progress)
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
V+
Voltages Referenced to VDigital
Inputsa,
GND
LIMIT
44
25
Current (any terminal) Continuous
30
Current, S or D (pulsed 1 ms 10 % duty)
100
Power Dissipation
(Package)b
V
(V-) - 0.3 V to (V+) + 0.3 V or
30 mA, whichever occurs first
VS, VD
Storage Temperature
UNIT
(A suffix)
16-pin
CerDIPc
mA
- 65 to 125
°C
900
mW
Notes
a. Signals on SX, DX or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 12 mW/°C above 75 °C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S13-1749-Rev. A, 05-Aug-13
Document Number: 67937
2
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DG401BMIL, DG403BMIL, DG405BMIL
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Vishay Siliconix
SPECIFICATIONSa
PARAMETER
SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE
SPECIFIED
LIMITS
- 55 °C to 125 °C
TEMP.b
V+ = 15 V, V- = - 15 V,
VIN = 2.4 V, 0.8 Vf
MIN.d
UNIT
TYP.c
MAX.d
23
35
Analog Switch
Analog Signal Rangee
Drain-Source 
On-Resistance
 Drain-Source 
On-Resistance
VANALOG
Full
RDS(on)
IS = - 10 mA, VD = ± 10 V
V+ = 13.5 V, V- = - 13.5 V
Room
RDS(on)
IS = - 10 mA, VD = ± 5 V, 0 V
V+ = 16.5 V, V- = - 16.5 V
Room
IS(off)
Switch Off Leakage Current
ID(off)
15
Full
45
0.72
3
- 0.01
0.5
- 0.01
0.5
Full
Room
V+ = 16.5, V- = - 16.5 V
VD = ± 15.5 V, VS = ± 15.5 V
- 15

5
- 0.5
Hot
- 20
Room
- 0.5
Hot
- 20
Room
-1
Hot
- 40
20
20
- 0.04
nA
1
ID(on)
V+ = 16.5 V, V- = - 16.5 V
VS = VD = ± 15.5 V
Input Current VIN Low
IIL
VIN under test = 0.8 V,
all other = 2.4 V
Full
-1
0.005
1
Input Current VIN High
IIH
VIN under test = 2.4 V,
all other = 0.8 V
Full
-1
0.005
1
Drain On Leakage Current
V
40
Digital Control
μA
Dynamic Characteristics
Turn-On Time
tON
100
150
tOFF
RL = 300 , CL = 35 pF
see figure 2
Room
Turn-Off Time
Room
60
100
Break-Before-Make Time
Delay (DG403B)
tD
RL = 300 , CL = 35 pF
Room
Charge Injection
Q
CL = 10 000 pF, Vgen = 0 V,
Rgen = 0 
Room
60
Room
- 81.7
Room
- 94.8
Room
12
Room
12
Room
39
Room
39
Room
0.250
Off Isolation Reject Ratio
OIRR
Channel-to-Channel
Crosstalk
XTALK
Source Off Capacitance
CS(off)
Drain Off Capacitance
CD(off)
Drain On Capacitance
CD(on)
Source On Capacitance
CS(on)
RL = 100 , CL = 5 pF, f = 1 MHz
f = 1 MHz, VS = 0 V
5
ns
12
pC
dB
pF
Power Supplies
Positive Supply Current
I+
Negative Supply Current
I-
Ground Current
IGND
Full
V+ = 16.5 V, V- = - 16.5 V
VIN = 0 V or 5 V
1
5
Room
-1
Full
-5
Room
-1
Full
-5
0.25
mA
0.25
Notes
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, full = as determined by the operating temperature suffix.
c. Typical values are for DESIGHN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
e. Guaranteed by desighn, not subject to production test.
f. VIN = input voltage to perform proper function.
S13-1749-Rev. A, 05-Aug-13
Document Number: 67937
3
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DG401BMIL, DG403BMIL, DG405BMIL
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Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100 000
60
50
10 000
Supply Current (mA)
ICC - Supply Current (pA)
V+ = 15 V
V- = - 15 V
1000
I+
I-
100
40
30
20
10
10
1
0
- 55
- 25
5
35
65
95
0
125
4000
6000
8000
10000
12000
Frequency (kHz)
Supply Current vs. Temperature
Supply Current vs. Switching Frequency
90
60
VCC =
VCC =
VCC =
VCC =
VCC =
VCC =
50
45
40
VCC = 7.5 V
VCC = 10 V
VCC = 12 V
VCC = 15 V
VCC = 20 V
VCC = 22 V
80
±6V
± 10 V
± 12 V
± 15 V
± 20 V
± 22 V
RON - On-Resistance ()
55
R ON - On-Resistance ()
2000
Temperature (°C)
35
30
25
70
60
50
40
30
20
20
15
10
- 25 - 20 - 15 - 10
10
-5
0
5
10
15
20
0
25
VD - Analog Voltage (V)
10
15
20
25
VD - Analog Voltage (V)
RON vs. Analog Voltage and Single Supply Voltage
RON vs. Analog Voltage and Supply Voltage
60
100
VCC = ± 15 V
IS = 10 mA
125 °C
85 °C
25 °C
0 °C
- 40 °C
- 55 °C
50
45
80
60
Leakage Current (pA)
55
R ON - On-Resistance ()
5
40
35
30
40
20
0
- 20
25
- 40
20
- 60
15
V+ = 15 V
V- = - 15 V
For ID(off), VS = 0 V
For IS(off), V D = 0 V
ID(on)
ID(off)
IS(off)
- 80
10
- 15
- 10
-5
0
5
VD - Analog Voltage (V)
10
RON vs. Analog Voltage and Temperature
S13-1749-Rev. A, 05-Aug-13
15
- 100
- 15
-5
5
VD - Analog Voltage (V)
15
Leakage Current vs. Analog Voltage
Document Number: 67937
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Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
10 000
150
t(on), VS = + 5 V
t(on), VS = - 5 V
t(off), VS = - 5 V
t(off), VS = + 5 V
1000
Switching Time (ns)
Leakage Current (pA)
125
100
100
75
50
IS(off)
ID(on)
ID(off)
10
25
1
0
- 55
- 25
5
35
65
95
125
0
±5
± 10
± 20
± 25
Switching Time vs. Supply Voltage
Leakage Current vs. Temperature
250
80
t(on), VS = + 5 V
t(off), VS = + 5 V
225
70
200
175
Switching Time (ns)
Switching Time (ns)
± 15
Supply Voltage (V)
Temperature (°C)
150
125
100
75
50
t(on), V S = + 10 V
t(on), V S = - 10 V
t(off), V S = + 10 V
t(off), V S = - 10 V
60
50
40
30
V+ = 15 V
V- = - 15 V
25
0
0
5
10
15
20
20
- 55
25
- 25
Supply Voltage (V)
5
35
65
95
125
Temperature (°C)
Switching Time vs. Single Supply Voltage
Switching Time vs. Temperature
3.0
- 10
10
2.6
2.4
Loss, OIRR, X TALK (dB)
VTH - Input Threshold Voltage (V)
2.8
2.2
2.0
1.8
1.6
1.4
1.2
1.0
Insertion Loss
30
50
Off Isolation
70
Cross Talk
90
110
0.8
0.6
130
5
10
15
20
25
30
Supply Voltage (V)
Input Switching Threshold vs. Supply Voltage
S13-1749-Rev. A, 05-Aug-13
0.01
0.1
10
1
Frequency (MHz)
100
1000
Insertion Loss, Off-Isolation Crosstalk vs. Frequency
Document Number: 67937
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SCHEMATIC DIAGRAM (typical channel)
V+
S
VLevel
Shift/
Drive
VIN
V+
GND
D
V-
Fig. 1
TEST CIRCUITS
VO is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and
trailing edge of the output waveform.
tr < 20 ns
tf < 20 ns
3V
Logic
Input
+ 15 V
V+
± 10 V
S
D
50 %
0V
tOFF
Switch
Input*
VO
VS
90 %
VO
IN
RL
1 kΩ
V-
GND
CL
35 pF
Switch
Input*
- 15 V
tON
90 %
VO
- VS
* VS = 10 V for tON, VS = - 10 V for t OFF
CL (includes fixture and stray capacitance)
RL
VO = VS
0V
Switch
Output
Note:
RL + R DS(on)
Logic input waveform is inverted for switches that
have the opposite logic sense control
Fig. 2 - Switching Time
+ 15 V
Logic
Input
V+
VS1
VS2
S1
D1
S2
VO1
Switch
Output
IN
RL1
V-
50 %
0V
VS1
VO1
90 %
VO2
D2
GND
3V
RL2
CL1
CL2
Switch
Output
0V
VS2
VO2
0V
90 %
tD
tD
- 15 V
C L (includes fixture and stray capacitance)
Fig. 3 - Break Before Make
S13-1749-Rev. A, 05-Aug-13
Document Number: 67937
6
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TEST CIRCUITS
+ 15 V
V+
Rg
S
ΔVO
D
VO
IN
Vg
VO
IN
CL
10 nF
3V
On
On
Off
V-
GND
Q = ΔVO x CL
- 15 V
Fig. 4 - Charge Injection
+ 15 V
+ 15 V
C
C
V+
V+
S
VS
D
VO
Rg = 50 Ω
0 V, 2.4 V
RL
100 Ω
IN
S
VS
Rg = 50 Ω
0 V, 2.4 V
GND
V-
VO
D
RL
100 Ω
IN
C
GND
- 15 V
V-
C
- 15 V
C = RF bypass
VS
Off Isolation = 20 log
VO
C = RF bypass
Fig. 5 - Off Isolation
Fig. 6 - Insertion Loss
+ 15 V
+ 15 V
C
C
V+
S1
VS
D
V+
S
Rg = 50 Ω
50 Ω
VO
Meter
S2
IN
HP4192A
Impedance
Analyzer
or Equivalent
0 V, 2.4 V
RL
IN
D
0.8 V
GND
C
V-
- 15 V
XTALK Isolation = 20 log
C = RF bypass
Fig. 7 - Crosstalk
S13-1749-Rev. A, 05-Aug-13
GND
V-
C
f = 1 MHz
- 15 V
VS
VO
Fig. 8 - Capacitances
Document Number: 67937
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APPLICATIONS
+ 15 V
+ 15 V
V+
S1
Left
Source 1
D1
S3
Right
D3
V+
Left
ein
S1
D1
S3
D3
IN1
Left
+
-
eout
IN1
S2
D2
Source 2
S4
Right
D4
C1
Integrate/
Reset
Right
TTL
S2
D2
S4
D4
IN2
C2
IN2
TTL
DG403B
Channel
Select
GND
DG403B
V-
Slope
Select
GND
- 15 V
V-
- 15 V
Fig. 9 - Stereo Source Selector
Fig. 10 - Dual Slope Integrator
Dual Slope Integrators
The DG403B is well suited to configure a selectable slope
integrator. One control signal selects the timing capacitor C1
or C2. Another one selects ein or discharges the capacitor in
preparation for the next integration cycle.
+ 15 V
V+
S1
D1
S3
D3
IN1
ein
S2
D2
S4
D4
IN2
Clock
DG403B
GND
V-
- 15 V
+
-
eout
Fig. 11 - Band-Pass Switched Capacitor Filter
Band-Pass Switched Capacitor Filter
Single-pole double-throw switches are a common element
for switched capacitor networks and filters. The fast
switching times and low leakage of the DG403B allow for
higher clock rates and consequently higher filter operation
frequencies.
S13-1749-Rev. A, 05-Aug-13
Document Number: 67937
8
For technical questions, contact: AnalogSwitchtechsupport@vishay.com
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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APPLICATIONS
Peak Detector
A3 acting as a comparator provides the logic drive for operating SW1. The output of A2 is fed back to A3 and compared to the
analog input ein. If ein > eout the output of A3 is high keeping SW1 closed. This allows C1 to charge up to the analog input voltage.
When ein goes below eout A3 goes negative, turning SW1 off. The system will therefore store the most positive analog input
experienced.
Reset
SW2
ein
–
A1
+
+
A3
–
SW1
R1
+
A2
–
DG401B
eout
C1
Fig. 12 - Positive Peak Detector









































Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?67937.
S13-1749-Rev. A, 05-Aug-13
Document Number: 67937
9
For technical questions, contact: AnalogSwitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Package Information
Vishay Siliconix
CERDIP: 16ĆLEAD
16
15
14
13
12
11
10
9
E1 E
1
2
3
4
5
6
7
8
D
S
Q1
A
A1
L1
L
e1
C
B
B1
MILLIMETERS
Dim
A
A1
B
B1
C
D
E
E1
e1
eA
L
L1
Q1
S
∝
eA
INCHES
Min
Max
Min
Max
4.06
5.08
0.160
0.200
0.51
1.14
0.020
0.045
0.38
0.51
0.015
0.020
1.14
1.65
0.045
0.065
0.20
0.30
0.008
0.012
19.05
19.56
0.750
0.770
7.62
8.26
0.300
0.325
6.60
7.62
0.260
0.300
2.54 BSC
∝
0.100 BSC
7.62 BSC
0.300 BSC
3.18
3.81
0.125
0.150
3.81
5.08
0.150
0.200
1.27
2.16
0.050
0.085
0.38
1.14
0.015
0.045
0°
15°
0°
15°
ECN: S-03946—Rev. G, 09-Jul-01
DWG: 5403
Document Number: 71282
03-Jul-01
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product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please
contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Material Category Policy
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
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Document Number: 91000