Data Sheet

DISCRETE SEMICONDUCTORS
DATA SHEET
PESDxS2UAT series
Double ESD protection diodes
in SOT23 package
Product data sheet
2004 Feb 18
NXP Semiconductors
Product data sheet
Double ESD protection diodes
in SOT23 package
PESDxS2UAT series
FEATURES
QUICK REFERENCE DATA
• Unidirectional ESD protection of up to two lines
SYMBOL
• Common-cathode configuration
VRWM
reverse stand-off
voltage
3.3, 5, 12, 15
and 24
Cd
diode capacitance
VR = 0 V;
f = 1 MHz
207, 152, 38, 32 pF
and 23
number of
protected lines
2
• Max. peak pulse power: Ppp = 330 W at tp = 8/20 µs
• Low clamping voltage: V(CL)R = 20 V at Ipp = 18 A
• Ultra-low reverse leakage current: IRM < 700 nA
• ESD protection > 30 kV
• IEC 61000-4-2; level 4 (ESD)
PARAMETER
VALUE
UNIT
V
• IEC 61000-4-5 (surge); Ipp = 18 A at tp = 8/20 µs.
PINNING
APPLICATIONS
PIN
• Computers and peripherals
• Communication systems
• Audio and video equipment
• Data lines
DESCRIPTION
1
anode 1
2
anode 2
3
common cathode
• CAN bus protection.
DESCRIPTION
Unidirectional double ESD protection diodes in common
cathode configuration in the SOT23 plastic package.
Designed to protect up to two transmission or data lines
against damage from ElectroStatic Discharge (ESD) and
other transients.
1
3
1
3
2
2
MARKING
TYPE NUMBER
PESD3V3S2UAT
MARKING CODE(1)
001aaa401
*7A
PESD5V0S2UAT
*7B
PESD12VS2UAT
*7C
PESD15VS2UAT
*7D
PESD24VS2UAT
*7E
Fig.1 Simplified outline (SOT23) and symbol.
Note
1. * = p : made in Hong Kong.
* = t : made in Malaysia.
* = W : made in China.
2004 Feb 18
sym002
2
NXP Semiconductors
Product data sheet
Double ESD protection diodes
in SOT23 package
PESDxS2UAT series
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
PESD3V3S2UAT
−
DESCRIPTION
VERSION
plastic surface mounted package; 3 leads
SOT23
PESD5V0S2UAT
PESD12VS2UAT
PESD15VS2UAT
PESD24VS2UAT
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
Ppp
Ipp
PARAMETER
peak pulse power
CONDITIONS
MIN.
MAX.
UNIT
8/20 µs pulse; notes 1 and 2
PESD3V3S2UAT
−
330
W
PESD5V0S2UAT
−
260
W
PESD12VS2UAT
−
180
W
PESD15VS2UAT
−
160
W
PESD24VS2UAT
−
160
W
PESD3V3S2UAT
−
18
A
PESD5V0S2UAT
−
15
A
PESD12VS2UAT
−
5
A
PESD15VS2UAT
−
5
A
PESD24VS2UAT
peak pulse current
8/20 µs pulse; notes 1 and 2
−
3
A
Tj
junction temperature
−
150
°C
Tamb
operating ambient temperature
−65
+150
°C
Tstg
storage temperature
−65
+150
°C
Notes
1. Non-repetitive current pulse 8/20µ µs exponential decay waveform; see Fig.2.
2. Measured across either pins 1 and 3 or pins 2 and 3.
2004 Feb 18
3
NXP Semiconductors
Product data sheet
Double ESD protection diodes
in SOT23 package
PESDxS2UAT series
ESD maximum ratings
SYMBOL
ESD
PARAMETER
CONDITIONS
electrostatic discharge
VALUE
UNIT
PESD3V3S2UAT
30
kV
PESD5V0S2UAT
30
kV
PESD12VS2UAT
30
kV
PESD15VS2UAT
30
kV
PESD24VS2UAT
23
kV
10
kV
IEC 61000-4-2 (contact discharge);
notes 1 and 2
HBM MIL-Std 883
PESDxS2UAT-series
Notes
1. Device stressed with ten non-repetitive ESD pulses; see Fig.3.
2. Measured from pin 1, 2, 3, 4, 5 or 8 to pin 6 or 7.
ESD standards compliance
ESD STANDARD
CONDITIONS
IEC 61000-4-2; level 4 (ESD); see Fig.3
> 15 kV (air); > 8 kV (contact)
HBM MIL-Std 883; class 3
> 4 kV
001aaa191
MLE218
120
Ipp
handbook, halfpage
100 %
Ipp
100 % Ipp; 8 µs
(%)
80
90 %
e−t
50 % Ipp; 20 µs
40
10 %
tr = 0.7 to 1 ns
0
0
10
20
30
t (µs)
40
30 ns
60 ns
Fig.2
8/20 µs pulse waveform according to
IEC 61000-4-5.
2004 Feb 18
Fig.3
4
ElectroStatic Discharge (ESD) pulse
waveform according to IEC 61000-4-2.
t
NXP Semiconductors
Product data sheet
Double ESD protection diodes
in SOT23 package
PESDxS2UAT series
ELECTRICAL CHARACTERISTICS
Tj = 25 °C; unless otherwise specified.
SYMBOL
VRWM
IRM
VBR
Cd
V(CL)R
PARAMETER
MIN.
TYP.
MAX.
UNIT
reverse stand-off voltage
PESD3V3S2UAT
−
−
3.3
V
PESD5V0S2UAT
−
−
5
V
PESD12VS2UAT
−
−
12
V
PESD15VS2UAT
−
−
15
V
PESD24VS2UAT
−
−
24
V
reverse leakage current
PESD3V3S2UAT
VRWM = 3.3 V
−
0.7
2
µA
PESD5V0S2UAT
VRWM = 5 V
−
0.1
1
µA
PESD12VS2UAT
VRWM = 12 V
−
<1
50
nA
PESD15VS2UAT
VRWM = 15 V
−
<1
50
nA
PESD24VS2UAT
VRWM = 24 V
−
<1
50
nA
PESD3V3S2UAT
5.2
5.6
6.0
V
PESD5V0S2UAT
6.4
6.8
7.2
V
PESD12VS2UAT
14.7
15.0
15.3
V
PESD15VS2UAT
17.6
18.0
18.4
V
PESD24VS2UAT
26.5
27.0
27.5
V
PESD3V3S2UAT
−
207
300
pF
PESD5V0S2UAT
−
152
200
pF
PESD12VS2UAT
−
38
75
pF
PESD15VS2UAT
−
32
70
pF
PESD24VS2UAT
−
23
50
pF
Ipp = 1 A
−
−
7
V
Ipp = 18 A
−
−
20
V
Ipp = 1 A
−
−
9
V
Ipp = 15 A
−
−
20
V
Ipp = 1 A
−
−
19
V
Ipp = 5 A
−
−
35
V
Ipp = 1 A
−
−
23
V
Ipp = 5 A
−
−
40
V
Ipp = 1 A
−
−
36
V
Ipp = 3 A
−
−
70
V
breakdown voltage
diode capacitance
clamping voltage
PESD3V3S2UAT
PESD5V0S2UAT
PESD12VS2UAT
PESD15VS2UAT
PESD24VS2UAT
2004 Feb 18
CONDITIONS
IZ = 5 mA
f = 1 MHz; VR = 0 V
notes 1 and 2
5
NXP Semiconductors
Product data sheet
Double ESD protection diodes
in SOT23 package
SYMBOL
Rdiff
PESDxS2UAT series
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
differential resistance
PESD3V3S2UAT
IR = 1 mA
−
−
400
Ω
PESD5V0S2UAT
IR = 1 mA
−
−
80
Ω
PESD12VS2UAT
IR = 1 mA
−
−
200
Ω
PESD15VS2UAT
IR = 1 mA
−
−
225
Ω
PESD24VS2UAT
IR = 0.5 mA
−
−
300
Ω
Notes
1. Non-repetitive current pulse 8/20 µs exponential decay waveform; see Fig.2.
2. Measured either across pins 1 and 3 or pins 2 and 3.
GRAPHICAL DATA
001aaa147
104
001aaa193
1.2
Ppp
(W)
PPP
PPP(25°C)
103
0.8
(1)
102
0.4
(2)
10
1
10
102
103
0
104
0
tp (µs)
50
100
150
200
Tj (°C)
(1) PESD3V3S2UAT and PESD5V0S2UAT.
(2) PESD12VS2UAT, PESD15VS2UAT, PESD24VS2UAT
Tamb = 25 °C.
tp = 8/20 µs exponential decay waveform; see Fig.2.
Fig.5
Fig.4
Peak pulse power dissipation as a function
of pulse time; typical values.
2004 Feb 18
6
Relative variation of peak pulse power as a
function of junction temperature; typical
values.
NXP Semiconductors
Product data sheet
Double ESD protection diodes
in SOT23 package
PESDxS2UAT series
001aaa148
240
001aaa149
50
Cd
(pF)
Cd
(pF)
200
40
160
120
(1)
30
(2)
20
(1)
(2)
80
(3)
10
40
0
1
2
3
4
0
5
0
VR (V)
5
10
15
20
25
VR (V)
(1) PESD12VS2UAT; VRWM = 12 V.
(2) PESD15VS2UAT; VRWM = 15 V.
(1) PESD3V3S2UAT; VRWM = 3.3 V.
(2) PESD5V0S2UAT; VRWM = 5 V.
(3) PESD24VS2UAT; VRWM = 24 V.
Tamb = 25 °C; f = 1 MHz.
Tamb = 25 °C; f = 1 MHz.
Fig.6
Fig.7
Diode capacitance as a function of reverse
voltage; typical values.
2004 Feb 18
7
Diode capacitance as a function of reverse
voltage; typical values.
NXP Semiconductors
Product data sheet
Double ESD protection diodes
in SOT23 package
PESDxS2UAT series
001aaa270
10
IR
IR(25˚C)
(1)
1
10−1
−100
−50
0
50
100
150
Tj (°C)
(1) PESD3V3S2UAT; VRWM = 3.3 V.
PESD5V0S2UAT; VRWM = 5 V.
IR is less than 10 nA at 150 °C for:
PESD12V52UAT; VRWM = 12 V.
PESD15VS2UAT; VRWM = 15 V.
PESD24VS2UAT; VRWM = 24 V.
Fig.8
Relative variation of reverse leakage
current as a function of junction
temperature; typical values.
2004 Feb 18
8
NXP Semiconductors
Product data sheet
Double ESD protection diodes
in SOT23 package
ESD TESTER
RZ
450 Ω
PESDxS2UAT series
RG 223/U
50 Ω coax
10×
ATTENUATOR
4 GHz DIGITAL
OSCILLOSCOPE
50 Ω
CZ
note 1
Note 1: IEC61000-4-2 network
CZ = 150 pF; RZ = 330 Ω
D.U.T.: PESDxS2UAT
vertical scale = 200 V/div
horizontal scale = 50 ns/div
vertical scale = 20 V/div
horizontal scale = 50 ns/div
PESD24VS2UAT
GND
PESD15VS2UAT
GND
GND
PESD12VS2UAT
GND
PESD5V0S2L
GND
PESD3V3S2UAT
GND
unclamped +1 kV ESD voltage waveform
(IEC61000-4-2 network)
clamped +1 kV ESD voltage waveform
(IEC61000-4-2 network)
GND
GND
vertical scale = 10 V/div
horizontal scale = 50 ns/div
vertical scale = 200 V/div
horizontal scale = 50 ns/div
unclamped −1 kV ESD voltage waveform
(IEC61000-4-2 network)
clamped −1 kV ESD voltage waveform
(IEC61000-4-2 network)
001aaa151
Fig.9 ESD clamping test set-up and waveforms.
2004 Feb 18
9
NXP Semiconductors
Product data sheet
Double ESD protection diodes
in SOT23 package
PESDxS2UAT series
APPLICATION INFORMATION
The PESDxS2UAT series can protect up to two lines against damage caused by unidirectional ElectroStatic Discharge
(ESD) and surge pulses. The PESDxS2UAT series can protect lines whose signal polarities are below ground.
PESDxS2UAT series provide a surge capability of up to 330 Watts peak pulse power per line for a 8/20 µs waveform.
line 1 to be protected
line 1 to be protected
line 2 to be protected
PESDxS2UAT
PESDxS2UAT
ground
ground
unidirectional protection
of two lines
bidirectional protection
of one line
001aaa179
Fig.10 Typical application: ESD protection of data lines.
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The
following guidelines are recommended:
1. Place the PESDxS2UAT as close as possible to the input terminal or connector.
2. Minimize the path length between the PESDxS2UAT and the protected line.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all printed-circuit board conductive loops including power and ground loops.
6. Minimize the length of transient return paths to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible.
9. Use vias for multi-layer printed-circuit boards.
2004 Feb 18
10
NXP Semiconductors
Product data sheet
Double ESD protection diodes
in SOT23 package
PESDxS2UAT series
PACKAGE OUTLINE
Plastic surface-mounted package; 3 leads
SOT23
D
E
B
A
X
HE
v M A
3
Q
A
A1
1
2
e1
bp
c
w M B
Lp
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max.
bp
c
D
E
e
e1
HE
Lp
Q
v
w
mm
1.1
0.9
0.1
0.48
0.38
0.15
0.09
3.0
2.8
1.4
1.2
1.9
0.95
2.5
2.1
0.45
0.15
0.55
0.45
0.2
0.1
OUTLINE
VERSION
SOT23
2004 Feb 18
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
04-11-04
06-03-16
TO-236AB
11
NXP Semiconductors
Product data sheet
Double ESD protection diodes
in SOT23 package
PESDxS2UAT series
DATA SHEET STATUS
DOCUMENT
STATUS(1)
PRODUCT
STATUS(2)
DEFINITION
Objective data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary data sheet
Qualification
This document contains data from the preliminary specification.
Product data sheet
Production
This document contains the product specification.
Notes
1. Please consult the most recently issued document before initiating or completing a design.
2. The product status of device(s) described in this document may have changed since this document was published
and may differ in case of multiple devices. The latest product status information is available on the Internet at
URL http://www.nxp.com.
DISCLAIMERS
above those given in the Characteristics sections of this
document is not implied. Exposure to limiting values for
extended periods may affect device reliability.
General ⎯ Information in this document is believed to be
accurate and reliable. However, NXP Semiconductors
does not give any representations or warranties,
expressed or implied, as to the accuracy or completeness
of such information and shall have no liability for the
consequences of use of such information.
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products are sold subject to the general terms and
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http://www.nxp.com/profile/terms, including those
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infringement and limitation of liability, unless explicitly
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reserves the right to make changes to information
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specifications and product descriptions, at any time and
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Quick reference data ⎯ The Quick reference data is an
extract of the product data given in the Limiting values and
Characteristics sections of this document, and as such is
not complete, exhaustive or legally binding.
Applications ⎯ Applications that are described herein for
any of these products are for illustrative purposes only.
NXP Semiconductors makes no representation or
warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values ⎯ Stress above one or more limiting
values (as defined in the Absolute Maximum Ratings
System of IEC 60134) may cause permanent damage to
the device. Limiting values are stress ratings only and
operation of the device at these or any other conditions
2004 Feb 18
12
NXP Semiconductors
Customer notification
This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal
definitions and disclaimers. No changes were made to the technical content, except for package outline
drawings which were updated to the latest version.
Contact information
For additional information please visit: http://www.nxp.com
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© NXP B.V. 2009
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R76/01/pp13
Date of release: 2004 Feb 18
Document order number:
9397 750 12247
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