Application Notes

AN00093
TJA1020 LIN transceiver
Rev. 02 — 16 September 2005
Application note
Document information
Info
Content
Keywords
TJA1020, Local Interconnect Network (LIN), Transceiver, Physical Layer,
ISO 9141
Abstract
The TJA1020 is a low power LIN transceiver for the use in automotive and
industrial applications. It supports the single wire bus signal
representation being described in the LIN protocol specification for
in-vehicle Class-A buses with a single master node and a set of slave
nodes. Local Interconnect Network (LIN) is a serial bus protocol being
primarily intended for transmission of control related data between a
number of bus nodes. This application note provides information how to
use the TJA1020 in LIN applications.
AN00093
Philips Semiconductors
TJA1020 LIN transceiver
Revision history
Rev
Date
Description
02
20050916
Section 2.5, Section 4.4, Section 5.1 and Section 6 added
Section 3.2.1 updated
Figure 5, Figure 6 and Figure 32 updated
01
20020128
Preliminary Application Note
Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, please send an email to: [email protected]
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TJA1020 LIN transceiver
1. Introduction
The Local Interconnect Network (LIN) is a low speed (max. 20 kBaud) class-A, serial bus
protocol. A LIN sub-bus is primarily intended for modules like seat, door, roof, switch
panel, steering wheel, etc. Its task is to connect switches, actuators and sensors into a
sub-bus that links to the main bus e.g. a CAN bus.
master
control unit
LIN bus
slave
control unit
1
slave
control unit
2
slave
control unit
n
Fig 1. Single-master / multiple-slave concept
The LIN protocol (Ref. 2) is based on the UART/SCI serial data link format using
8N1-coded byte fields. A LIN network consists of one master node and one or more slave
nodes; the medium access is controlled by the master node. Such a
single-master/multiple-slave concept is shown in Figure 1.
V
driver node
V
receiver node
VBAT
VBAT
recessive
recessive
80%
60%
40%
20%
dominant
dominant
t
t
Fig 2. Voltage levels on the LIN bus line
The LIN physical layer has been derived from the ISO 9141 (Ref. 3) standard but has
some enhancements to meet the particular operation requirements in automotive
environments such as EMC, ESD, etc. The LIN bus is a single-wire, wired AND bus with a
12 V-battery related recessive level. The voltage levels on the LIN bus line are shown in
Figure 2.
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TJA1020 LIN transceiver
e.g. H-Bridge
µC
ECU
Voltage
Regulator
SCI/
3.3V/5V
UART
TJA1020
LIN bus line
Fig 3. Typical LIN ECU
This report describes the technical implementation of the TJA1020 (Ref. 1) as Physical
Medium Attachment within LIN. Its focus is to provide application hints / recommendations
for the design of LIN electronic control units (ECUs) using the LIN transceiver TJA1020
from Philips Semiconductors (see Figure 3).
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TJA1020 LIN transceiver
2. General description
The transceiver TJA1020 represents the Physical Medium Attachment, interfacing the LIN
master/slave protocol controller to the LIN transmission medium. The transmit data
stream of the protocol controller at the TXD input is converted by the LIN transceiver into a
bus signal with controlled slew rate and wave shaping to minimize ElectroMagnetic
Emission (EME). The receiver of the TJA1020 detects the data stream on the LIN bus line
and transmits it via the RXD pin to the protocol controller.
The transceiver provides low-power management (see Section 2.3), consumes nearly no
current in Sleep mode (see Section 9.1) and minimizes the power consumption in failure
modes (see Section 9.2).
The TJA1020 transceiver is optimized for the maximum specified LIN transmission speed
of 20 kBaud and is recommended for networks including up to 16 nodes (Ref. 2).
The pinning of the TJA1020 is chosen to be compatible to standard K-Line transceivers.
2.1 Features
The main features of the TJA1020 are:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Baud rate up to 20 kBaud
Very low ElectroMagnetic Emission (EME) due to output wave shaping
Very high ElectroMagnetic Immunity (EMI)
Low-slope mode for low speed applications (< 10 kBaud) to reduce EME even further
Very low current consumption in Sleep mode
Battery discharge protection in case of LIN to GND short-circuit
Transmit data (TXD) dominant time-out function
Wide battery supply operation range, up to jump start conditions (27 V)
Control input and output levels compatible with devices supplied out of 3 V up to 5 V
Integrated termination resistor for LIN slave applications
Local and remote wake-up in Sleep mode
Recognition of the wake-up source (local or remote)
Fail-safe behavior in case of unpowered conditions, no reverse current paths
Bus terminal protected against short-circuits and transients in the automotive
environment
• Direct battery operation with protection against load dump, jump start and transients
• No 5 V supply required
• Thermally protected
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TJA1020 LIN transceiver
2.2 Block diagram
BAT
IIL(NWAKE)
*NWAKE
Wake
Timer
**NSLP
Sleep/Norm
Timer
INH
RSLP
RSLAVE
CONTROL
IIL(LIN)
Temp.
Protect.
TxD
Time-out
Timer
Transmitter
RTXD
TXD
LIN
BUS
Timer
GND
RXD
RXD/
INT
Filter
Receiver
*NWAKE = WAKE
**NSLP = SLP
Fig 4. Block diagram of the TJA1020
2.3 Operating modes
The TJA1020 provides four operating modes: Normal-slope mode, Low-slope mode,
Standby mode and Sleep mode. The operating modes are shown in Table 1 and Figure 5.
Table 1:
Operating modes
Mode
NSLP TXD
RXD
INH
Trans- RSLAVE
mitter
Remarks
Sleep
0
weak pull-down
floating
floating
off
current
source
see
Section 2.3.1
Standby
0
weak pull-down if remote wake-up; low
strong pull-down if local wake-up
high
(VBAT)
off
30 kΩ
see
Section 2.3.2
Low-slope 1
weak pull-down
high: recessive state; high
low: dominant state (VBAT)
on
30 kΩ
see
Section 2.3.4
Normalslope
weak pull-down
high: recessive state; high
low: dominant state (VBAT)
on
30 kΩ
see
Section 2.3.3
1
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TJA1020 LIN transceiver
Normal slope
INH: high
LIN: 30k
RXD: receive data output
TXD: transmit data input
Transmitter: on
(TXD = 1) AND
(NSLP = 1)2
(TXD = 1) AND
(NSLP = 1)2
(NSLP = 0)1
Standby
AND (TXD = 1)
INH: high
( Remote Wake-up
LIN: 30k
3
RXD: low
OR Local Wake-up 4 )
TXD: wake source output
AND (NSLP = 0)
Transmitter: off
Sleep
INH: floating
LIN: current source
RXD: floating
TXD: weak pull-down
Transmitter: off
(TXD = 0) AND
(NSLP = 0)1
(NSLP = 1)2
AND (TXD = 1)
(TXD = 0) AND
Power-on
(NSLP = 1)2
Low slope
INH: high
LIN: 30k
RXD: receive data output
TXD: weak pull-down
Transmitter: on
(1) t(NSLP=0) > tgotosleep (Ref. 1)
(2) t(NSLP=1) > tgotonorm (Ref. 1)
(3) LIN becomes dominant for t(LIN=0) > tBUS (Ref. 1) and is followed by an edge to recessive
(4) NWAKE becomes low for t(NWAKE=0) > tNWAKE (Ref. 1)
Fig 5. State diagram of the TJA1020
2.3.1 Sleep mode
The Sleep mode of the TJA1020 provides the lowest achievable power consumption
within LIN ECUs. This is achieved by a very low current dissipation of the transceiver itself
and switching off the external voltage regulator through the INH output. During Sleep
mode the INH output is floating.
Although the power consumption is extremely low, a remote wake-up via LIN and a local
wake-up via NWAKE will be recognized and results in a mode change towards Standby
mode (see Section 2.3.2). Furthermore the TJA1020 provides direct control of Normal or
Low-slope mode via NSLP independently of a previous wake-up event (see Section 2.3.3
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and Section 2.3.4). This is useful for applications where the microcontroller supply is not
controlled by the INH output and thus, the microcontroller could activate the transceiver at
any time.
The TJA1020 is protected against unwanted wake-up events caused by automotive
transients or EMI. For this purpose the transceiver provides filters and/or timers at the
input of the receiver (LIN), of the local wake-up input (NWAKE) and of the sleep control
input (NSLP). Therefore all wake-up events have to maintain for a certain time period
(tBUS, tWAKE and tgotonorm).
The Sleep mode is entered if a low level at the sleep control input pin NSLP maintains for
at least tgotosleep (Ref. 1) (see Figure 6) and no wake-up event (remote or local) happens
within this time. This filter time prevents unintended transitions towards Sleep mode
caused by EMI. During the mode transition it is recommended to keep TXD on high level
to avoid generation of unintended wake-up events on the LIN bus. The activation of the
Sleep mode is even possible, if LIN and/or NWAKE are clamped to ground, e.g. caused by
a short-circuit to ground.
NSLP
1
TXD
high
low
don’t care
high
INH
don’t care
floating
V
BAT
t
gotosleep
MODE
Normal slope / Low slope
Sleep
1: recommended use
Fig 6. Sleep mode timing
During Sleep mode, the internal slave termination resistor RSLAVE between LIN and BAT is
disabled; only a weak current source is present. This minimizes the current consumption
in case LIN bus is short-circuited to ground.
2.3.2 Standby mode
The Standby mode is an intermediate mode that is entered only, if a remote or local
wake-up occurs while the TJA1020 is in its Sleep mode. In Standby mode the INH pin
outputs a battery related high level and therefore can activate an external voltage
regulator. In addition the internal slave termination resistor RSLAVE between LIN and BAT
is activated.
The TJA1020 signals the Standby mode with a low level at the RXD pin. This can be used
as wake-up interrupt request for a microcontroller. Furthermore the wake-up source is
signalled by the pull-down condition at the TXD pin. A remote wake-up event results in a
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TJA1020 LIN transceiver
weak pull-down and a local wake-up event results in a strong pull-down at TXD.
Depending on the used microcontroller an external pull-up resistor could be necessary
(see Section 3.2.2).
LIN
recessive
dominant
recessive
tBUS
INH
VBAT
floating
1
RXD
high
low
TXD1
high
MODE
Sleep
Standby
1: only if a pull-up reference is present
Fig 7. Standby mode timing of remote bus wake-up
NWAKE
INH
VBAT
low
V
floating
BAT
1
high
low
1
high
low
RXD
TXD
t
MODE
NWAKE
Sleep
Standby
1: only if a pull-up reference is present
Fig 8. Standby mode timing of local wake-up
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Figure 7 and Figure 8 show the timing of a remote and local wake-up and their particular
outputs at RXD and TXD. A remote wake-up via LIN bus is detected, if the LIN wire
becomes continuously dominant for at least tBUS (Ref. 1) followed by an edge to recessive
bus level. A falling edge at the NWAKE pin results in a local wake-up if the low level
maintains for at least tNWAKE (Ref. 1).
2.3.3 Normal-slope mode
The Normal-slope mode is used to transmit and receive data via the LIN bus line. The bus
data stream is converted by the receiver into a digital bit stream and output at the RXD to
the microcontroller. A high level on the RXD pin represents a recessive level on the LIN
bus line and a low level on the RXD pin represents a dominant LIN bus line. The
transmitter of the TJA1020 converts the data stream of the microcontroller at the TXD
input into a wave shaped LIN bus signal to minimize the EME. A low level TXD input
results in a dominant LIN bus level while a high level input results in a recessive bus level.
In Normal-slope mode the internal slave termination resistor RSLAVE (Ref. 1) pulls the LIN
bus pin high. The INH pin provides a battery related high level to keep an external voltage
regulator on.
The Normal-slope mode is entered setting NSLP and TXD high for at least tgotonorm,max
(Ref. 1). The mode transition is executed when tgotonorm (Ref. 1) is expired. Figure 9 shows
the timing of a transition from Sleep or Standby mode to Normal-slope mode.
NSLP
TXD
low
high
high
don't care
t
gotonorm,min
t
MODE
don't care
Sleep / Standby
gotonorm,max
mode transition
Normal slope
Fig 9. Normal-slope mode timing
2.3.4 Low-slope mode
The Low-slope mode can be used within LIN systems below 10 kBaud and allows a
further reduction of the EME compared to the already very low EME of the Normal-slope
mode. So the only difference compared to Normal-slope mode is the bus signal transition
time. For the Low-slope mode, the transition time is about two times longer than for the
Normal-slope mode (see Figure 10).
The Low-slope mode can be entered only coming from the Sleep or Standby mode. A
direct transition from Normal-slope to Low-slope mode is not possible.
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V
LIN
Low slope mode
Normal slope mode
t
Fig 10. Reduced LIN bus slope in Low-slope mode
The Low-slope mode is entered by a low level on the TXD pin in conjunction with a high
level on the NSLP pin maintained for at least tgotonorm,max (Ref. 1). The mode transition is
executed when tgotonorm (Ref. 1) is expired. The timing of a transition from Sleep or
Standby mode to Low-slope mode is shown in Figure 11.
NSLP
TXD
low
high
low
don't care
t
gotonorm,min
t
MODE
don't care
Sleep / Standby
gotonorm,max
mode transition
Low slope
Fig 11. Low-slope mode timing
2.4 Compatibility to 3.0 V to 5 V microcontroller devices
The TJA1020 is designed to support the increasing demand for lower supply voltages
than 5 V within automotive applications. It provides reduced input thresholds at the input
pins TXD and NSLP and open drains at the output pins RXD and TXD. So it is compatible
to 3.0 V/3.3 V supplied microcontroller as well as to 5 V supplied devices. There is no 5 V
tolerant behavior of interface pins between the TJA1020 and the host microcontroller
needed and furthermore no extra VCC supply for the transceiver itself required.
To achieve a suitable high level at RXD and TXD an external pull-up resistor might be
required in case such a pull-up resistor is not part of the microcontroller port pin itself.
2.5 ISO 9141 compatibility
The Standard ISO 9141-2 ‘Road Vehicles – Diagnostic Systems – Part 2’ (Ref. 3)
specifies the interchange of digital (diagnostic) information between on-board ECUs of
road vehicles and a scan/test tool. The appropriate bus is the so-called ‘K-Line Bus’.
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TJA1020 LIN transceiver
Although the LIN physical layer (Ref. 2) has been derived from the ISO 9141 (Ref. 3)
standard it has some differences such as shown in Table 2.
Table 2:
Comparison ISO9141 (K-Line) with LIN
Description
ISO9141 (Ref. 3)
LIN (Ref. 2)
Compliance
Operating voltage
range VB
8 V to 16 V
7.3 V to 18 V √
Receiver high state
> 70 % VB
> 60 % VB
√
Receiver low state
< 30 % VB
< 40 % VB
√
Temperature range
0 °C to 50 °C
−40 °C to
125 °C
√
Diagnose tester / LIN
master
< 2 nF
-
√
ECU / LIN slave
< 500 pF
< 250 pF
Not compliant! But the TJA1020
can be used with the ISO 9141
ECU capacitance load
Wiring
< 2 nF
< 6 nF
√
Total
< 9.6 nF
< 10 nF
√
Diagnose tester / LIN
master
510 Ω
0.9 kΩ to
1.1 kΩ
Not compliant! But the TJA1020
can be used with the ISO 9141
diagnose tester pull-up.
ECU / LIN slave
> 100 kΩ
20 kΩ to
60 kΩ
Not compliant! LIN transceivers
are typically implemented with an
integrated LIN slave resistor.
Transmission rate
10.4 kbit/s
1 kbit/s to
20 kbit/s
√
Slew rate / slope time
< 10 % TBIT = 9.6 µs
0.5 V/µs to
3 V/µs;
3.5 µs to
22.5 µs
Not compliant! The timing of
TJA1020 is according to LIN
(Ref. 2), which results in better
EMC compared to ISO 9141
(Ref. 3).
Capacitance
Resistance
Timings
Although the LIN physical layer is not fully compatible to the ISO standard, in practice a
LIN transceiver can be used in K-Line networks. Only the number of K-Line nodes could
be limited, if LIN transceivers have been applied. In a K-Line bus the overall network load
is mainly caused by the diagnose tester (the master in a K-Line bus (Ref. 3)), which is
terminated with a pull-up of RTESTER = 510 Ω. But each LIN transceiver with integrated
LIN slave resistor RSLAVE, like the TJA1020, will cause a decrease of the K-Line network
resistance. The K-Line network resistance reduction can be calculated with following
equation:
Minimum K-Line network load:
R K ( BUS – BAT ),min
R SLAVE,min
R TESTER,min × --------------------------N
= ---------------------------------------------------------------R SLAVE,min
R TESTER,min + --------------------------N
with
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RTESTER = minimum diagnose tester pull-up resistor
RSLAVE,min = minimum LIN slave pull-up resistor
N = number of transceivers with integrated LIN slave resistor
Thus the maximum number of LIN transceivers in a K-Line bus is limited by the strength of
the weakest bus driver. The TJA1020 is specified for the minimum network resistance of
RL(LIN-BAT) = 500 Ω (Ref. 1). Nevertheless the bus driver of the TJA1020 can drive a lower
network resistance. The minimum bus resistance is RL(BUS-BAT),min = 450 Ω, which is
derived from the minimum bus driver current limitation IO(SC) (Ref. 1).
Though there are some deviations between the LIN and the ISO 9141 specification, the
TJA1020 is able to support the K-Line bus from functional point of view. From a formal
point of view, no LIN transceiver supports by 100 % the original ISO 9141-2 specification
(Ref. 3).
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3. Slave application
3.1 Set-up
A slave application of the LIN transceiver TJA1020 is shown in Figure 12. The protocol
controller (e.g. microcontroller) is connected to the LIN transceiver via a UART/SCI based
interface or standard I/O port pins. The TXD pin of the TJA1020 is the transmit data input
and the RXD pin is the receive data output. The sleep control input NSLP of the LIN
transceiver can be controlled by a microcontroller port pin. The TJA1020 provides an
internal slave termination resistor. Thus for a slave application no extra LIN bus
termination resistor is needed. The capacitor CSLAVE in Figure 12 is recommended in
order to improve the EME as well as EMI performance of the LIN system (see also
Section 4.4).
BAT
3.0V
CBAT
RWAKE1
... 5V
CVDD
LIN BUS LINE
VBAT
MICROCONTROLLER
RWAKE2
R*
RX
VDD
R*
TX
INH
RX0
RXD
TX0
TXD
Px.x
NSLP
GND
NWAKE
BAT
TJA1020
LIN TRANSCEIVER
LIN
GND
**
CSLAVE
* optional
** recommended
Fig 12. TJA1020 application example
3.2 Detailed pin description
3.2.1 NSLP pin
The sleep control pin NSLP provides an internal pull-down resistor RSLP to support a
defined input level in case of open circuit failures. A low level results in the Sleep mode
and reduces the power dissipation to a minimum. The range of the input threshold is
chosen to support 5 V as well as 3.0 V/3.3 V supplied devices. A typical NSLP pin
application is shown in Figure 13.
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µC
TJA1020
Px.x
NSLP
V
I
R
SLP
Fig 13. Typical NSLP pin application
The minimum drive capability of the microcontroller port pin for the NSLP pin can be
calculated with the following equation:
Min. high level port pin strength at VµC > VIH(SLP),min:
V IH ( SLP ),min
I HIGH ( µC ), min = ------------------------------ + I IL ( SLP ),max
R SLP,min
with (Ref. 1)
VIH(SLP),min = minimum NSLP HIGH-level input voltage
RSLP,min = minimum NSLP pull-down resistor
IIL(SLP),max = maximum NSLP LOW-level input current
The LIN slope operation modes (see Section 2.3), such as Normal and Low-slope mode,
depend on NSLP and TXD. Hence, it is recommended to connect NSLP to a
microcontroller port pin. Due to the undefined power-on rise timing between TXD and a
VCC source, NSLP connected to a VCC source would result in an undefined LIN slope
operation mode. Therefore, it is dissuaded to connect NSLP directly to a VCC supply
source.
3.2.2 TXD pin
3.2.2.1
Wake-up source recognition
The TXD pin is a bi-directional pin. In Normal-slope and Low-slope mode it is used as
transmit data input whereas in Standby mode the wake-up source is signalled. Here an
active low output of the TXD pin indicates a local wake-up event on the NWAKE pin. If a
local wake-up source at the NWAKE pin is used, a pull-up behavior at pin TXD is required.
This pull-up can be achieved in two ways:
1. The microcontroller port pin provides an integrated pull-up RTX(µC) (see Figure 14a)
2. An external pull-up resistor RTX(ext) towards the local VCC is connected (see
Figure 14b)
In case no local wake-up source is present (NWAKE is unused), no external pull-up
resistor is required. Then TXD will never be pulled to a strong low level by the TJA1020.
If the local wake-up feature (NWAKE) of the TJA1020 is used, the required pull-up
strength of the external pull-up RTX is defined by:
1. The drive capability of the integrated wake-up source transistor pulling TXD to low in
case of a local wake-up event and
2. The integrated TXD pull-down resistor RTXD (Ref. 1) of the TJA1020
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The required strength of the microcontroller port pin as well as the value of the pull-up
resistor RTX can be calculated by the following equations:
Min. high level pull-up current at VTX(µC) > VIH(TXD),min:
V IH ( TXD ),min
I HIGH ( RTX ),min = ------------------------------- + I IL ( TXD ),max
R TXD,min
Max. low level pull-up current at VTX(uC) < VIL(TXD),max:
V IL ( TXD ),max
I LOW ( RTX ),max = -------------------------------I OL ( TXD ),min with VTXD = 0.4 V
V TXD
Range of pull-up resistor:
R TX ,min < R TX < R TX ,max with
VCC max – V IL ( TXD ),max
VCC min – V IH ( TXD ),min
and R TX ,max = --------------------------------------------------------R TX ,min = ---------------------------------------------------------I LOW ( RTX ),max
I HIGH ( RTX ),min
with (Ref. 1)
VIH(TXD),min = minimum TXD HIGH-level input voltage
VIL(TXD), max = maximum TXD Low-level input voltage
RTXD,min = minimum TXD pull-down resistor
IIL(TXD),max = maximum TXD LOW-level input current
IOL(TXD),min = minimum TXD LOW-level output current
Remark: For LIN the signal symmetry of the falling and rising transition on TXD has an
impact on the overall system tolerances. Thus it is recommended to keep the RC-load
time constant on the TXD input as small as possible.
Example: If the supply voltage of the microcontroller (VCC = VCCmin = VCCmax) is 5 V, then
the range of the pull-up resistor RTX is:
VCC max – V IL ( TXD ),max
= 1.4 kΩ with
R TX ,min = ---------------------------------------------------------I LOW ( RTX ),max
V IL ( TXD ),max
I LOW ( RTX ),max = -------------------------------I OL ( TXD ),min = 3 mA
V TXD
VCC min – V IH ( TXD ),min
R TX ,max = ---------------------------------------------------------- ≈ 140 kΩ with
I HIGH ( RTX ),min
V IH ( TXD ),min
I HIGH ( RTX ),min = ------------------------------- + I IL ( TXD ),max = 21 µA
R TXD,min
A recommended value for the pull-up resistor RTX is 2.2 kΩ.
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µC
VCC
TJA1020
µC
TJA1020
VCC
R
R
TX(ext)
TX(uC)
TXD
TXD
VI
TX
TX
VI
RTXD
RTXD
a. for µC with internal programmable pull-up
b. for µC without internal pull-up
Fig 14. Typical TXD pin application
The open drain output as well as the maximum value of the input threshold VIH(TXD)
(Ref. 1) are designed to support 3.0 V/3.3 V as well as 5 V microcontroller derivatives.
Thus 3.0 V/3.3 V microcontroller derivatives without 5 V tolerant ports can be used for the
TJA1020.
3.2.2.2
Open circuit handling
The TXD pin provides an internal weak pull-down resistor RTXD (Ref. 1) to ensure a
defined input level in case of open circuit failures. Although this TXD input level is
dominant, the TXD dominant time-out function prevents the LIN bus from being clamped
to a dominant level by disabling the transmitter. Furthermore the weak pull-down allows
providing an output level free TXD pin.
3.2.3 RXD pin
The receive data output RXD provides an open drain behavior in order to get an output
level, which can be adapted to the microcontroller supply voltage. Thus 3.0 V/3.3 V
microcontroller derivatives without 5 V tolerant ports can be used. In case the
microcontroller port pin does not provide an integrated pull-up, an external pull-up resistor
connected to the microcontroller supply voltage VCC is required. In Figure 15 typical RXD
applications are shown.
µC
VCC
TJA1020
µC
TJA1020
VCC
R
R
RX(ext)
RX(uC)
RXD
RXD
RX
RX
a. for µC with internal programmable pull-up
b. for µC without internal pull-up
Fig 15. Typical RXD pin application
The minimum pull-up resistor RRX,min is defined by the drive capability of the TJA1020’s
RXD output pin. The maximum pull-up resistor RRX,max depends on the maximum delay of
the rising edge trPropRX caused by the RC-load on RXD:
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Range of pull-up resistor:
R RX ,min < R RX < R RX ,max with
VCC max – V LOW ( RX ),max
V RXD
R RX ,min = -------------------------------------------------------------- × ------------------------------- , V RXD = 0.4 V and
V LOW ( RX ),max
I OL ( RXD ),min
t rPropRX ,max
R RX ,max = --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------,
VCC min


( C RX ( ext ),max + C RX ( µC ),max + C RXD,max ) × 1n ------------------------------------------------------------- VCC min – V HIGH ( RX ),min
VCC min – V HIGH ( RX ),min
where R RX ,max ≤ -------------------------------------------------------------- , t rPropRX ,max = 3 µs and C RXD,max = 5 pF
I LH ( RXD ),max
with
ILH(RXD),max = maximum RXD HIGH-level leakage current (Ref. 1)
IOL(RXD),min = minimum RXD LOW-level output current (Ref. 1)
VHIGH(RX),min = minimum µC port pin (RX) HIGH-level input voltage
VLOW(RX),max = maximum µC port pin (RX) LOW-level input voltage
CRX(µC),max = maximum µC port pin (RX) capacitance
CRX(ext), max = maximum external capacitance
Remark: For LIN the signal symmetry of the falling and rising transition on RXD has an
impact on the overall system tolerances. Thus it is recommended to keep the RC-load
time constant on the RXD output as small as possible, but due to the driver strength of the
RXD output the pull-up resistor RRX should not be below 1 kΩ.
Example: If the supply voltage of the microcontroller (VCC = VCCmin = VCCmax) is 5 V, the
microcontroller port input threshold voltage range is from VLOW(RX),max = 0.8 V to
VHIGH(RX),min = 2 V and the microcontroller port capacitance is
CRX,max = CRX(µC),max + CRX(ext),max = 15 pF, then the range of the pull-up resistor RRX is:
VCC max – V LOW ( RX ),max
V RXD
R RX ,min = -------------------------------------------------------------- × ------------------------------- = 1.4 kΩ
V LOW ( RX ),max
I OL ( RXD ),min
t rPropRX ,max
R RX ,max = --------------------------------------------------------------------------------------------------------------------------------------- ≈ 290 kΩ
VCC min
( C RX ,max + C RXD,max ) × ln  --------------------------------------------------------------
 VCC min – V HIGH ( RX ),min
VCC min – V HIGH ( RX ),min
R RX ,max = 290 kΩ ≤ -------------------------------------------------------------- ≈ 600 kΩ
I LH ( RXD ),max
A recommended value for the pull-up resistor RRX is 2.2 kΩ in order to keep the RC-load
time constant low at the RXD pin.
3.2.4 NWAKE pin
The local wake-up input NWAKE is used to detect local wake-up events using a falling
edge. This falling edge has to be followed by a continuous low level of at least tNWAKE in
order to successfully pass the integrated EMI filter. The NWAKE pin provides an internal
weak pull-up current source IIL(NWAKE) (Ref. 1) towards battery, which defines a high pin
level in case of open circuit failures. It is recommended to connect an external pull-up
resistor RWAKE1 to provide sufficient current for an external wake-up switch or transistor. In
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TJA1020 LIN transceiver
case the wake-up source (switch or transistor) at NWAKE has a different ground path than
the TJA1020, it is recommended to add a series resistor RWAKE2 between the NWAKE pin
and the wake-up source. If the ECU has lost its ground while the wake-up source is still
connected to ground, the series resistor RWAKE2 protects the ECU against a reverse
current supply through the internal protection diodes of NWAKE. Figure 16a shows a
typical NWAKE pin application for local wake-up via external switch.
The pull-up resistor RWAKE1 depends only on the required current of the wake-up source
(switch or transistor), whereas the series resistor RWAKE2 is mainly defined by the
applications ground shift between the ECU and the external wake-up source. The
following equations show how to calculate the recommended series resistor:
Range of series resistor:
V BAT ,max
R wake2,min < R WAKE2 < R WAKE 2,max with R WAKE 2,min = --------------------------- and
I NWAKE,min
V IL ( NWAKE ),max – V GND – shift
with e.g. V GND – shift = 1.5 V
R WAKE2,max = ---------------------------------------------------------------------------I IL ( NWAKE ),min
with (Ref. 1)
VIL(NWAKE),max = maximum NWAKE LOW-level input voltage
IIL(NWAKE),min = minimum NWAKE pull-up current
INWAKE,min = minimum NWAKE output current (limiting value)
Example: For a maximum ground-shift of VGND-shift = 1.5 V and a battery voltage range of
VBAT = 5 V to 27 V is the range of RWAKE2:
V BAT ,max
R WAKE2,min = --------------------------- = 1.8 kΩ
I NWAKE,min
V IL ( NWAKE ),max – V GND – shift
R WAKE2,max = ---------------------------------------------------------------------------- ≈ 6.6 kΩ
I IL ( NWAKE ),min
Therefore a typical value for the series resistor RWAKE2 is 3 kΩ.
If no local wake-up is required for the application the NWAKE pin can be left open, due to
the internal pull-up and filter behavior. Nevertheless it is recommended to connect the
NWAKE pin directly to the BAT pin (see Figure 16b), if not used.
TJA1020
BAT
VBAT
RWAKE1
VBAT
IIL
RWAKE2
NWAKE
TJA1020
BAT
IIL
VI
a. for local wake-up via external switch
NWAKE
VI
b. for applications without local wake-up
Fig 16. Typical NWAKE pin application
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Application note
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TJA1020 LIN transceiver
The TJA1020 provides also hardware compatibility to other LIN transceiver
implementations, which have a VCC supply input instead of a local wake-up input at pin 3.
Therefore the wake-up threshold of the NWAKE input is defined to be above 5 V. Thus this
pin can be connected to the applications VCC supply without forcing a wake-up event in
case VCC drops down (e.g. system Sleep mode). Nevertheless this would cause a small
extra current consumption IIL(NWAKE) (Ref. 1) (internal weak current source) of the system.
3.2.4.1
Wake-up after power-on
After power-on the TJA1020 enters directly the Sleep mode keeping INH on floating
condition and thus the supply of the LIN node disabled. This behavior reduces the total
power-on peak current of a LIN sub-system.
Nevertheless in some applications a LIN node needs to be waked up autonomously after
powering-up. This can be achieved with a RC-combination on NWAKE (see Figure 17b).
During power-on such an RC-combination can generate a local wake-up by keeping the
NWAKE input voltage VNWAKE below VIL(NWAKE),max (Ref. 1) for at least tNWAKE,max (Ref. 1).
The circuit in Figure 17a provides a solution for both, a local wake-up via external switch
and an autonomous wake-up after power-on. For the calculation of RWAKE1 and RWAKE2
see Section 3.2.4.
IIL
RWAKE2
VI
IIL
NWAKE
VI
CWAKE
CWAKE
NWAKE
TJA1020
BAT
VBAT
RWAKE
RWAKE1
TJA1020
BAT
VBAT
a. for local wake-up via external switch
b. for applications without local wake-up
Fig 17. Typical NWAKE pin application to wake-up after power-on
Figure 18 shows the relation between the battery voltage VBAT and the resulting NWAKE
voltage VNWAKE during power-on, and it shows its constraints to wake-up the TJA1020.
The RC-combination can be calculated by the following rule:
RC time constant to wake-up after power-on:
R WAKE × C WAKE = t BAT – ON ,max > 2t NWAKE,max
with
tNWAKE,max = maximum dominant time to wake-up via NWAKE (Ref. 1)
tBAT-ON,max = maximum power-on ramp-up time of VBAT
Example: Assuming the maximum power-on ramp-up time tBAT-ON,max is 1 ms and the
pull-up resistor RWAKE should be 10 kΩ, then CWAKE is:
t BAT – ON ,max
C WAKE = ------------------------------- = 100 nF with t BAT – ON ,max = 1 ms > 2t NWAKE,max = 100 µs
R WAKE
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Application note
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AN00093
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TJA1020 LIN transceiver
V
W
N
V
W
N
E
K
A
<
ax
,m
E)
K
A
V I L(
VBAT
VNWAKE
V
IL(NWAKE),max
t
t
BAT-ON,max
t
@(VNWAKE < VIL(NWAKE),max)
> tNWAKE,max
tNWAKE,max
tNWAKE,min
Sleep
mode transion
Standby
Fig 18. Timing to wake-up after power-on
3.2.5 INH pin
3.2.5.1
INH controlled voltage regulator
The output pin INH is a battery related open drain output to control an external voltage
regulator. Therefore an external pull-down resistor RINH connected to ground is necessary.
This pull-down is typically integrated within the voltage regulator itself. A typical INH pin
application is shown in Figure 19a.
Voltage
Regulator V
INPUT
VBAT
TJA1020
BAT
Voltage
Regulator
VBAT
TJA1020
BAT
VINPUT
INH
INH
INH
RINH
a. for voltage regulators with inhibit input
b. for voltage regulators without inhibit input
Fig 19. Typical INH pin application
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Application note
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The range of the pull-down resistor RINH can be calculated with the equations below:
Range of pull-down resistor:
V BAT ,max
R INH ,min < R INH < R INH ,max with R INH ,min = ---------------------- for IINH,max see Section 3.2.5.2.
I INH ,max
V LOW ( VoltReg ),max
R INH ,max = -------------------------------------------I LH ( INH ),max
with
ILH(INH),max = maximum INH HIGH-level leakage current (Ref. 1)
VLOW(VoltReg),max = maximum inhibit LOW-level input voltage (volt regulator)
3.2.5.2
Direct voltage regulator supply
Due to the INH drive capability, the TJA1020 is able to supply a voltage regulator directly.
Figure 19b shows the typical INH pin application of such a slave application.
The maximum supply current through the INH pin IINH,max for the voltage regulator and the
maximum voltage drop VDROP can be calculated by the equations below:
Max. voltage regulator supply current through INH:
I INH ,max =
P max – P Q,max – P TX ,max
------------------------------------------------------------- with I INH ,max ≤ 50 mA
R SW ( INH ),max
T vj,max – T amb,max
P max = --------------------------------------------R th ( j – a )
Max. voltage drop at INH:
V DROP = R SW ( INH ),max × I INH ,max
with
PQ,max = maximum quiescence power dissipation (Normal-slope mode, bus recessive,
VINH = VBAT), see Figure 20
PTX,max = maximum transmitter power dissipation (Normal-slope mode, transmission
duty cycle = 50 %, VINH = VBAT), see Figure 20
RSW(INH),max = maximum switch-on resistance between BAT and INH (Ref. 1)
and
Tvj,max = maximum virtual junction temperature (K) (Ref. 1)
Tamb,max = maximum ambient temperature (K)
Rth(j-a) = thermal resistance (K/W) (Ref. 1)
Remark: Independently from the above calculation the current through the INH pin IINH
should not exceed 50 mA.
The power dissipation depends on the supply voltage VBAT and the baud rate. Figure 20
shows the quiescence power dissipation PQ and the transmitter power dissipation PTX of
the TJA1020 as the function of the supply voltage VBAT. A worst case duty cycle of 50 %
and a worst case LIN bus load (RL = 500 Ω, CL = 10 nF) are used for the transmitter power
dissipation PTX in Figure 20.
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Application note
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The thermal resistance Rth(j-a) (Ref. 1) is the ability of an IC package to conduct heat to its
environment and is typically specified for free air conditions. Within real applications the
use of large copper planes attached to pin GND can reduce the thermal resistance and
therefore increase the maximum INH current IINH,max.
P [mW] 140
PTX,max @ 20kBaud
120
100
PTX,max @ 10kBaud
80
PTX,max @ 5kBaud
60
PQ,max
40
20
0
5
10
15
20
25
30
VBAT [V]
Fig 20. Power dissipation in Normal-slope mode
3.2.6 LIN pin
The pin LIN is used to transmit and receive data on the LIN bus line. A low side switch with
controlled wave shaping is used for bit transmission while an integrated receive
comparator (receiver) converts the LIN bus voltage back to a binary signal. The threshold
of the receiver Vth(rx) (Ref. 1) is battery related and has a hysteresis of Vthr(hys) (Ref. 1).
The LIN pin has a weak pull-up current source of IIL(LIN) (Ref. 1) and a slave termination
resistor of RSLAVE (Ref. 1) in parallel to BAT. The slave termination resistor and the current
source as well as the low side switch are implemented with a reverse current diode (see
also Figure 21). Thus no external components are required. Nevertheless, improvement
of EME and EMI can be achieved by applying a capacitive load at the LIN bus line as
shown in Figure 12.
The current source of IIL(LIN) (Ref. 1) is used as an additional weak pull-up, because the
slave termination resistor RSLAVE (Ref. 1) is switched off in Sleep mode. Thus a transition
into the Sleep mode minimizes the current consumption in case of LIN short-circuit to
ground (see Section 9.2).
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4. Master application
A master application differs from a slave application mainly with respect to the external
master termination resistor RMASTER (Ref. 2). The capacitance load CMASTER (Ref. 2) is
recommended in order to improve EME as well as EMI (see also Section 4.4). The
TJA1020 provides several master application solutions, which are described in
Section 4.1 to Section 4.4.
4.1 Master termination directly to BAT
This master application is realized by a reverse current diode in series with the resistor
RMASTER (Ref. 2) connected between LIN and BAT as shown in Figure 21.
Such a master application solution does not provide fail-safe system behavior in case the
LIN bus is erroneously shorted to ground. This short-circuit current cannot be switched off,
and will discharge the battery continuously.
LIN
RSLAVE
RMASTER
IIL
CMASTER *
LIN BUS LINE
TJA1020
BAT
VBAT
Filter
Vthr
*recommended
Fig 21. Typical master termination
4.2 Master termination towards INH
For fail-safe reasons the TJA1020 supports an advanced master application solution
using the INH pin to drive the master termination resistor RMASTER (Ref. 2). As shown in
Figure 22 the master termination resistor in series with a reverse current diode is
connected to the INH pin instead of the BAT pin. The advantage of this application
solution is the ability to switch off the master termination by a transition into the Sleep
mode, thus solving the above mentioned short-circuit condition of LIN and ground.
Whenever the applications microcontroller detects a permanent dominant level on the LIN
bus line caused by a ground short-circuit, the microcontroller is able to minimize the power
dissipation by selecting the Sleep mode. Thus a transition into the Sleep mode switches
off the external voltage regulator, the master termination RMASTER (Ref. 2) as well as the
internal slave termination RSLAVE (Ref. 1). Only the internal weak pull-up current source
IIL(LIN) (Ref. 1) and the internal current consumption of the TJA1020 determine the
remaining current consumption of a LIN node in such a failure case (see also Section 9.2).
AN00093_2
Application note
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Philips Semiconductors
TJA1020 LIN transceiver
VBAT
Voltage
Regulator
BAT
TJA1020
INH
RSLAVE
IIL
LIN
Vthr
Filter
CMASTER*
LIN BUS LINE
RMASTER
INH
*recommended
Fig 22. Advanced master termination through the INH pin
4.3 Master termination split between INH and BAT
Since the advanced master termination in Section 4.2 provides a fail-safe system
behavior but high LIN bus impedance in Sleep mode, a combination of the terminations
concepts in Section 4.1 and Section 4.2 can be an option, if a higher short-circuit current
at the LIN bus can be tolerated (see Figure 23).
BAT
VBAT
Voltage
Regulator
TJA1020
INH
IIL
CMASTER*
LIN
RSLAVE
RMASTER-INH
RMASTER-BAT
LIN BUS LINE
INH
Filter
Vthr
*recommended
Fig 23. Trimmed master termination
The resistors RMASTER-BAT and RMASTER-INH in parallel determine the master termination
while the TJA1020 is in its modes: Standby, Normal-slope and Low-slope. In Sleep mode
the master termination is determined by RMASTER-BAT. Therefore the maximum LIN bus
short-circuit current ISC,max can be trimmed by RMASTER-BAT:
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Application note
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TJA1020 LIN transceiver
V BAT ,max
R MASTER – BAT = ---------------------I SC ,max
R MASTER – BAT × R MASTER
R MASTER – INH = ---------------------------------------------------------------with R MASTER = 1 kΩ
R MASTER – BAT – R MASTER
4.4 Master termination for LIN networks with different supplied LIN nodes
In mixed-supplied LIN networks, where the supply of some slave nodes are ignition key
controlled (clamp 15) while others are permanently connected to battery (clamp 30),
unsupplied slave nodes (ignition key off) represent pull-down loads on the LIN bus. Thus it
is recommended to apply the trimmed master termination (see Figure 23). With the
trimmed master termination the pull-up during Sleep mode RMASTER-BAT can be adapted
to the pull-down behavior of unsupplied slaves.
For the LIN bus an unsupplied TJA1020 represents in worst case a pull-down load of a
diode with a forward biased voltage of VDS = 2 V in series with a high-impedance resistor
of RS = 300 kΩ. Figure 24 shows an example of a mixed-supplied network with two
unsupplied slave nodes with TJA1020 transceiver applied.
BAT
Unsupplied
TJA1020
VBattery
TJA1020
LIN
VDS
RS
TJA1020
IIL
RSLAVE
INH
RMASTER-INH
BAT
Unsupplied
VDM
BAT
LIN
CMASTER*
Unsupplied Slave Node
RMASTER-BAT
RS
VDP
LIN BUS LINE
VDS
SLAVE NODE POWER LINE
LIN
Master Node
*recommended
Unsupplied Slave Node
Fig 24. Different supplied slave nodes (simplified transceiver circuitry)
The maximum master termination resistor RMASTER-BAT can be calculated with the
following equation:
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Application note
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TJA1020 LIN transceiver
( V Battery – V DP – V DM – V LIN ,rec ) × R S
1
R MASTER – BAT ≤ min  -------------------------------------------------------------------------------------------------- × ---- , where V DS = 2 V

 N
V LIN ,rec – V DS + R S × I LEAK
and R S = 300 kΩ
with
VDP = forward biased voltage of protection diode
VDM = forward biased voltage of reverse current master diode
VLIN,rec = recessive LIN bus voltage
ILEAK = leakage current from LIN bus to ground (e.g. plug leakage current)
N = number of unsupplied slaves nodes
Example: In a mixed-supplied LIN network with 2 unsupplied TJA1020 connected to the
LIN bus it is assumed that both diodes, the protection diode as well as the reverse current
diode, have a forward biased voltage of VDP = VDM = 1 V, and the recessive LIN bus
voltage VLIN,rec shall remain above 0.75 VBAT (VBAT = VBattery − VDP). A LIN bus leakage
current to ground of ILEAK ≤ 10 µA per unsupplied node is expected. Then for the battery
voltage range of VBattery = 8 V to 18 V the maximum master termination resistor is:
( V Battery – V DP – V DM – V LIN ,rec ) × R S
1
R MASTER – BAT ≤ min  -------------------------------------------------------------------------------------------------- × ---- = 18 kΩ

 N
V LIN ,rec – V DS + R S × I LEAK
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Application note
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5. EMC aspects
5.1 EME - network design hints
The LIN physical layer is a single-wire, wired AND bus with a battery related recessive
level. Here, no compensation effect of the electromagnetic field is present as known from
dual-wire concepts making use of differential signals (e.g. high-speed CAN). Thus a
smooth output wave shaping becomes more important. The ElectroMagnetic Emission
EME depends mainly on the falling and rising slope of the LIN bus waveform. The
smoother these slopes are the more EME reduction can be achieved.
The TJA1020 provides a slope control adjustment by modifying the capacitive load
(CMASTER (Ref. 2) or CSLAVE (Ref. 2)) on the LIN bus. The slope decreases with increasing
capacitive load. Therefore increasing the total network capacitance (CBUS = CMASTER +
n × CSLAVE + CLINE (Ref. 2)) can further reduce the EME. For very high bit rates close to
20 kBaud the LIN bus slope times have also impacts to system tolerances such as ground
shift. Thus the time constant τ of the overall system shall not exceed its specified
maximum τmax (Ref. 2). Further it is not recommended to make use of the maximum
allowed capacitive load CBUS,max (Ref. 2) at very high bit rates in order to keep some
safety margin for the system.
V
Battery
Slave 1
MASTER
Master
R
1k
R
R
SLAVE
SLAVE
TJA1020
LINE
SLAVE
C'
C
TJA1020
SLAVE
C
MASTER
C
TJA1020
R
SLAVE
Slave N
Fig 25. LIN network loads
In a LIN network the master resistor RMASTER (Ref. 2) and the slave resistors RSLAVE
(Ref. 2) are accurately defined by the LIN standard (Ref. 2). No variation is allowed. Also
the specified slave capacitance CSLAVE (Ref. 2) provides almost no room for network
optimizations. Only the master capacitor CMASTER (Ref. 2) can be used to tune the LIN
bus signal in either way.
For EME as well as for EMI a big network capacitance is of advantage. Thus the
maximum master capacitance CMASTER,max is of interest. CMASTER,max can be calculated
with following equations:
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τ max
C MASTER,max = ---------------------- – N × C SLAVE – LEN BUS × C′ LINE with
R BUS,max
R SLAVE ,max
R BUS,max = R MASTER,max || ---------------------------N+1
with
τmax = maximum time constant of overall LIN network (Ref. 2)
RMASTER,max = maximum LIN master termination resistor (Ref. 2)
RSLAVE,max = maximum LIN slave termination resistor (Ref. 1)
CSLAVE = LIN slave capacitance (Ref. 2)
C’LINE = LIN bus line capacitance (Ref. 2)
LENBUS = overall bus line length (Ref. 2)
N = number of slaves nodes
Example: Assuming a 6-node LIN network with a capacitance of 220 pF per slave and an
overall network length of 8 m with a line capacitance of 80 pF/m. It results in a maximum
master capacitance of
R SLAVE ,max
R BUS,max = R MASTER,max || ---------------------------- = 965 Ω
N+1
τ max
C MASTER,max = ---------------------- – N × C SLAVE – LEN BUS × C′ LINE = 3.44 nF
R BUS,max
In this example a master capacitor of CMASTER = 3.3 nF is recommended.
5.2 EME - Low-slope mode
The curve shaping of the LIN bus signal in Normal-slope mode is optimized for the
maximum specified LIN transmission speed of 20 kBaud. Thus for low speed LIN
applications (e.g. 4.8 kBaud) the curve shaping in Normal-slope mode has unnecessary
steep slopes. Therefore the TJA1020 provides the Low-slope mode (see Section 2.3.4)
with reduced slopes (see Figure 10). These reduced slopes result in a further reduction of
EME.
5.3 EMI - capacitive load
A capacitor on the LIN bus pin reduces the impact of RF-interferences. Thus it is
recommended to provide a capacitor (e.g. CMASTER/SLAVE = 220 pF) from LIN to ground at
each node.
AN00093_2
Application note
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TJA1020 LIN transceiver
6. ESD - aspects
6.1 General design hints for ESD levels beyond ±4 kV HBM
The on-chip ESD protection of pin LIN of the TJA1020 is designed to withstand
Vesd(HBM) = ±4 kV according to the Human Body Model (HBM) JESD22-A114-B (100 pF /
1.5 kΩ). External ESD protection on the LIN bus connection is recommended if the
TJA1020 is subjected to ESD-pulses of more than Vesd(HBM) = ±4 kV (Ref. 1) or if another
ESD Model (e.g. IEC 61000-4-2 (Ref. 4)) is applied. Figure 26 shows a set-up for such
external ESD protection.
The clamping voltage VCLAMP of the ESD protection diodes should be chosen above the
maximum battery voltage in order not to be damaged, in case the LIN bus line is shorted
to the battery line. Furthermore, the positive clamping voltage VCLAMP-POS should be
below the maximum LIN bus voltage VLIN,max = 40 V (Ref. 1) and the negative clamping
voltage VCLAMP-NEG should be above the minimal LIN bus voltage VLIN,min = −27 V
(Ref. 1).
According to the LIN Specification Rev. 1.3 (Ref. 2), the LIN slave node capacitance shall
be less than CSLAVE,max = 250 pF to ground. Together with the inherent capacitance of an
ESD-protection device (e.g. suppressor diode) this requirement (< 250 pF) must be
fulfilled.
The ferrite LFERRITE between LIN capacitor and the ESD protection diodes serves for
minimizing the current of the first ESD peak.
The suppressor diodes DPOS and DNEG should be placed as close as possible to the
connectors, whereas the LIN node capacitor CMASTER/SLAVE and the ferrite LFERRITE
should be placed close to the LIN transceiver’s bus pin.
Power Application (e.g. electro motor, inductive loads)
**
Application
(e.g. voltage regulator + microcontroller)
BAT
LFERRITE*
LIN
TJA1020
CMASTER/SLAVE
GND
DPOS*
DNEG*
LIN Node Connector
CBAT
* optional
** recommended
Fig 26. External ESD-protection set-up
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TJA1020 LIN transceiver
6.2 ESD protection example for ESD model according to IEC 61000-4-2
(Ref. 4)
The maximum peak current an ESD protection diode has to withstand depends on the
maximum ESD voltage and the applied ESD model. Thus, with a capacitor of 150 pF
charged to 10 kV and a discharge resistor of 330 Ω a theoretical peak current of 30 A
occurs. The discharge time constant will be about 50 ns.
Table 3 shows the ESD results achieved with the respective proposed protection
elements. The protection is based on the ESD protection diode PESD1LIN (Ref. 5), which
is especially designed to fulfill the demands of LIN bus lines. The PESD1LIN contains the
two diodes DPOS and DNEG (see Figure 26) in one package. In Table 3 VESD corresponds
to the ESD voltage the TJA1020 withstands without being damaged.
Table 3:
ESD voltage the TJA1020 withstands without being damaged
VESD (150 pF / 330 Ω)
Applied components
CMASTER/SLAVE
LFERRITE
DPOS
-
-
PESD1LIN (Philips)
±5.0 kV
-
BLM18BD102SH1 (muRata) PESD1LIN (Philips)
±7.5 kV
-
MMZ1608Y102B (TDK)
PESD1LIN (Philips)
±7.0 kV
220 pF
-
PESD1LIN (Philips)
±5.5 kV
220 pF
BLM18BD102SH1 (muRata) PESD1LIN (Philips)
±7.5 kV
220 pF
MMZ1608Y102B (TDK)
PESD1LIN (Philips)
±7.0 kV
220 pF
MMZ2012Y202B (TDK)
PESD1LIN (Philips)
±8.5 kV
AN00093_2
Application note
DNEG
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7. Transceiver control
The modes of the TJA1020 are controlled by the pins NSLP and TXD. The following
chapters describe the mode control of TJA1020 and how to deal with LIN bus failures.
The transceiver control can be split into two basic applications:
• The microcontroller power supply is controlled via the INH pin of the TJA1020
• Independent of the TJA1020’s modes the microcontroller is permanently supplied
7.1 INH controlled microcontroller power supply
After a local or remote wake-up the Standby mode is entered automatically. As a result the
INH pin outputs a battery related high level and thus switches on the external voltage
regulator. In consequence the microcontroller becomes supplied and starts with its
initialization. The TJA1020 indicates the wake-up event by an active low at RXD.
Depending on the use of the NWAKE pin two different software-flows for mode control are
recommended:
7.1.1 Applications using NWAKE
The TJA1020 allows distinguishing between different wake-up sources using the TXD pin.
Thus the TXD pin needs to be applied with a pull-up behavior as described in
Section 3.2.2. This pull-up behavior is required to sense the TJA1020’s pull-down
transistor at TXD, which becomes active after a local wake-up event via NWAKE. Thus the
wake-up source can be distinguished by reading the TJA1020’s TXD pin.
To distinguish between Normal-slope mode and Low-slope mode the TJA1020’s TXD pin
is used. The Normal-slope mode is entered if TXD carries a high level after NSLP is set
high. TXD gets high automatically after a local wake-up event if the corresponding
microcontroller port pin is configured to be input (weak high) because the wake-up source
information is cleared immediately with setting NSLP to high level. The mode change itself
is performed holding NSLP high for at least tgotonorm (Ref. 1) (see also the timing in
Figure 9).
Remark: There is no software timing constraint required for setting the microcontroller
port pin TX to high output after setting NSLP to high, because the local wake-up source
information at TXD is cleared immediately with setting NSLP to high level, whereas the
mode transition itself executes after tgotonorm (Ref. 1).
To enter the Low-slope mode the microcontroller TX port pin is simply set low before the
NSLP input pin of the TJA1020 gets a high level.
Figure 27 shows the related software flow of a Standby to Normal/Low-slope transition.
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Wake-up Event:
VCC
µC
RTX
TJA1020 sets INH
TJA1020
to HIGH
(Standby mode)
TXD
TX
R
TXD
VCC ramps up
Px.x
NSLP
µC starts
RSLP
operation
Note:
High-ohmic pull-up
Set TX as
The time the TX pin of the microcontroller
input behavior for TX
Input
(see also the note)
is program m ed to be input, it behaves
high-ohm ic . S o t he ext ernal pull-up
behavior is required to pull this pin high in
Read TX Input
case a remote wake-up has occurred via
LIN.
Normal slope
Read wake-up
source
Low slope
Mode?
Executes mode
Set Px.x to
Set TX to
transition via NSLP
HIGH output
LOW output
Prepares TX to
enter Low slope
mode
Prepares TX for
Set TX to
Set Px.x to
Executes mode
data transmission
HIGH output
HIGH output
transition via NSLP
TJA1020 is in
Set TX to
Prepares TX for
Normal slope
HIGH output
data transmission
mode
TJA1020 is in
Low slope
mode
Fig 27. Flow diagram of Standby to Normal/Low-slope transition, using NWAKE
7.1.2 Applications without using NWAKE
In case no local wake-up source is present the hardware becomes simpler because the
TXD pin of the TJA1020 behaves as input only. Thus the weak pull-up behavior as
described in Section 7.1.1 is not required.
The software flow is shown within Figure 28. Here the TXD input of the TJA1020 defines
the next mode before the NSLP input is set to a high-level.
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Wake-up Event:
µC
TJA1020 sets INH
TJA1020
to HIGH
(Standby mode)
TX
TXD
RTXD
VCC ramps up
Px.x
NSLP
RSLP
µC starts
operation
Normal slope
Low slope
Mode?
Prepares TX to
enter Normal slope
mode
Set TX to
Set TX to
HIGH output
LOW output
Prepares TX to
enter Low slope
Set Px.x to
Executes mode
HIGH
transition via NSLP
mode
Prepares TX for data
Set TX to
transmission (only required
HIGH output
for Low slope mode)
TJA1020 is in
Normal slope or
Low slope mode
Fig 28. Flow diagram of Standby to Normal/Low-slope transition, NWAKE not used
7.2 Permanently supplied microcontroller
In some applications the TJA1020 is not used to control the power supply of the
microcontroller. Thus the INH pin is unused, respectively used for another purpose. For
such applications the TJA1020 allows a direct transition from Sleep mode into
Normal-slope mode or Low-slope mode.
Depending on the use of the NWAKE pin two different software-flows for mode control are
recommended:
7.2.1 Application using NWAKE
Here the same flow is used as described within Section 7.1.1. The only difference is that
no initialization phase is performed, because the microcontroller is already running.
Figure 29 shows the related software flow diagram with respect to the pin description of
TXD in Section 3.2.2.
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Application note
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TJA1020 LIN transceiver
TJA1020 is in
VCC
µC
RTX
TJA1020
Sleep mode
High-ohmic input
(TX is set as
behavior for TX
Input)
TXD
TX
VCC
RRX
RTXD
Read RX Input
Read wake-up flag
on RXD
RXD
RX
No wake-up event
RX LOW?
Wake-up event
NSLP
Px.x
Read TX Input
RSLP
Normal slope
Read wake-up
source on TXD
Low slope
Mode?
Executes mode
Set Px.x to
Set TX to
transition via NSLP
HIGH output
LOW output
Prepares TX to
enter Low slope
mode
Prepares TX for
Set TX to
Set Px.x to
Executes mode
data transmission
HIGH output
HIGH output
transition via NSLP
TJA1020 is in
Set TX to
Prepares TX for
Normal slope
HIGH output
data transmission
mode
TJA1020 is in
Low slope
mode
Fig 29. Flow diagram of Sleep to Normal/Low-slope transition, using NWAKE
7.2.2 Application without using NWAKE
Here the same flow is used as described within Section 7.1.2. The only difference is that
no initialization phase is performed, because the microcontroller is already running. The
corresponding software flow diagram is shown in Figure 30.
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Application note
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TJA1020 LIN transceiver
µC
TJA1020
TXD
TX
VCC
RRX
RTXD
RXD
RX
TJA1020 is in
Sleep mode
NSLP
Px.x
RSLP
Read RX Input
Normal slope
Read wake-up flag
on RXD
Low slope
Mode?
Prepares TX to
enter Normal slope
mode
Set TX to
Set TX to
HIGH output
LOW output
Prepares TX to
enter Low slope
Set Px.x to
Executes mode
HIGH
transition via NSLP
Set TX to
HIGH output
mode
Prepares TX for data
transmission (only required
for Low slope mode)
TJA1020 is in
Normal slope or
Low slope mode
Fig 30. Flow diagram of Sleep to Normal/Low-slope transition, NWAKE not used
7.3 Transition from Normal-slope/Low-slope into Sleep mode
The TJA1020 enters its Sleep mode if the NSLP input is becoming low for at least tgotosleep
(Ref. 1).
Depending on the use of the NWAKE pin two different software-flows for mode control are
recommended:
7.3.1 Application using NWAKE
If the NWAKE input of the TJA1020 is in use, the microcontroller port pin (e.g. TX) driving
the TXD pin of the TJA1020 should be configured as input or bi-directional before the
mode transition is executed by setting a low level on NSLP. This provides pull-up behavior
at pin TXD in case of wake-up events via NWAKE during mode transition towards Sleep
mode. Figure 31 shows the software flow diagram of a transition from Normal-slope mode
or Low-slope mode into Sleep mode with NWAKE support.
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TJA1020 LIN transceiver
VCC
µC
TJA1020
RTX
TJA1020 is in
Normal slope or
Low slope mode
TXD
TX
RTXD
VCC
Set TX as
R
RX
High-ohmic input
Input
RXD
behavior for TX
RX
Executes mode
Set Px.x to
transition towards
LOW output
Sleep mode via NSLP
NSLP
Px.x
RSLP
Read wake-up flag
Read RX Input
Wake-up event
on RXD
No wake-up event
RX LOW?
Restart
Software
TJA1020 disables
external voltage
regulator via INH
Fig 31. Flow diagram of Normal/Low-slope to Sleep transition, using NWAKE
7.3.2 Application without using NWAKE
In case the NWAKE pin is unused and no TXD pull-up behavior is provided (see also
Section 3.2.2.1), only the NSLP input should become low (see Figure 32). The ‘Set TX as
input’ step within the software flow diagram in Figure 31 should not be performed, since
the weak pull-down RTXD (Ref. 1) would cause a low level on TXD if the microcontroller
port pin TX is set into a high-impedance state without pull-up behavior. This would result
in a dominant level on the LIN bus until NSLP is set low or the TXD dominant time-out
phase is passed. Instead it is recommended to set TXD to high level via the
microcontroller port pin (e.g. TX).
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Application note
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TJA1020 LIN transceiver
TJA1020 is in
µC
TJA1020
Normal slope or
Low slope mode
TXD
TX
VCC
Set TX to
RTXD
Stop transmission
HIGH output
RRX
RXD
RX
Executes mode
Set Px.x to
transition towards
LOW output
Sleep mode via NSLP
NSLP
Px.x
RSLP
Read wake-up flag
Read RX Input
Wake-up event
on RXD
No wake-up event
RX LOW?
Restart
Software
TJA1020 disables
external voltage
regulator via INH
Fig 32. Flow diagram of Normal/Low-slope to Sleep transition, NWAKE not used
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TJA1020 LIN transceiver
8. Failure management
8.1 LIN bus short-circuit to ground
In case the LIN bus is shorted to ground a continuous current flows out of VBAT due to the
LIN termination. The TJA1020 allows to reduce this short-circuit current to a minimum
using its integrated termination control.
LIN bus short-circuit
detected with RXD dominant
time-out via
µC-software
RXD permanent dominant
is caused by short-circuit:
high short-circuit current
battery becomes discharged
bus termination and voltage
Set TJA1020 into Sleep mode
regulator are switched off:
low current consumption
battery is protected
Fig 33. Failure management if LIN bus is shorted to ground
Once the LIN bus is shorted to ground this can be detected in software monitoring the
continuous dominant level on RXD.
In order to reduce this failure current the TJA1020 is simply put into its Sleep mode, if not
needed anymore. This results in disabling the slave termination resistor RSLAVE (Ref. 1) as
well as the external master termination resistor RMASTER if connected to INH. Only an
internal weak pull-up current source IIL(LIN) (Ref. 1) remains active for the case of a LIN
bus failure recovery. So the INH-controlled master termination resistor RMASTER optimizes
the system with respect to fail-safe behavior. Thus the system enters its Low-power mode
(VCC off). The remaining short-circuit current is the amount of the internal bias current and
the pull-up current source IIL(LIN) (Ref. 1). Figure 33 shows the corresponding failure
management flow.
8.2 TXD dominant failure
Usually in case a TXD pin is shorted to ground, the LIN bus is clamped to the dominant
level and therefore overrules any transmission on the LIN bus. To protect the LIN bus from
being continuously driven to the dominant level, the TJA1020 has an integrated TXD
dominant timer. Thus the transmitter of the TJA1020 is disabled, if a TXD dominant failure
is detected and the LIN bus is released again.
Due to the integrated pull-down TXD resistor RTXD (Ref. 1), an open TXD pin results also
in a continuous dominant situation. In such a case the TXD open failure is detected by the
integrated TXD dominant timer and disables the transmitter stage of the TJA1020.
Both failures, the TXD dominant failure as well as the TXD open failure, are detected, if
the TXD input maintains dominant for at least tDOM (Ref. 1). As a consequence the LIN
transmission speed is limited to a minimum baud rate. Its calculation is shown in
Section 8.3.
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Application note
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TJA1020 LIN transceiver
Furthermore if one of the above failures is present, a change of the NSLP input signal
does not modify the TXD dominant timer state and therefore makes sure that no dominant
LIN signal is driven to the bus by the TJA1020 (fail-safe behavior).
8.3 Minimum baud rate and maximum TXD dominant phase
Due to the TXD dominant failure detection of the TJA1020 the maximum TXD dominant
phase is limited by the minimum TXD dominant time-out time tDOMmin (Ref. 1). As a
consequence the transmission speed is also limited to a minimum baud rate.
8.3.1 Minimum baud rate of a master node
The maximum dominant phase of the LIN protocol (Ref. 2) is the maximum SYNCH
BREAK LOW PHASE TSYNBRK,max (Ref. 2) of the SYNCH BREAK FIELD. The SYNCH
BREAK FIELD is part of the message frame HEADER, which is only sent by the master
node. The maximum SYNCH BREAK LOW PHASE TSYNBRK,max (Ref. 2) represents the
maximum number of dominant bits sent by the master. Depending on the length of the
maximum SYNCH BREAK LOW PHASE TSYNBRK,max (Ref. 2) and the minimum TXD
dominant time out time tDOMmin (Ref. 1) the minimum baud rate for the master node can be
calculated by the following equation:
T SYNBRK ,max
baudrate min,MASTER = ------------------------------t DOM ,min
with TSYNBRK,max > TSYNBRK,min
where TSYNBRK,min is specified in (Ref. 2)
Thus with a maximum SYNCH BREAK LOW PHASE of TSYNBRK,max = 14.4 the TJA1020
allows operating within master application down to 2.4 kBaud.
8.3.2 Minimum baud rate of a slave node
A slave node sends the RESPONSE part (Ref. 2) of the LIN message frame only, which
has a maximum dominant phase of 9 bits (start bit + 8 data bits). As a result the minimum
baud rate of a slave can be calculated by the following equation:
9 + n safe
baudrate min,SLAVE = --------------------t DOM ,min
with nsafe as safety margin
Thus with a safety margin of nsafe = 1.8 the TJA1020 allows operating within slave
application down to 1.8 kBaud.
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TJA1020 LIN transceiver
9. Power consumption
During design of the TJA1020 special care has been taken on system power consumption
since this is a key for introduction of this new LIN sub bus system within automotive
applications. The TJA1020 achieves lowest power consumption not only within a failure
free system but also during bus failure situations on the LIN bus line.
Even with the extremely low system power consumption the TJA1020 provides full
wake-up capability via the LIN bus as well as via local events keeping a high immunity
against electromagnetic disturbances.
9.1 Sleep mode power consumption
The TJA1020 provides very low power consumption in Sleep mode. If the transceiver is
used to control the ECU supply via INH pin the only remaining system current flows into
the BAT pin (IBAT(sleep) (Ref. 1)). All other pins do not sink or source any extra current (see
Figure 34).
V
Sleep mode: IBAT
3.3V
NSLP
µA
Floating: 0
Px.x
Low: 0
µA
TXD
µA
LIN
Recessive: 0
RXD
RX0
voltage regulator
INH
IIL(LIN)
TXD
TX0
Low: 0
µA
inhibit of
R
VDD
IIL(NWAKE)
RSLAVE
Low: 0
SLP
µA
MICROCONTROLLER
BAT
NWAKE
RWAKE2
... 5V
Supply Off: 0
µA
R
voltage regulator
High: 0
RMASTER
BAT
inhibit of
RWAKE1
BAT
µA
GND
TJA1020
GND
Fig 34. Current consumption in Sleep mode
9.2 Sleep mode power consumption at presence of LIN bus short-circuit
In case of a LIN short-circuit to ground the power consumption of the TJA1020 keeps also
very low if the Sleep mode is selected. Since the termination of the system becomes
nearly disabled during Sleep, the resulting short-circuit current is defined by the internal
bias current and the remaining pull-up current source for failure recovery (see Figure 35).
AN00093_2
Application note
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TJA1020 LIN transceiver
V
Supply: 100
RWAKE1
BAT
BAT
3.3V
µA
BAT
NWAKE
RWAKE2
... 5V
NSLP
µA
Px.x
Low: 0
µA
RX0
TXD
µA
voltage regulator
INH
IIL(LIN)
TXD
TX0
Low: 0
µA
inhibit of
R
VDD
Floating: 0
RSLAVE
MICROCONTROLLER
Low: 0
SLP
µA
IIL(NWAKE)
LIN
R
Supply Off: 0
High: 0
RMASTER
inhibit of
voltage regulator
µA
Dominant: IIL(LIN)
RXD
GND
TJA1020
GND
Fig 35. Typical short-circuit current consumption in Sleep mode
10. References
[1]
Data Sheet TJA1020, LIN Transceiver, Philips Semiconductors, Jan. 2004
[2]
LIN Specification Package, LIN Protocol Specification – Revision 1.3, LIN
Consortium, Dec. 2002
[3]
International Standard ISO 9141, Road Vehicles – Diagnostic Systems –
Requirement for Interchange of Digital Information, International Standardization
Organization, 1989
[4]
International Standard IEC 61000-4-2, Electromagnetic Compatibility – Testing and
Measurement Techniques – Electrostatic Discharge Immunity Test, International
Electrotechnical Commission, 2001
[5]
Data Sheet PESD1LIN, LIN Bus ESD Protection Diode, Philips Semiconductors,
Oct. 2004
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Application note
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TJA1020 LIN transceiver
11. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
12. Trademarks
Notice — All referenced brands, product names, service names and
trademarks are the property of their respective owners.
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Application note
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13. Contents
1
2
2.1
2.2
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.4
2.5
3
3.1
3.2
3.2.1
3.2.2
3.2.2.1
3.2.2.2
3.2.3
3.2.4
3.2.4.1
3.2.5
3.2.5.1
3.2.5.2
3.2.6
4
4.1
4.2
4.3
4.4
5
5.1
5.2
5.3
6
6.1
6.2
7
7.1
7.1.1
7.1.2
7.2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
General description . . . . . . . . . . . . . . . . . . . . . . 5
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Operating modes . . . . . . . . . . . . . . . . . . . . . . . 6
Sleep mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 8
Normal-slope mode . . . . . . . . . . . . . . . . . . . . 10
Low-slope mode . . . . . . . . . . . . . . . . . . . . . . . 10
Compatibility to 3.0 V to 5 V microcontroller
devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
ISO 9141 compatibility . . . . . . . . . . . . . . . . . . 11
Slave application . . . . . . . . . . . . . . . . . . . . . . . 14
Set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Detailed pin description . . . . . . . . . . . . . . . . . 14
NSLP pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
TXD pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Wake-up source recognition . . . . . . . . . . . . . . 15
Open circuit handling . . . . . . . . . . . . . . . . . . . 17
RXD pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
NWAKE pin . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Wake-up after power-on . . . . . . . . . . . . . . . . . 20
INH pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
INH controlled voltage regulator . . . . . . . . . . . 21
Direct voltage regulator supply . . . . . . . . . . . . 22
LIN pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Master application . . . . . . . . . . . . . . . . . . . . . . 24
Master termination directly to BAT . . . . . . . . . 24
Master termination towards INH . . . . . . . . . . . 24
Master termination split between INH and BAT 25
Master termination for LIN networks with different
supplied LIN nodes . . . . . . . . . . . . . . . . . . . . . 26
EMC aspects. . . . . . . . . . . . . . . . . . . . . . . . . . . 28
EME - network design hints . . . . . . . . . . . . . . 28
EME - Low-slope mode . . . . . . . . . . . . . . . . . 29
EMI - capacitive load . . . . . . . . . . . . . . . . . . . 29
ESD - aspects . . . . . . . . . . . . . . . . . . . . . . . . . . 30
General design hints for ESD levels beyond 4 kV
HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
ESD protection example for ESD model according
to IEC 61000-4-2 (Ref. 4) . . . . . . . . . . . . . . . . 31
Transceiver control . . . . . . . . . . . . . . . . . . . . . 32
INH controlled microcontroller power supply . 32
Applications using NWAKE. . . . . . . . . . . . . . . 32
Applications without using NWAKE . . . . . . . . 33
Permanently supplied microcontroller. . . . . . . 34
7.2.1
7.2.2
7.3
7.3.1
7.3.2
8
8.1
8.2
8.3
8.3.1
8.3.2
9
9.1
9.2
10
11
12
Application using NWAKE . . . . . . . . . . . . . . . 34
Application without using NWAKE . . . . . . . . . 35
Transition from Normal-slope/Low-slope into
Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Application using NWAKE . . . . . . . . . . . . . . . 36
Application without using NWAKE . . . . . . . . . 37
Failure management . . . . . . . . . . . . . . . . . . . . 39
LIN bus short-circuit to ground . . . . . . . . . . . . 39
TXD dominant failure . . . . . . . . . . . . . . . . . . . 39
Minimum baud rate and maximum TXD dominant
phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Minimum baud rate of a master node. . . . . . . 40
Minimum baud rate of a slave node . . . . . . . . 40
Power consumption . . . . . . . . . . . . . . . . . . . . 41
Sleep mode power consumption . . . . . . . . . . 41
Sleep mode power consumption at presence of
LIN bus short-circuit . . . . . . . . . . . . . . . . . . . . 41
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
© Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 16 September 2005
Document number: AN00093_2
Published in The Netherlands
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