Fujitsu Microelectronics Europe
Application Note
MCU-AN-390107-E-V14
F²MC-16LX FAMILY
16-BIT MICROCONTROLLER
ALL 16LX SERIES
EEPROM EMULATION WITH
SINGLE BANK FLASH
APPLICATION NOTE
16LX Hardware Set Up
Revision History
Revision History
Date
2005-12-15
2005-12-27
2006-03-22
2006-05-12
2006-05-18
Issue
V1.0; First version; MWi
V1.1; Fast Block Data Write added
V1.2; Preliminary Comments added
V1.3; Code in chapter 5.4.1.2 corrected
V1.4; Restriction for concept in chapter 5 added
This document contains 31 pages.
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16 LX Hardware Set Up
Warranty and Disclaimer
Warranty and Disclaimer
To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH restricts its
warranties and its liability for all products delivered free of charge (eg. software include or header
files, application examples, target boards, evaluation boards, engineering samples of IC’s etc.), its
performance and any consequential damages, on the use of the Product in accordance with (i) the
terms of the License Agreement and the Sale and Purchase Agreement under which agreements the
Product has been delivered, (ii) the technical descriptions and (iii) all accompanying written materials. In
addition, to the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH
disclaims all warranties and liabilities for the performance of the Product and any consequential
damages in cases of unauthorised decompiling and/or reverse engineering and/or disassembling. Note,
all these products are intended and must only be used in an evaluation laboratory environment.
1.
Fujitsu Microelectronics Europe GmbH warrants that the Product will perform substantially in
accordance with the accompanying written materials for a period of 90 days form the date of
receipt by the customer. Concerning the hardware components of the Product, Fujitsu
Microelectronics Europe GmbH warrants that the Product will be free from defects in material
and workmanship under use and service as specified in the accompanying written materials for
a duration of 1 year from the date of receipt by the customer.
2.
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or parts thereof, if the Product is returned to Fujitsu Microelectronics Europe GmbH in original
packing and without further defects resulting from the customer´s use or the transport.
However, this warranty is excluded if the defect has resulted from an accident not attributable to
Fujitsu Microelectronics Europe GmbH, or abuse or misapplication attributable to the customer
or any other third party not relating to Fujitsu Microelectronics Europe GmbH.
3.
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disclaims all other warranties, whether expressed or implied, in particular, but not limited to,
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To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH´s
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NO LIABILITY FOR CONSEQUENTIAL DAMAGES
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stipulations shall stay in full effect
© Fujitsu Microelectronics Europe GmbH
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16LX Hardware Set Up
Contents
Contents
REVISION HISTORY.............................................................................................................2
WARRANTY AND DISCLAIMER ..........................................................................................3
CONTENTS...........................................................................................................................4
0 INTRODUCTION ..............................................................................................................6
1 PRELIMINARY COMMENTS............................................................................................7
1.1
General Restrictions ................................................................................................7
1.1.1
RAM Code..................................................................................................7
1.1.2
Interrupts....................................................................................................7
1.1.3
Erase and Programming Times ..................................................................7
1.1.3.1
Example characteristics for MB90340 series (0.35 Dm technology)
...................................................................................................7
1.1.3.2
Preliminary example characteristics for future 16FX MCUs
(0.18Dm technology)...................................................................7
1.1.3.3
Notes on maximum chip erase time............................................8
2 MEMORY USAGE ............................................................................................................9
2.1
Memory....................................................................................................................9
2.2
Writing data..............................................................................................................9
3 PROGRAMMING EXAMPLE ..........................................................................................10
3.1
3.2
3.3
Settings..................................................................................................................10
3.1.1
Linker Settings .........................................................................................10
3.1.2
“Start.asm” Settings..................................................................................10
Definitions ..............................................................................................................10
3.2.1
Flash.h .....................................................................................................10
3.2.2
EEPROM.h...............................................................................................11
Driver .....................................................................................................................12
3.3.1
3.4
3.5
Flash.c .....................................................................................................12
3.3.1.1
HAL driver ................................................................................12
3.3.1.2
Driver API.................................................................................13
Application Example ..............................................................................................16
3.4.1
Main.c ......................................................................................................16
3.4.2
Flash Memory ..........................................................................................18
Restrictions ............................................................................................................19
3.5.1
Memory Size ............................................................................................19
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16 LX Hardware Set Up
Contents
3.5.2
Execution Time ........................................................................................19
3.5.3
Interrupts..................................................................................................19
4 SAFETY ALGORITHM ...................................................................................................20
4.1
Safety Concept ......................................................................................................20
4.2
Changes in Driver API............................................................................................21
4.2.1
4.3
Flash.c .....................................................................................................21
Restrictions ............................................................................................................23
5 FAST BLOCK DATA WRITE..........................................................................................24
5.1
Block Write Algorithm.............................................................................................24
5.2
Settings..................................................................................................................24
5.3
Definitions ..............................................................................................................24
5.4
5.3.1
Flash.h .....................................................................................................25
5.3.2
EEPROM.h...............................................................................................25
Driver .....................................................................................................................25
5.4.1
5.5
Flash.c .....................................................................................................25
5.4.1.1
HAL driver ................................................................................25
5.4.1.2
Driver API.................................................................................25
Application Example ..............................................................................................28
5.5.1
Main.c ......................................................................................................28
5.6
Flash Memory ........................................................................................................30
5.7
Restrictions ............................................................................................................30
5.7.1
Memory Size ............................................................................................30
5.7.2
Execution Time ........................................................................................30
5.7.3
Interrupts..................................................................................................30
5.7.4
Pointer Safety...........................................................................................31
© Fujitsu Microelectronics Europe GmbH
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Introduction
0 Introduction
This application note describes how to emulate an EEPROM with a single bank flash memory
of the 16LX MCUs.
Although the software shown in this application note was written for the MB90340 series, it is
applicable for all other 16LX-Flash devices, which don’t have compact or dual-operation Flash
memory.
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16 LX Hardware Set Up
Chapter 1 Preliminary Comments
1 Preliminary Comments
THIS CHAPTER GIVES GENERAL COMMENTS DUE TO FLASH ERASE AND WRITE
1.1 General Restrictions
1.1.1 RAM Code
Flash erase and programming can only be executed by routines linked into the RAM area,
because the Flash memory read is disabled during erase/program.
These routines are “mirrored” in the Flash memory and are copied to RAM before execution
by the switch COPY_RAMCODE ON in the start.asm file (s. 3.1.2) in our standard template
projects. The routines can be stored permanently during runtime in the RAM area or
temporary. Please see Application Notes mcu-an-390031-e-flash_programming and mcu-an390095-e-flash_programming_application_sw for details.
1.1.2 Interrupts
During Flash erase and programming no interrupts are allowed, because the interrupt vectors
located in the Flash memory area are not readable during erase/program. The user can
disable them globally.
The application can poll important interrupt flags of several resources. In case of occurrence
of an interrupt request, a Flash Sector Erase Suspend can be set to leave the RAM area and
jump to the interrupt service routine in the Flash memory. Flash programming can always be
suspended. At worst the written data is corrupted.
1.1.3 Erase and Programming Times
1.1.3.1 Example characteristics for MB90340 series (0.35 Bm technology)
Parameter
Conditions
Min
Typ
Max
Unit
-
1
15
s
Excludes programming
prior to erasure
-
26
3600
Ds
Except for the over head
time of the system
Sector erase
time
Word (16 bit
width)
programming
time
TA = +25 °C
Vcc = 5.0 V
Remark
1.1.3.2 Preliminary example characteristics for future 16FX MCUs (0.18Bm technology)
Parameter
Conditions
Min
Sector erase
time
Word (16 bit
width)
programming
time
TA = +25 °C
Vcc = 5.0 V
© Fujitsu Microelectronics Europe GmbH
Typ
Max
Unit
0.9
3.6
s
Excludes programming
prior to erasure
Ds
Except for the over head
time of the system
PRELIMINARY
-
23
-7-
370
Remark
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Chapter 1 Preliminary Comments
1.1.3.3 Notes on maximum chip erase time
The maximum of the chip erase time is the time-out of the Flash erase state machine. The
user can specify this time shorter for his application by polling an internal timer and setting
Flash sector erase suspend if an application time-out occurred.
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16 LX Hardware Set Up
Chapter 2 Memory Usage
2 Memory Usage
THIS CHAPTER SHOWS THE MEMORY USAGE
2.1 Memory
The upper 64 K Byte memory of the Flash memory (without compact Flash) in the 16LX series
is organized as follows:
FFFFFFH
FFC000H
SAn+4
16 K Bytes
FFBFFFH
FFA000H
SAn+3
8 K Bytes
FF9FFFH
FF8000H
SAn+2
8 K Bytes
FF7FFFH
FF0000H
SAn+1
32 K Bytes
For the EEPROM emulation the both smallest sectors are used (marked in grey).
2.2 Writing data
For writing new data to the “EEPROM”, the content of one sector is copied to the other, except
the area, which will be used for new data. This new data is written to the gap. Each last word
of the both sectors indicates, which sector is valid. Valid indicator is 0xFFFF and invalid
0x0000.
The functionality is shown in the illustration below:
Flow of the EEPROM Emulation
1. Erase Sector
Current Data
Sector 1
Data to be
overwritten
2. Copy (word by word)
Current Data
4. Copy (word by word)
New data
from RAM
3. Copy (word by word)
Old valid data
New data
Sector 2
Old valid data
5. Make invalid
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Chapter 3 Programming Example
3 Programming Example
EXAMPLE CODE OF HOW TO PROGRAMM AN EEROM EMULATION
3.1 Settings
3.1.1 Linker Settings
Because the memory area FF8000H to FFBFFFH is used, it overlaps with the ROM mirror area.
Therefore the CONST section has to be set to FFC000H:
-sc CONST/Const/BYTE=0xFFC000
The Flash programming routines must be executed in RAM, so 2 further sections has to be
defined:
-sc @RAMCODE/Code/WORD=ROMXXXX
-sc RAMCODE/Code/WORD=RAMXXXX
Please use for ROMXXX and RAMXXXX the names, which are used for ROM and RAM section.
3.1.2 “Start.asm” Settings
To copy automatically the Flash programming code to RAM memory at start up, please set the
COPY_RAMCODE switch in the Start.asm file to “ON”:
#set
COPY_RAMCODE
ON
; <<< enable RAMCODE section to
3.2 Definitions
The following definitions should be done to make the code more readable.
3.2.1 Flash.h
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES.
*/
/*
(C) Fujitsu Microelectronics Europe GmbH
*/
/*---------------------------------------------------------------------------*/
#define seq_AAAA ((__far volatile unsigned int*)0xFFAAAA)
#define seq_5554 ((__far volatile unsigned int*)0xFF5554)
// sequence address
// sector start addresses
#define SECTOR1 0xFF8000
#define SECTOR2 0xFFA000
#define DQ7 0x0080
#define DQ5 0x0020
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// data polling flag
// time limit exceeding flag
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16 LX Hardware Set Up
Chapter 3 Programming Example
3.2.2 EEPROM.h
The next definition determines the memory size of the emulated EEPROM. Please note, that
the bigger the size, the longer will take the writing.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES.
*/
/*
(C) Fujitsu Microelectronics Europe GmbH
*/
/*---------------------------------------------------------------------------*/
// Size of emulated EEPROM in Bytes. Maximum is 8190
// (Last word of sectors are used for valid detection)
#define EEPROM_size 128
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Chapter 3 Programming Example
3.3 Driver
The following code shows the HAL driver and API for the EEPROM emulation
3.3.1 Flash.c
3.3.1.1 HAL driver
The HAL driver is located in the RAM area for write and erase access to the Flash memory.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES.
*/
/*
(C) Fujitsu Microelectronics Europe GmbH
*/
/*---------------------------------------------------------------------------*/
#include "mb90340.h"
#include "Flash.h"
#include "EEPROM.h"
// includes pointer and addresses
// includes emulated EEPROM size
#pragma section FAR_CODE=RAMCODE, attr=CODE
#pragma section CODE=RAMCODE, attr=CODE
// RAM location
/**************** FLASH ROUTINES *****************/
// Write word data to flash
unsigned char Fwrite(__far unsigned int *adr, unsigned int wdata)
{
unsigned char flag = 0;
// start write sequence
FMCS_WE = 1;
*seq_AAAA = 0x00AA;
*seq_5554 = 0x0055;
*seq_AAAA = 0x00A0;
*adr = wdata;
// set write enable flag
// sends the command to the pointed address
// send data to the pointed address
while(flag == 0)
{
if((*adr & DQ7) == (wdata & DQ7))
{
flag = 1;
}
// Toggle bit
// successful written
if((*adr & DQ5) == DQ5)
// time out
{
if((*adr & DQ7) == (wdata & DQ7))
{
flag = 1;
// successful written
}
else
{
flag = 2;
// timeout error
}
}
}
FMCS_WE = 0;
// reset write enable flag
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return(flag);
}
// Erases Flash sector
unsigned char FSerase(__far unsigned int *sector_adr)
{
unsigned char flag = 0;
// start with chip erase sequence
FMCS_WE = 1;
// set write enable flag
*seq_AAAA =
*seq_5554 =
*seq_AAAA =
*seq_AAAA =
*seq_5554 =
*sector_adr
0x00AA;
0x0055;
0x0080;
0x00AA;
0x0055;
= 0x0030;
// sends the command to the pointed address
// erase sector at the pointed address
while(flag == 0)
{
if((*sector_adr & DQ7) == DQ7)
{
flag = 1;
}
if((*sector_adr & DQ5) == DQ5)
{
if((*sector_adr & DQ7) == DQ7)
{
flag = 1;
}
else
{
flag = 2;
}
}
// Toggle bit
// successful erased
// time out
// successful erased
// timeout error
}
FMCS_WE = 0;
}
// reset write enable flag
return(flag);
3.3.1.2 Driver API
The following code contains the driver API. It has two functions:
unsigned char write_eeprom(unsigned int adr, unsigned int *data, unsigned int len)
unsigned int read_eeprom(unsigned int adr)
The function write_eeprom handles the complete EEPROM emulation, including sector
erase and Flash write to the actual sector. The old sector is marked as invalid afterwards. The
parameters are the virtual word-address, the pointer to the data array and the word-length of
the data to be written.
The function read_eeprom reads out word data from the address parameter.
Please note that for clearness reasons no error handling is implemented.
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Chapter 3 Programming Example
/**************** ENTRY POINT ROUTINES ****************/
#pragma segment FAR_CODE=FLASHCODE, attr=CODE
// ROM location
// Write to EEPROM
unsigned char write_eeprom(unsigned int adr, unsigned int *data, unsigned int len)
{
unsigned int i, j, start_adr, end_adr, wdata;
unsigned char error;
unsigned long fsec, fadr1, fadr2, fvalid;
// check which sector is valid
if ((*(__far unsigned int*) (SECTOR2 + 0x1FFE)) == 0x0000)
{
// read from SECTOR1 and write to SECTOR2
fsec = SECTOR2;
fadr1 = SECTOR1;
fadr2 = SECTOR2;
fvalid = SECTOR1 + 0x1FFE;
}
else
{
// read from SECTOR2 and write to SECTOR1
fsec = SECTOR1;
fadr1 = SECTOR2;
fadr2 = SECTOR1;
fvalid = SECTOR2 + 0x1FFE;
}
// Erase SECTOR to be written
error = FSerase((__far unsigned int*) fsec);
// Write valid flag of old SECTOR: 1st step
error = Fwrite((__far unsigned int*) fvalid, 0x00FF);
start_adr = adr * 2;
// logical addresses to absolute addresses
end_adr = start_adr + len * 2;
j = 0;
for (i = 0; i < EEPROM_size; i += 2)
// count word-wise
{
if ((i >= end_adr) || (i < start_adr))
{
wdata = *(__far unsigned int*) (fadr1 + i);
}
else
{
wdata = data[j];
j++;
}
// copy data
// new data
error = Fwrite((__far unsigned int*) (fadr2 + i), wdata);
}
// Overwrite valid flag of old SECTOR: 2nd step
error = Fwrite((__far unsigned int*) fvalid, 0x0000);
}
return error;
Please note, that for further error handling the invalid sector is marked first with 0x00FF and
after complete writing with 0x0000. This can be used for indication if the Flash programming
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16 LX Hardware Set Up
Chapter 3 Programming Example
failed because of abnormal abort of the API function.
// Read from EEPROM
unsigned int read_eeprom(unsigned int adr)
{
// Get valid sector
if ((*(__far unsigned int*) (SECTOR2 + 0x1FFE)) == 0x0000)
{
return (*(__far unsigned int*) (SECTOR1 + adr * 2));
}
else
{
return (*(__far unsigned int*) (SECTOR2 + adr * 2));
}
}
#pragma segment CODE
Please note that the API addresses are logical addresses.
Example:
Assume SECTOR1 is valid and the user wants to write to logical address 0x21. The physical
address is then SECTOR1-address + logical address • 2:
0xFF8000 + 0x21 • 2 = 0xFF8042
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Chapter 3 Programming Example
3.4 Application Example
3.4.1 Main.c
The following code shows how to embed the driver API in a user program.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES.
*/
/*
(C) Fujitsu Microelectronics Europe GmbH
*/
/*---------------------------------------------------------------------------*/
#include "mb90340.h"
// Demonstration strings (format: unsigned int)
const unsigned int data1[16] =
{'E', 'E', 'P', 'R', 'O', 'M', ' ', 'E', 'M', 'U', 'L', 'A', 'T', 'I', 'O', 'N'};
const unsigned int data2[16] =
{'*', ' ', 'o', 'v', 'e', 'r', 'w', 'r', 'i', 't', 't', 'e', 'n', '!', ' ', '*'};
// Error Indicator for FLASH-CAN-100P-340 Board
void error(void)
{
volatile unsigned int i;
PDR0 = 0xFF;
while(1)
{
PDR0 = ~PDR0;
for (i = 0; i < 30000; i++);
}
}
//-------------------------------------------------------------------------------// Demonstration Application
void main(void)
{
InitIrqLevels();
__set_il(7);
__EI();
// allow all levels
// globaly enable interrupts
PDR0 = 0x00;
DDR0 = 0xFF;
// Init Ports for Status
write_eeprom(0x11, data1, 16);
// write 16 words starting at virtual
// address 0x12
PDR0++;
write_eeprom(0x18, data2, 16);
// write 16 words starting at virtual
// address 0x20
PDR0++;
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Chapter 3 Programming Example
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if (read_eeprom(0x11) != data1[0]) error();
if (read_eeprom(0x18) != data2[0]) error();
// check EEPROM
// check EEPROM
PDR0++;
}
while(1);
This application writes the string “EEPROM EMULATION” to the logical address 0x11. Because
it is the initial call, the string is written to SECTOR1.
In next step the application partly overwrites the fist string with the new string
“* overwritten! *”.
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Chapter 3 Programming Example
3.4.2 Flash Memory
The Flash memory content after the application run is as follows:
Start of first string (0xFF8022, logical address: 0x11)
Overwrite start (0xFFA030, logical
address: 0x18)
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Old contents copied
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Invalid indicator
of SECTOR1
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16 LX Hardware Set Up
Chapter 3 Programming Example
3.5 Restrictions
3.5.1 Memory Size
Although almost the whole sector size (instead of valid/invalid word) of 8K Bytes can be used
for the EEPROM emulation, the data size, which can be written at once, is limited by the RAM
memory. It also has to be considered, that the RAM also contains the stack and global
variables together with the flash HAL, which is a limiting factor.
Writing the maximum size of the emulated EEPROM step by step is possible.
3.5.2 Execution Time
Every write access to the emulated EEPROM needs a sector erase. The erase time can be up
to 15 seconds (MB90340 series about 0,65 s).
For time critical reactions of the application a flash sector erase suspend can be implemented.
3.5.3 Interrupts
Ideally no interrupts should interfere the functions Fwrite and FSerase, because the FlashMemory read access is blocked after FMCS_WE = 1. For service emulation polling of the
interrupt-cause-flags has to be done within the HAL drivers.
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Chapter 4 Safety Algorithm
4 Safety Algorithm
THIS CHAPTER SHOWS A SAFETY EXTENSION OF THE DRIVER-API
4.1 Safety Concept
If the programming of the emulated EEPROM is aborted before writing the invalid flag, all new
data can’t be restored after power down. Only the contents of the old valid-marked sector can
be safely considered as valid. This chapter shows, how to restore all written data via extra
flags.
The safety concept writes an additional bit flag into the end of the actual sector if word data is
written. Therefore a memory size of EEPROM size divided by 16 is needed. Theoretical 4096
indexed words need 256 additional words. Thus the beginning of this flag field can be sector
end address plus 1 minus 200H.
The following graphic shows the mechanism:
Data is written to FF8000H
0xFFFE is written to FF9E00H
Data is written to FF8002H
0xFFFC is written to FF9E00H
Data is written to FF8004H
0xFFF8 is written to FF9E00H
Data is written to FF8006H
0xFFF0 is written to FF9E00H
...
...
Bit No.
FEDCBA9876543210
FFAFFEH
FF9E04H
FF9E02H
FF9E00H
FF800EH
FF800CH
FF800AH
FF8008H
FF8006H
FF8004H
FF8002H
FF8000H
If the copying of the old data and insertion of the new data fails during programming, the bit
field beginning at FF9E00H indicates to which address data was written by the “last” zero bit.
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16 LX Hardware Set Up
Chapter 4 Safety Algorithm
4.2 Changes in Driver API
For additional safety the API code has to be changed as follows.
4.2.1 Flash.c
/**************** ENTRY POINT ROUTINES ****************/
#pragma segment FAR_CODE=FLASHCODE, attr=CODE
const int Wmask[16] = {0xFFFE,
0xFFE0,
0xFE00,
0xE000,
0xFFFC,
0xFFC0,
0xFC00,
0xC000,
0xFFF8,
0xFF80,
0xF800,
0x8000,
// ROM location
0xFFF0,
0xFF00,
0xF000,
0x0000};
// Write to EEPROM
unsigned char write_eeprom(unsigned int adr, unsigned int *data,
unsigned int len)
{
unsigned int i, j, start_adr, end_adr, wdata, wordpos, bitpos;
unsigned char error;
unsigned long fsec, fadr1, fadr2, fadr3, fvalid;
// check which sector is valid
if ((*(__far unsigned int*) (SECTOR2 + 0x1FFE)) == 0x0000)
{
// read from SECTOR1 and write to SECTOR2
fsec = SECTOR2;
fadr1 = SECTOR1;
fadr2 = SECTOR2;
fadr3 = SECTOR2 + 0x1E00;
fvalid = SECTOR1 + 0x1FFE;
}
else
{
// read from SECTOR2 and write to SECTOR1
fsec = SECTOR1;
fadr1 = SECTOR2;
fadr2 = SECTOR1;
fadr3 = SECTOR1 + 0x1E00;
fvalid = SECTOR2 + 0x1FFE;
}
// Erase SECTOR to be written
error = FSerase((__far unsigned int*) fsec);
// Write valid flag of old SECTOR: 1st step
error = Fwrite((__far unsigned int*) fvalid, 0x00FF);
start_adr = adr * 2;
// logical addresses to absolute addresses
end_adr = start_adr + len * 2;
j = 0;
for (i = 0; i < EEPROM_size; i += 2)
// count word-wise
{
if ((i >= end_adr) || (i < start_adr))
{
wdata = *(__far unsigned int*) (fadr1 + i);
}
// copy data
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else
{
wdata = data[j];
j++;
// new data
}
error = Fwrite((__far unsigned int*) (fadr2 + i), wdata);
// mark written word
wordpos = (i / 32) * 2;
// word position
bitpos = (i / 2) % 16;
// bit position
error = Fwrite((__far unsigned int*)(fadr3 + wordpos),
Wmask[bitpos]);
}
// Overwrite valid flag of old SECTOR: 2nd step
error = Fwrite((__far unsigned int*) fvalid, 0x0000);
}
return error;
The following code gives an example how to check, if the programming was successful.
// Check written data
unsigned int check_eeprom(void)
{
unsigned int i, madr, admax, remainder, error;
if ((*(__far unsigned int*) (SECTOR2 + 0x1FFE)) == 0x0000)
{
madr = SECTOR1 + 0x1E00;
// read from SECTOR1
}
else
{
madr = SECTOR2 + 0x1E00;
// read from SECTOR2
}
// Check whole words
admax = (EEPROM_size / 32) * 2;
for (i = 0; i < admax; i += 2)
{
if (*(__far unsigned int*)(madr + i) != 0x0000)
{
error |= 1;
}
}
// Check remainder mask
remainder = (EEPROM_size / 2) % 16;
if (remainder != 0)
{
if (*(__far unsigned int*)(admax) != Wmask[remainder - 1])
{
error |= 1;
}
}
}
return error;
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Please note, that this algorithm only works for emulated EEPROM sizes greater than 2 Bytes
and less than 7681 Bytes.
4.3 Restrictions
Please see 3.5.
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Chapter 5 Fast Block Data Write
5 Fast Block Data Write
THIS CHAPTER GIVES AN EXAMPLE FOR FAST BLOCK DATA WRITING
5.1 Block Write Algorithm
For many applications it is not needed to have full EEPROM emulation functionallity shown in
the further chapters. Often it is only needed to store some settings before power-down and
restoring them after power-up.
These settings have a fixed block size and can be written sequentially to the Flash Memory. A
time consuming Sector Erase has only to be performed, if the sector memory is full. Therefore
writing to the Flash Memory without Sector Erase can be done approximately sector-size
divided by block-data-size.
To mark the last written block, a pointer bit field is located at the end of the sector. This limits
the sector size, but is needed for valid block data indication. This concept is similar to the
safety algorithm described in chapter 4.
The following graphic illustrates the algorithm.
Fast Block Write
data n-2
data n-1
data n
Block0 Block1 Block2 Block3
•••
Pointer Bit Field
1. Block data read out after power-on
2. Block data updated by application
3. Block data written in next block
5.2 Settings
The settings for the linker etc. are the same as described in 3.1.
5.3 Definitions
The following definitions should be done to make the code more readable.
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5.3.1 Flash.h
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES.
*/
/*
(C) Fujitsu Microelectronics Europe GmbH
*/
/*---------------------------------------------------------------------------*/
#define seq_AAAA ((__far volatile unsigned int*)0xFFAAAA)
#define seq_5554 ((__far volatile unsigned int*)0xFF5554)
// sequence address
// sector addresses
#define SECTOR 0xFF8000
#define POINTER 0xFF9E00
#define POINTERSIZE 0x200 // 0xFFA000 – 0xFF9E00
#define DQ7 0x0080
#define DQ5 0x0020
// data polling flag
// time limit exceeding flag
5.3.2 EEPROM.h
The next definition determines the memory size of the data blocks in 16-Bit words.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES.
*/
/*
(C) Fujitsu Microelectronics Europe GmbH
*/
/*---------------------------------------------------------------------------*/
// Size of emulated EEPROM Data Block in Words
#define BLOCKSIZE 8
5.4 Driver
The following code shows the HAL driver and API for the EEPROM emulation
5.4.1 Flash.c
5.4.1.1 HAL driver
The HAL driver is located in the RAM area for write and erase access to the Flash memory. It
is the same as described in 3.3.1.1.
5.4.1.2 Driver API
The following code contains the driver API. It has two functions:
unsigned char write_block(unsigned int *data)
unsigned int read_block(unsigned int *data)
The function write_block handles the complete block administration and automatically
erases the sector, if it is full.
The function read_eeprom reads out the actual valid block marked in the pointer bit field.
Please note that for clearness reasons no error handling is implemented.
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Chapter 5 Fast Block Data Write
//*************** ROM SOUB ROUTINE ******************
#pragma segment FAR_CODE=FLASHCODE, attr=CODE
// Pointer Bit Field Mask
const int Wmask[17] = {
0xFFFF,
0xFFFE,
0xFFE0,
0xFE00,
0xE000,
0xFFFC,
0xFFC0,
0xFC00,
0xC000,
// ROM location
0xFFF8,
0xFF80,
0xF800,
0x8000,
0xFFF0,
0xFF00,
0xF000,
0x0000 };
// Get actual Block
unsigned int get_block(void)
{
unsigned char found;
unsigned int i, j, pointer, block;
block = 0;
found = 0;
i = 0;
j = 0;
while (!found)
{
pointer = *(__far unsigned int*) (POINTER + i);
block = i * 8;
// (i / 2) * 16
if (pointer != 0x0000)
{
found = 1;
// Pointer word partly written?
for (j = 0; j < 16; j++)
// Get block number from Mask
{
if (pointer == Wmask[j])
{
block += j;
}
}
}
i += 2;
if (i == POINTERSIZE)
{
found = 1;
}
// Overrun
}
}
return block;
Wmask is the mask for the pointer bit field. Note, that it contains 17 elements, where element 0
– 15 is used for detection and 1 – 16 for marking.
get_block calculates the actual block number from the pointer bit field.
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/**************** ENTRY POINT ROUTINES ****************/
// Write to EEPROM
unsigned char write_block(unsigned int *data)
{
unsigned char error;
unsigned int i, wordpos, bitpos, block;
unsigned long addr;
error = 0;
block = get_block();
addr = SECTOR + BLOCKSIZE * block * 2;
// Check, if sector is full
if ((addr + BLOCKSIZE * 2) >= POINTER)
{
addr = SECTOR;
error = FSerase((__far unsigned int*) SECTOR);
}
for (i = 0; i < BLOCKSIZE; i++)
{
error |= Fwrite((__far unsigned int*)(addr + i * 2), data[i]);
}
// update pointer
wordpos = (block / 16) * 2;
// word position
bitpos = block % 16;
// bit position
error = Fwrite((__far unsigned int*)(POINTER + wordpos), Wmask[bitpos +
1]);
return error;
}
// Read from EEPROM
void read_block(unsigned int *data)
{
unsigned int i;
unsigned long addr;
addr = SECTOR + BLOCKSIZE * (get_block() - 1) * 2;
for (i = 0; i < BLOCKSIZE; i++)
{
data[i] = *(__far unsigned int*)(addr + i * 2);
}
}
#pragma segment CODE
Please note, that read_block only returns valid data, if data was ever written before (addr is
undefined in this case, because get_block() returns 0).
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Chapter 5 Fast Block Data Write
5.5 Application Example
5.5.1 Main.c
The following code shows how to embed the driver API in a user program.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES.
*/
/*
(C) Fujitsu Microelectronics Europe GmbH
*/
/*---------------------------------------------------------------------------*/
#include "mb90340.h"
#include "EEPROM.h"
// For BLOCKSIZE
// Demonstration strings (format: unsigned int)
const unsigned int data1[8] =
{0x0088, 0x0077, 0x0066, 0x0055, 0x0044, 0x0033, 0x0022, 0x0011};
const unsigned int data2[8] =
{0x1111, 0x2222, 0x3333, 0x4444, 0x5555, 0x6666, 0x7777, 0x8888};
unsigned int data3[8];
// Error Indicator for FLASH-CAN-100P-340 Board
void error(void)
{
volatile unsigned int i;
PDR0 = 0xFF;
while(1)
{
PDR0 = ~PDR0;
for (i = 0; i < 30000; i++);
}
}
//-------------------------------------------------------------------------------// Demonstration Application
void main(void)
{
unsigned char i;
InitIrqLevels();
__set_il(7);
__EI();
PDR0 = 0x00;
DDR0 = 0xFF;
// allow all levels
// globaly enable interrupts
// Init Ports for Status
write_block(data1);
PDR0++;
write_block(data2);
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PDR0++;
write_block(data1);
PDR0++;
write_block(data2);
PDR0++;
write_block(data2);
PDR0++;
read_block(data3);
PDR0++;
for (i = 0; i < BLOCKSIZE; i++)
{
if (data2[i] != data3[i])
{
error();
}
}
}
while(1);
If the actual block data is not equal to the last written block, all LEDs connected to Port 0 are
flashing at the FLASH-CAN-100P-340 board.
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Chapter 5 Fast Block Data Write
5.6 Flash Memory
After application run the flash memory contains the following data:
The Pointer Bit Field contains after 5 block write transfers 1111.1111.1110.0000B = FFE0H:
5.7 Restrictions
5.7.1 Memory Size
The smaller the data block memory the more write cycles can be done without sector erase.
The number of cycles are Flash-memory-size minus bit-pointer-field-size divided by blockdata-size.
5.7.2 Execution Time
If the sector memory is full the next block data to be written need a sector erase erase. The
erase time can be up to 15 seconds (MB90340 series about 0,65 s).
For time critical reactions of the application a flash sector erase suspend can be implemented.
5.7.3 Interrupts
Ideally no interrupts should interfere the functions Fwrite and FSerase, because the FlashMemory read access is blocked after FMCS_WE = 1. For service emulation polling of the
interrupt-cause-flags has to be done within the HAL drivers.
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Chapter 5 Fast Block Data Write
5.7.4 Pointer Safety
It may be possible, that just after block writing and just before marking the data block in the
pointer field a voltage-drop or reset my occur. In this case valid data is written but not marked.
After reset, this data is not recognized by the driver. If new data is written, errors may occur,
because the not marked block is tried to overwrite by the driver then.
A possible solution is to use two pointer fields. One filed is updated before block writing to
mark the block as used anyway. The second pointer filed has the functionality described
above.
To calculate the actual free block has to be done by the first pointer flied, unless if the last
block contains data or not.
The sector structure will look like the following illustration:
Data Block Writing
data n-2
data n-1
data n
Block0 Block1 Block2 Block3
•••
Pointer Bit Field
Start Write
Finished Write
1. Block data read out after power-on
2. Block data updated by application
3. Block data written in next block
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