DN496 - Complete Battery Charger Solution for High Current Portable Electronics

Complete Battery Charger Solution for High Current Portable
Electronics
3.5A Charger for Li-Ion/LiFePO4 Batteries Multiplexes USB and Wall Inputs
Design Note 496
George H. Barbehenn
Introduction
The LTC ®4155 and LTC4156 are dual multiplexed-input
battery chargers with PowerPath™ control, featuring I2C
programmability and USB On-The-Go for systems such
as tablet PCs and other high power density applications.
The LTC4155’s float voltage (VFLOAT ) range is optimized
for Li-Ion batteries, while the LTC4156 is optimized for
lithium iron phosphate (LiFePO4) batteries, supporting
system loads to 4A with up to 3.5A of battery charge
current. I2C controls a broad range of functions and USB
On-The-Go functionality is controlled directly from the
USB connector ID pin.
N-channel MOSFETs controlled by an internal charge
pump. The input multiplexer has input priority selection
and independent input current limits for each channel.
Applications include any device with a high capacity
Li-Ion or LiFePO4 battery that can be charged from a high
current wall adapter input or from the USB input—such
as a tablet PC. Figure 1 shows a typical application and
Figure 2 shows its efficiency.
This dual input multiplexer implementation allows the
use of inexpensive, low RDS(ON) N-channel MOSFETs.
The MOSFETs also provide overvoltage protection (OVP)
and if desired, backdrive blocking and reverse-voltage
Input Multiplexer
A distinctive feature of the LTC4155/LTC4156 PowerPath
implementation is a dual-input multiplexer using only
7
11
WALLSNS
WALLGT
SW
WALL
VOUTSNS
USB
L1
1µH
21, 22
23, 24, 25
C3
10µF
TO µC
TO µC
CHGSNS
19, 20
8
17
USBGT
BATGATE
USBSNS
16
BATSNS
14
NTCBIAS
4
ID
3 1, 2, 28 2
I C
3
IRQ
10
OVGCAP
CLPROG1 CLPROG2 GND VC
5
L1: COILCRAFT XFL4020-102ME
MN1: Si4430BDY
MP1: VISHAY Si5481DU-T1-GE3
R3
1.21k
6
29
NTC
PROG
12
C1
0.047µF
15
MP1
90.0
EFFICIENCY
TO BATTERY
87.5
R5
80k
1.8A
LIMIT
VBATSNS = 3.7V
1.5
POWER LOST
TO VOUT
1.0
0.5
0
1.5 2.0 2.5 3.0 3.5
CURRENT (A)
DN4GB F02
INCLUDES LOSSES FROM 2× Si7938DP OVP FETS
XFL4020-102ME INDUCTOR AND Si5481DU CHARGER FET
0
0.5
1.0
Figure 2. Switching Regulator Efficiency
18
R4
665Ω
Figure 1. Typical Application Using a Simple Input
Multiplexer with No Backdrive Protection
3.0
2.0
POWER LOST
TO BATTERY
82.5
75.0
3.5
2.5
85.0
77.5
DN4GB F01
11/11/496
EFFICIENCY
TO VOUT
80.0
9
R1, 3.6k
VBUS
4.0
92.5
C2
22µF
13
LTC4155/LTC4156
MN1
95.0
TO SYSTEM
LOAD
POWER LOST (W)
VOUT
MN2
26, 27
EFFICIENCY (%)
R2, 3.6k
L, LT, LTC, LTM, Linear Technology, the Linear logo are registered trademarks and
PowerPath is a trademark of Linear Technology Corporation. All other trademarks are
the property of their respective owners.
protection (RVP). Backdrive blocking prevents voltage on
the wall input from backdriving the USB, or vice-versa.
Backdrive blocking can be implemented on one or both
inputs. Reverse-voltage protection prevents a negative
voltage applied to the protected input from reaching
downstream circuits.
Dual High Current Input Application
Figure 3 shows a dual 3.5A input application, featuring OVP,
RVP and backdrive protection. The FDMC8030 MOSFETs
provide ±40V of OVP and RVP protection.
0V~6V Input on Either WALL or USB
In the circuit of Figure 3, when a 0V~6V input is present on either input, the corresponding gate signal rises
to approximately twice VIN, enabling the two series
N-channel MOSFETS and connecting the input to VBUS.
The undervoltage lockout (UVLO) is approximately 4.35V
on each channel.
The LTC4155/LTC4156 have an input priority bit, which
defaults to WALL. If a valid voltage is present on both
inputs, only WALLGT is activated. The input priority bit
can be changed via I2C to make the USB channel preferred
when both inputs are present.
>6V Input on Either WALL or USB
When either input goes above 6V, the corresponding
WALLGT or USBGT pin is pulled low, shutting off the
corresponding MOSFETs and disconnecting the input. If
both inputs have 5V on them, and the input that is enabled
by the input priority bit goes above 6V, the LTC4155/
LTC4156 automatically and seamlessly switches to the
other input—with no disturbance on VOUT.
Q3
Q1
R5
47k
The diode-connected NPNs (Q3 and Q4) serve to prevent
excess VGS on the MOSFET closest to the input of the
corresponding channel current from the input flows
through the diode, through the B-C junction of the NPN
bipolar transistor, and pulls the gate up through the 5M
resistor. This prevents the gate from dropping below the
source by more than 2V.
A voltage greater than 6V on one input does not prevent
the other input from operating normally.
< 0V Input on Either WALL or USB
The USBSNS and WALLSNS pins ignore any negative
inputs, but clamp the pins to –VF (about –0.6V). The
negative voltage forward-biases the base-emitter junction of the NPN bipolar transistor, shorting the gate to
the input and ensuring that the gate is never more than
about 0.5V above the source.
A negative voltage on one input does not prevent the
other input from operating normally.
OTG 0peration
The LTC4155/LTC4156 drive the USBGT pin high when
USB On-The-Go operation is enabled, connecting VBUS to
the USB input and enabling up to 500mA to be sourced.
Conclusion
The LTC4155/LTC4156 implement an overvoltage and
reverse-voltage protected, prioritized input multiplexer
for products that need to support multiple system power
or battery charging functionality. Optional backdrive
blocking prevents the appearance of voltages at an
unconnected input.
R1 3.6k
R3, 5M
TO WALL
INPUT
WALLSNS
WALLGT
LTC4155/LTC4156
TO USB
INPUT
MN1A
MN1B
MN2A
MN2B
VBUS
R4 5M
R2 3.6k
Q4
Q2
MN1, MN2 = FDMC8030
R6
47k
+
USBGT
USBSNS
OVGCAP
C1
OPT
0.01µF
DN4GB F03
Figure 3. LTC4155/LTC4156 Input Multiplexer with OVP, RVP and Backdrive Blocking
Data Sheet Download
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Linear Technology Corporation
For applications help,
call (978) 656-4700, Ext. 3752
dn496 LT/AP 1111 196K • PRINTED IN THE USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
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 LINEAR TECHNOLOGY CORPORATION 2011
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