Datasheet

DATASHEET
±60V Fault Protected, 3.3V to 5V, ±20V Common-Mode
Range, RS-485/RS-422 Transceivers with Cable Invert
and ±15kV ESD
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E,
ISL32458E, ISL32459E
The ISL32450E through ISL32459E are 3.3V to 5V powered,
Features
fault protected, extended common-mode range differential
transceivers for balanced communication. The RS-485 bus pins
(driver outputs and receiver inputs) are protected against
overvoltages up to ±60V, and against ±15kV ESD strikes. These
transceivers operate in environments with common-mode
voltages up to ±20V (exceeds the RS-485 requirement),
making this RS-485 family one of the more robust on the
market.
Transmitters are RS-485 compliant with VCC ≥ 4.5V and
deliver a 1.1V differential output voltage into the RS-485
specified 54Ω load even with VCC = 3V. Receiver (Rx) inputs
feature a “Full Fail-Safe” design, which ensures a logic-high Rx
output if Rx inputs are floating, shorted, or on a terminated but
undriven (idle) bus. Rx full fail-safe operation is maintained even
when the Rx input polarity is switched (cable invert function on
ISL32457E and ISL32459E).
• Fault protected RS-485 bus pins . . . . . . . . . . . . . . up to ±60V
• Extended common-mode range. . . . . . . . . . . . . . . . . . . . ±20V
larger than required for RS-485
• ±15kV HBM ESD protection on RS-485 bus pins
• Wide supply range . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 5.5V
• Cable invert pin (ISL32457E and ISL32459E only)
corrects for reversed cable connections while maintaining
Rx full fail-safe functionality
• 1/4 unit load for up to 128 devices on the bus
• High transient overvoltage tolerance. . . . . . . . . . . . . . . . ±80V
• Full fail-safe (open, short, terminated) RS-485 receivers
• Choice of RS-485 data rates . . . . . . . . . . . . . . . . . . up to 20Mbps
• Low quiescent supply current. . . . . . . . . . . . . . . . . . . . . 2.1mA
The ISL32457E and ISL32459E include a cable invert function
that reverses the polarity of the Rx and Tx bus pins in case the
cable is misconnected during installation.
Applications
See Table 1 on page 2 for key features and configurations by
device number.
• Air conditioning systems
Related Literature
• Building lighting and environmental control systems
• ISL32470E, ISL32472E, ISL32475E, ISL32478E datasheet
“Fault Protected, Extended Common Mode Range,
RS-485/RS-422 Transceivers with ±16.5kV ESD”
• Industrial/process control networks
20
B
VID = ±1V
2Mbps
15
10
5
RO
0
COMMON-MODE RANGE (V)
20
VOLTAGE (V)
• Security camera networks
VCC = 3V
A
12
0
-7
-20
STANDARD RS-485
TRANSCEIVER
TIME (200ns/DIV)
FIGURE 1. EXCEPTIONAL ISL32453E RX OPERATES AT >1Mbps
EVEN WITH ±20V COMMON-MODE VOLTAGE
December 1, 2015
FN7921.1
• Utility meters/automated meter reading systems
1
ISL3245XE
FIGURE 2. TRANSCEIVERS DELIVER SUPERIOR COMMON-MODE
RANGE vs STANDARD RS-485 DEVICES
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC. 2012, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
TABLE 1. SUMMARY OF FEATURES
HALF/FULL
DUPLEX
DATA RATE
(Mbps)
SLEW-RATE
LIMITED?
EN
PINS?
HOT
PLUG
CABLE INVERT
(INV) PIN?
QUIESCENT ICC
(mA)
LOW POWER
SHDN?
PIN COUNT
ISL32450E
Full
0.25
Yes
Yes
No
No
2.1
Yes
10, 14
ISL32452E
Half
0.25
Yes
Yes
No
No
2.1
Yes
8
ISL32453E
Full
1
Yes
Yes
No
No
2.1
Yes
10, 14
ISL32455E
Half
1
Yes
Yes
No
No
2.1
Yes
8
ISL32457E
Half
0.25
Yes
Tx Only
No
Yes
2.1
No
8
ISL32458E
Half
20
No
Yes
No
No
2.1
Yes
8
ISL32459E
Half
20
No
Tx Only
No
Yes
2.1
No
8
PART
NUMBER
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
ISL32450EIBZ
ISL32450 EIBZ
-40 to +85
14 Ld SOIC
M14.15
ISL32450EIUZ
2450E
-40 to +85
10 Ld MSOP
M10.118
ISL32452EIBZ
32452 EIBZ
-40 to +85
8 Ld SOIC
M8.15
ISL32452EIUZ
2452E
-40 to +85
8 Ld MSOP
M8.118
ISL32453EIBZ
ISL32453 EIBZ
-40 to +85
14 Ld SOIC
M14.15
ISL32453EIUZ
2453E
-40 to +85
10 Ld MSOP
M10.118
ISL32455EIBZ
32455 EIBZ
-40 to +85
8 Ld SOIC
M8.15
ISL32455EIUZ
2455E
-40 to +85
8 Ld MSOP
M8.118
ISL32457EIBZ
32457 EIBZ
-40 to +85
8 Ld SOIC
M8.15
ISL32457EIUZ
2457E
-40 to +85
8 Ld MSOP
M8.118
ISL32458EIBZ
32458 EIBZ
-40 to +85
8 Ld SOIC
M8.15
ISL32459EIBZ
32459 EIBZ
-40 to +85
8 Ld SOIC
M8.15
NOTES:
1. Add “-T” suffix for 2.5k unit or “-T7A” suffix for 250 unit Tape and Reel options. Please refer to Tech Brief TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information pages for ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E,
ISL32458E, ISL32459E. For more information on MSL please see Tech Brief TB363.
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FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Pin Configurations
ISL32450E, ISL32453E
(10 LD MSOP)
TOP VIEW
ISL32450E, ISL32453E
(14 LD SOIC)
TOP VIEW
10 VCC
14 VCC
RO 1
13 NC
RE 2
9 A
RE 3
12 A
DE 3
8 B
DE 4
11 B
DI 4
10 Z
GND 5
NC 1
RO 2
DI 5
R
D
GND 6
9 Y
GND 7
8 NC
8
VCC
RO 1
RE 2
7
B/Z
INV 2
DE 3
6
A/Y
DE 3
5
GND
R
D
DI 4
D
7 Z
6 Y
ISL32457E, ISL32459E
(8 LD SOIC, 8 LD MSOP)
TOP VIEW
ISL32452E, ISL32455E, ISL32458E
(8 LD SOIC, 8 LD MSOP)
TOP VIEW
RO 1
R
R
D
DI 4
8
VCC
7
B/Z
6
A/Y
5
GND
NOTE: Evaluate creepage and clearance requirements at your maximum fault voltage before using small pitch packages (e.g., MSOP).
Truth Tables
TRANSMITTING
RECEIVING
INPUTS
OUTPUTS
INPUTS
RE
DE
DI
INV (Note 4)
Y
Z
X
1
1
0
1
0
X
1
0
0
0
1
X
1
1
1
0
1
X
1
0
1
1
0
0
0
X
X
High-Z
High-Z
1
0
X
X
High-Z
(Note 5)
High-Z
(Note 5)
NOTES:
4. Parts without the INV pin follow the rows with INV = “0” and “X”.
5. Low Power Shutdown mode (see Notes 14 and 19).
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OUTPUT
RE
(Note 19)
DE (Half
Duplex)
DE (Full
Duplex)
A-B
INV
(Note 4)
RO
0
0
X
 -0.01V
0
1
0
0
X
 -0.2V
0
0
0
0
X
 0.01V
1
1
0
0
X
 0.2V
1
0
0
0
X
Inputs
Open or
Shorted
X
1
1
0
0
X
X
High-Z
(Note 5)
1
1
1
X
X
High-Z
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Pin Descriptions
PIN
NAME
ISL32450E,
ISL32450E,
ISL32453E,
ISL32453E,
(14 LD SOIC) (10 LD MSOP)
PIN #
PIN #
ISL32452E,
ISL32455E,
ISL32458E
(8 LD SOIC,
8 LD MSOP)
PIN #
ISL32457E,
ISL32459E
(8 LD SOIC,
8 LD MSOP)
PIN #
FUNCTION
RO
2
1
1
1
Receiver output. For parts without the cable invert function - or if INV is low then: If A - B  -10mV, RO is high; if A - B  -200mV, RO is low. If INV is high, then:
If B - A  -10mV, RO is high; if B - A  -200mV, RO is low. In all cases, RO = High
if A and B are unconnected (floating), or shorted together, or connected to an
undriven, terminated bus (i.e., Rx is always fail-safe open, shorted and idle, even
if polarity is inverted).
RE
3
2
2
N/A
Receiver output enable. RO is enabled when RE is low; RO is high impedance
when RE is high. Internally pulled low.
DE
4
3
3
3
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE
high and they are high impedance when DE is low. Internally pulled high.
DI
5
4
4
4
Driver input. For parts without the cable invert function - or if INV is low - a low
on DI forces output Y low and output Z high, while a high on DI forces output Y
high and output Z low. The output states, relative to DI, invert if INV is high.
GND
6, 7
5
5
5
Ground connection.
A/Y
N/A
N/A
6
6
±60V fault protected and ±16.5kV ESD protected RS-485/RS-422 I/O pin. For
parts without the cable invert function - or if INV is low - A/Y is the noninverting
receiver input and noninverting driver output. If INV is high, A/Y is the inverting
receiver input and the inverting driver output. Pin is an input if DE = 0; pin is
an output if DE = 1.
B/Z
N/A
N/A
7
7
±60V fault protected and ±16.5kV ESD protected RS-485/RS-422 I/O pin. For
parts without the cable invert function - or if INV is low - B/Z is the inverting
receiver input and inverting driver output. If INV is high, B/Z is the noninverting
receiver input and the noninverting driver output. Pin is an input if DE = 0; pin
is an output if DE = 1.
A
12
9
N/A
N/A
±60V fault protected and ±15kV ESD protected RS-485/RS-422 noninverting
receiver input.
B
11
8
N/A
N/A
±60V fault protected and ±15kV ESD protected RS-485/RS-422 inverting
receiver input.
Y
9
6
N/A
N/A
±60V fault protected and ±15kV ESD protected RS-485/RS-422 noninverting
driver output.
Z
10
7
N/A
N/A
±60V fault protected and ±15kV ESD protected RS-485/RS-422 inverting
driver output.
VCC
14
10
8
8
System power supply input (3V to 5.5V).
INV
N/A
N/A
N/A
2
Receiver and driver cable invert (polarity selection) input. When driven high
this pin swaps the polarity of the driver output and receiver input pins. If
unconnected (floating) or connected low, normal RS-485 polarity conventions
apply. Internally pulled low.
NC
1, 8, 13
N/A
N/A
N/A
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No internal connection.
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Typical Operating Circuits
+3.3V
+3.3V
+
14
VCC
2 RO
R
0.1µF
0.1µF
+
14
RT
A 12
VCC
9 Y
10 Z
B 11
D
DI 5
3 RE
DE 4
4 DE
RE 3
RT
Z 10
5 DI
11 B
Y 9
D
GND
6, 7
RO 2
R
12 A
GND
6, 7
SOIC PINOUT SHOWN
FIGURE 3. ISL32450E, ISL32453E FULL DUPLEX NETWORK
+3.3V
+3.3V
+
8
0.1µF
0.1µF
VCC
1 RO
+
8
VCC
R
D
2 RE
B/Z
7
3 DE
A/Y
6
4 DI
RT
RT
DI 4
7
B/Z
DE 3
6
A/Y
RE 2
RO 1
R
D
GND
5
GND
5
FIGURE 4. ISL32452E, ISL32455E, ISL32458E HALF DUPLEX NETWORK
+3.3V
+3.3V
+
8
VCC
2
INV
1 RO
R
A/Y
6
B/Z
7
0.1µF
0.1µF
RT
RT
+
8
VCC
7
B/Z
6
A/Y
RO 1
R
DE 3
3 DE
4 DI
D
D
GND
5
THE IC ON THE LEFT HAS THE CABLE CONNECTIONS
SWAPPED, SO THE INV PIN IS STRAPPED HIGH TO
INVERT THE RX AND TX POLARITY
GND
DI 4
INV
2
5
FIGURE 5. ISL32457E, ISL32459E HALF DUPLEX NETWORK USING CABLE INVERT FUNCTION
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FN7921.1
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ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Absolute Maximum Ratings
Thermal Information
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, DE, RE, INV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
Input/Output Voltages
A/Y, B/Z, A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60V
A/Y, B/Z, A, B, Y, Z
(Transient Pulse Through 100Ω, Note 6) . . . . . . . . . . . . . . . . . . . ±80V
RO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V)
Short-Circuit Duration
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . see “Electrical Specifications”
Latch-Up (per JESD78, Level 2, Class A) . . . . . . . . . . . . . . . . . . . . . +125°C
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
8 Ld SOIC Package (Notes 7, 8) . . . . . . . . . .
108
47
8 Ld MSOP Package (Notes 7, 8) . . . . . . . . .
140
40
10 Ld MSOP Package (Notes 7, 8) . . . . . . . .
135
50
14 Ld SOIC Package (Notes 7, 8) . . . . . . . . .
88
39
Maximum Junction Temperature (Plastic Package). . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Recommended Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3V or 5V
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Bus Pin Common-Mode Voltage Range. . . . . . . . . . . . . . . . . . -20V to +20V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
6. Tested according to TIA/EIA-485-A, Section 4.2.6 (±80V for 15µs at a 1% duty cycle).
7. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
8. For JC, the “case temp” location is taken at the package top center.
Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V, unless otherwise specified. Typicals are at the worst case of
VCC = 5V or VCC = 3.3V, TA = +25°C (Note 9). Boldface limits apply across the operating temperature range, -40°C to +85°C.
PARAMETER
TEMP
(°C)
MIN
(Note 17)
TYP
MAX
(Note 17)
UNIT
Full
-
-
VCC
V
RL = 100Ω (RS-422), VCC ≥ 4.5V
Full
2
3
-
V
RL = 54Ω (RS-485)
VCC ≥ 4.5V
Full
1.7
2.3
VCC
V
VCC ≥ 3V
Full
1.1
1.3
VCC
V
SYMBOL
TEST CONDITIONS
DC CHARACTERISTICS
Driver Differential VOUT (No load)
VOD1
Driver Differential VOUT (Loaded,
Figure 6A)
VOD2
Change in Magnitude of Driver
Differential VOUT for Complementary
Output States
VOD
RL = 54Ω or 100Ω (Figure 6A)
Full
-
-
0.2
V
Driver Differential VOUT with
Common-Mode Load (Figure 6B)
VOD3
RL = 60Ω, -20V ≤ VCM ≤ 20V, VCC ≥ 4.5V
Full
1.5
-
-
V
Driver Common-Mode VOUT
(Figure 6A)
VOC
RL = 54Ω or 100Ω
Full
-1
-
3
V
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
VOC
RL = 54Ω or 100Ω (Figure 6A)
Full
-
-
0.2
V
Driver Short-Circuit Current
IOSD
DE = VCC, -20V ≤ VO ≤ 20V (Note 11)
Full
-250
-
250
mA
IOSD1
At first fold-back, 24V ≤ VO ≤ -24V
Full
-83
-
83
mA
IOSD2
At second fold-back, 35V ≤ VO ≤ -35V
Full
-13
-
13
mA
Logic Input High Voltage
VIH
DE, DI, RE, INV (See Figure 33)
Full
2.35
-
-
V
Logic Input Low Voltage
VIL
DE, DI, RE, INV
Full
-
-
0.8
V
Logic Input Current
IIN1
DI
Full
-1
-
1
µA
DE, RE, INV
Full
-15
6
15
µA
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FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V, unless otherwise specified. Typicals are at the worst case of
VCC = 5V or VCC = 3.3V, TA = +25°C (Note 9). Boldface limits apply across the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
Input/Output Current (A/Y, B/Z)
IIN2
Input Current (A, B)
(Full Duplex Versions Only)
IIN3
Output Leakage Current (Y, Z)
(Full Duplex Versions Only)
IOZD
TEST CONDITIONS
DE = 0V, VCC = 0V or VIN = 12V
3.6V or 5.5V
VIN = -7V
VCC = 0V or 3.6V or
5.5V
TYP
MAX
(Note 17)
UNIT
Full
-
-
250
µA
Full
-200
-
-
µA
VIN = ±20V
Full
-800
-
850
µA
VIN = ±60V, (Note 18)
Full
-6
-
6
mA
VIN = 12V
Full
-
-
125
µA
VIN = -7V
Full
-100
-
-
µA
VIN = ±20V
Full
-500
-
500
µA
VIN = ±60V, (Note 18)
Full
-3
-
3
mA
Full
-
-
200
µA
VIN = -7V
Full
-100
-
-
µA
VIN = ±20V
Full
-500
-
500
µA
VIN = ±60V, (Note 18)
Full
-3
-
3
mA
VCC ≤ 3.6V
-20V ≤ VCM ≤ 20V,
(For ISL32457E and
ISL32459E only, A-B VCC ≥ 4.5V
if INV = 0; B-A if
INV = 1)
Full
-200
-120
-10
mV
Full
-250
-180
-10
mV
+25
-
30
-
mV
Full
2.4
-
-
V
VTH
Receiver Input Hysteresis
VTH
-20V ≤ VCM ≤ 20V
Receiver Output High Voltage
VOH1
VID = -10mV
VOH2
VOL
MIN
(Note 17)
VIN = 12V
RE = 0V, DE = 0V,
VCC = 0V or 3.6V or
5.5V
Receiver Differential Threshold
Voltage
Receiver Output Low Voltage
TEMP
(°C)
IO = -4mA, VCC ≥ 3V
Full
2.4
-
-
V
IO = 4mA, VCC ≥ 3V, VID = -200mV
IO = -8mA, VCC ≥ 4.5V
Full
-
-
0.4
V
IO = 5mA, VCC ≥ 4.5V, VID = -250mV
Full
-
-
0.4
V
Three-State (High Impedance)
Receiver Output Current (Note 19)
IOZR
0V ≤ VO ≤ VCC
Full
-1
0.01
1
µA
Receiver Short-Circuit Current
IOSR
0V ≤ VO ≤ VCC
Full
-
-
±115
mA
DE = VCC, RE = 0V or VCC, DI = 0V or VCC
Full
-
2.1
4.5
mA
DE = 0V, RE = VCC, DI = 0V or VCC
Full
-
10
35
µA
Human Body Model
(ISL32450E, ISL32452E, ISL32453E,
ISL32455E, ISL32457E; Tested per JESD22A114E)
+25
-
±8
-
kV
Human Body Model
(ISL32458E, ISL32459E; Tested per JESD22A114E)
+25
-
±3
-
kV
Machine Model
(Tested per JESD22-A115-A)
+25
-
±700
-
V
Human Body Model, Full Duplex
From Bus Pins to
Half Duplex
GND
+25
-
±15
-
kV
+25
-
±16.5
-
kV
SUPPLY CURRENT
No-Load Supply Current (Note 10)
ICC
Shutdown Supply Current (Note 19)
ISHDN
ESD PERFORMANCE
All Pins
RS-485 Pins (A, B, Y, Z,
A/Y, B/Z)
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7
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V, unless otherwise specified. Typicals are at the worst case of
VCC = 5V or VCC = 3.3V, TA = +25°C (Note 9). Boldface limits apply across the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 17)
TYP
MAX
(Note 17)
UNIT
DRIVER SWITCHING CHARACTERISTICS (250kbps VERSIONS; ISL32450E, ISL32452E, ISL32457E)
Driver Differential Output Delay
tPLH, tPHL
RD = 54Ω, CD = 50pF (Figure 7)
Full
-
280
1000
ns
Driver Differential Output Skew
tSKEW
RD = 54Ω, CD = 50pF (Figure 7)
Full
-
4
100
ns
Driver Differential Rise or Fall Time
tR, tF
RD = 54Ω, CD = 50pF (Figure 7)
Full
250
650
1500
ns
Maximum Data Rate
fMAX
CD = 820pF (Figure 9)
Full
250
-
-
kbps
Driver Enable to Output High
tZH
SW = GND (Figure 8), (Note 12)
Full
-
-
1600
ns
Driver Enable to Output Low
tZL
SW = VCC (Figure 8), (Note 12)
Full
-
-
1600
ns
Driver Disable from Output Low
tLZ
SW = VCC (Figure 8)
Full
-
-
300
ns
Driver Disable from Output High
tHZ
SW = GND (Figure 8)
Full
-
-
300
ns
(Notes 14, 19)
Full
60
160
600
ns
Time to Shutdown
tSHDN
Driver Enable from Shutdown to
Output High
tZH(SHDN)
SW = GND (Figure 8), (Notes 14, 15, 19)
Full
-
-
3000
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
SW = VCC (Figure 8), (Notes 14, 15, 19)
Full
-
-
3000
ns
-
70
200
ns
DRIVER SWITCHING CHARACTERISTICS (1Mbps VERSIONS; ISL32453E, ISL32455E)
Driver Differential Output Delay
tPLH, tPHL
RD = 54Ω, CD = 50pF (Figure 7)
Full
Driver Differential Output Skew
tSKEW
RD = 54Ω, CD = 50pF (Figure 7)
Full
-
4
25
ns
Driver Differential Rise or Fall Time
tR, tF
RD = 54Ω, CD = 50pF (Figure 7)
Full
50
130
300
ns
Maximum Data Rate
fMAX
CD = 820pF (Figure 9)
Full
1
-
-
Mbps
Driver Enable to Output High
tZH
SW = GND (Figure 8), (Note 12)
Full
-
-
300
ns
Driver Enable to Output Low
tZL
SW = VCC (Figure 8), (Note 12)
Full
-
-
300
ns
Driver Disable from Output Low
tLZ
SW = VCC (Figure 8)
Full
-
-
300
ns
tHZ
SW = GND (Figure 8)
Full
-
-
300
ns
(Note 14)
Full
60
160
600
ns
Driver Disable from Output High
Time to Shutdown
tSHDN
Driver Enable from Shutdown to
Output High
tZH(SHDN)
SW = GND (Figure 8), (Notes 14, 15)
Full
-
-
3000
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
SW = VCC (Figure 8), (Notes 14, 15)
Full
-
-
3000
ns
DRIVER SWITCHING CHARACTERISTICS (20Mbps VERSIONS; ISL32458E, ISL32459E)
Driver Differential Output Delay
tPLH, tPHL
RD = 54Ω, CD = 50pF (Figure 7)
Full
-
28
45
ns
Driver Differential Output Skew
tSKEW
RD = 54Ω, CD = 50pF (Figure 7)
Full
-
3
9
ns
Driver Differential Rise or Fall Time
tR, tF
RD = 54Ω, CD = 50pF (Figure 7)
Full
-
17
35
ns
Maximum Data Rate
fMAX
CD = 470pF (Figure 9)
Full
20
-
-
Mbps
Full
-
-
180
ns
Driver Enable to Output High
tZH
SW = GND (Figure 8), (Note 12)
Driver Enable to Output Low
tZL
SW = VCC (Figure 8), (Note 12)
Full
-
-
180
ns
Driver Disable from Output Low
tLZ
SW = VCC (Figure 8)
Full
-
-
300
ns
Driver Disable from Output High
tHZ
SW = GND (Figure 8)
Full
-
-
300
ns
(Notes 14, 19)
Full
60
160
600
ns
SW = GND (Figure 8), (Notes 14, 15, 19)
Full
-
-
3000
ns
Time to Shutdown
tSHDN
Driver Enable from Shutdown to
Output High
Submit Document Feedback
tZH(SHDN)
8
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V, unless otherwise specified. Typicals are at the worst case of
VCC = 5V or VCC = 3.3V, TA = +25°C (Note 9). Boldface limits apply across the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
TEST CONDITIONS
SW = VCC (Figure 8), (Notes 14, 15, 19)
TEMP
(°C)
MIN
(Note 17)
TYP
MAX
(Note 17)
UNIT
Full
-
-
3000
ns
RECEIVER SWITCHING CHARACTERISTICS (250kbps VERSIONS; ISL32450E, ISL32452E, ISL32457E)
Maximum Data Rate
Receiver Input to Output Delay
Receiver Skew |tPLH - tPHL |
fMAX
(Figure 10)
Full
250
-
-
kbps
tPLH, tPHL
(Figure 10)
Full
-
240
325
ns
tSKD
(Figure 10)
Full
-
6
25
ns
Receiver Enable to Output Low
tZL
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11),
(Notes 13, 19)
Full
-
-
80
ns
Receiver Enable to Output High
tZH
RL = 1kΩ, CL = 15pF, SW = GND (Figure 11),
(Notes 13, 19)
Full
-
-
80
ns
Receiver Disable from Output Low
tLZ
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11),
(Note 19)
Full
-
-
80
ns
Receiver Disable from Output High
tHZ
RL = 1kΩ, CL = 15pF, SW = GND (Figure 11),
(Note 19)
Full
-
-
80
ns
(Notes 14, 19)
Full
60
160
600
ns
Time to Shutdown
tSHDN
Receiver Enable from Shutdown to
Output High
tZH(SHDN)
RL = 1kΩ, CL = 15pF, SW = GND (Figure 11),
(Notes 14, 16, 19)
Full
-
-
2500
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11),
(Notes 14, 16, 19)
Full
-
-
2500
ns
RECEIVER SWITCHING CHARACTERISTICS (1Mbps VERSIONS; ISL32453E, ISL32455E)
Maximum Data Rate
Receiver Input to Output Delay
Receiver Skew |tPLH - tPHL |
fMAX
(Figure 10)
Full
1
-
-
Mbps
tPLH, tPHL
(Figure 10)
Full
-
115
200
ns
tSKD
(Figure 10)
Full
-
4
20
ns
Receiver Enable to Output Low
tZL
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11),
(Note 13)
Full
-
-
80
ns
Receiver Enable to Output High
tZH
RL = 1kΩ, CL = 15pF, SW = GND (Figure 11),
(Note 13)
Full
-
-
80
ns
Receiver Disable from Output Low
tLZ
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11)
Full
-
-
80
ns
Receiver Disable from Output High
tHZ
RL = 1kΩ, CL = 15pF, SW = GND (Figure 11)
Full
-
-
80
ns
(Note 14)
Full
60
160
600
ns
Time to Shutdown
tSHDN
Receiver Enable from Shutdown to
Output High
tZH(SHDN)
RL = 1kΩ, CL = 15pF, SW = GND (Figure 11),
(Notes 14, 16)
Full
-
-
2500
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11),
(Notes 14, 16)
Full
-
-
2500
ns
RECEIVER SWITCHING CHARACTERISTICS (20Mbps VERSIONS; ISL32458E, ISL32459E)
Maximum Data Rate
Receiver Input to Output Delay
Receiver Skew |tPLH - tPHL |
fMAX
(Figure 10)
Full
20
-
-
Mbps
tPLH, tPHL
(Figure 10)
Full
-
40
80
ns
tSKD
(Figure 10)
Full
-
3
9
ns
Receiver Enable to Output Low
tZL
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11),
(Notes 13, 19)
Full
-
-
80
ns
Receiver Enable to Output High
tZH
RL = 1kΩ, CL = 15pF, SW = GND (Figure 11),
(Notes 13, 19)
Full
-
-
80
ns
Receiver Disable from Output Low
tLZ
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11),
(Note 19)
Full
-
-
80
ns
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9
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V, unless otherwise specified. Typicals are at the worst case of
VCC = 5V or VCC = 3.3V, TA = +25°C (Note 9). Boldface limits apply across the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
TEMP
(°C)
MIN
(Note 17)
TYP
MAX
(Note 17)
UNIT
RL = 1kΩ, CL = 15pF, SW = GND (Figure 11),
(Note 19)
Full
-
-
80
ns
(Notes 14, 19)
Full
60
160
600
ns
SYMBOL
Receiver Disable from Output High
Time to Shutdown
tHZ
tSHDN
TEST CONDITIONS
Receiver Enable from Shutdown to
Output High
tZH(SHDN)
RL = 1kΩ, CL = 15pF, SW = GND (Figure 11),
(Notes 14, 16, 19)
Full
-
-
2500
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11),
(Notes 14, 16, 19)
Full
-
-
2500
ns
NOTES:
9. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
10. Supply current specification is valid for loaded drivers when DE = 0V.
11. Applies to peak current. See “Typical Performance Curves” beginning on page 15 for more information.
12. Keep RE = 0 to prevent the device from entering SHDN (does not apply to the ISL32457E and ISL32459E).
13. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
14. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not to enter
shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low Power Shutdown Mode” on
page 14
15. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
16. Set the RE signal high time >600ns to ensure that the device enters SHDN.
17. Compliance to data sheet limits is assured by one or more methods: production test, characterization and/or design.
18. See “Caution” statement below the “Recommended Operating Conditions” on page 6.
19. Does not apply to the ISL32457E and ISL32459E. These transceivers have no Rx enable function, and thus no SHDN function.
Test Circuits and Waveforms
VCC
RL/2
DE
DI
VCC
Z
DI
VOD
D
RL/2
DE
Y
375Ω
Z
VCM
VOD
D
Y
RL/2
FIGURE 6A. VOD AND VOC
VOC
RL/2
375Ω
FIGURE 6B. VOD WITH COMMON-MODE LOAD
FIGURE 6. DC DRIVER TEST CIRCUITS
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10
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Test Circuits and Waveforms (Continued)
3V
DI
50%
50%
0V
VCC
DE
tPLH
Z
DI
OUT (Z)
VOH
OUT (Y)
VOL
RD
CD
D
tPHL
Y
SIGNAL
GENERATOR
90%
DIFF OUT (Y - Z)
+VOD
90%
10%
10%
tR
-VOD
tF
SKEW = |tPLH - tPHL|
FIGURE 7B. MEASUREMENT POINTS
FIGURE 7A. TEST CIRCUIT
FIGURE 7. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE
Z
DI
110Ω
VCC
D
SIGNAL
GENERATOR
SW
Y
GND
3V
DE
Note 14
CL
tZH, tZH(SHDN)
Note 14
PARAMETER
OUTPUT
RE
DI
SW
CL (pF)
tHZ
Y/Z
X
1/0
GND
50
tLZ
Y/Z
X
0/1
VCC
50
tZH
Y/Z
0 (Note 12)
1/0
GND
100
tZL
Y/Z
0 (Note 12)
0/1
VCC
100
tZH(SHDN)
Y/Z
1 (Note 15)
1/0
GND
100
tZL(SHDN)
Y/Z
1 (Note 15)
0/1
VCC
100
50%
50%
0V
tHZ
OUTPUT HIGH
VOH
VOH - 0.5V
50%
OUT (Y, Z)
0V
tZL, tZL(SHDN)
tLZ
Note 14
VCC
OUT (Y, Z)
50%
VOL + 0.5V
VOL
OUTPUT LOW
FIGURE 8A. TEST CIRCUIT
FIGURE 8B. MEASUREMENT POINTS
FIGURE 8. DRIVER ENABLE AND DISABLE TIMES
VCC
3V
DE
+
Z
DI
54Ω
D
Y
CD
DI
0V
VOD
-
SIGNAL
GENERATOR
DIFF OUT (Y - Z)
FIGURE 9A. TEST CIRCUIT
+VOD
-VOD
0V
FIGURE 9B. MEASUREMENT POINTS
FIGURE 9. DRIVER DATA RATE
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11
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Test Circuits and Waveforms (Continued)
RE
B
B
R
A
SIGNAL
GENERATOR
+2.25V
15pF
RO
1.5V
1.5V
+750mV
A
tPHL
tPLH
SIGNAL
GENERATOR
VCC
50%
RO
50%
+1.5V
0V
FIGURE 10A. TEST CIRCUIT
FIGURE 10B. MEASUREMENT POINTS
FIGURE 10. RECEIVER PROPAGATION DELAY AND DATA RATE
RE
B
A
R
VCC
1kΩ
RO
SIGNAL
GENERATOR
15pF
SW
Note 14
GND
RE
3V
50%
50%
0V
tZH, tZH(SHDN)
Note 14
PARAMETER
DE
A
SW
tHZ
0
+1.5V
GND
tLZ
0
-1.5V
VCC
tZH (Note 13)
0
+1.5V
GND
tZL (Note 13)
0
-1.5V
VCC
Note 14
RO
tZH(SHDN) (Note 16)
0
+1.5V
GND
tZL(SHDN) (Note 16)
0
-1.5V
VCC
FIGURE 11A. TEST CIRCUIT
tHZ
OUTPUT HIGH
VOH - 0.5V
1.5V
RO
VOH
0V
tZL, tZL(SHDN)
tLZ
VCC
1.5V
VOL + 0.5V
OUTPUT LOW
VOL
FIGURE 11B. MEASUREMENT POINTS
FIGURE 11. RECEIVER ENABLE AND DISABLE TIMES
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12
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards used for long haul or noisy environments.
RS-422 is a subset of RS-485, so RS-485 transceivers are also
RS-422 compliant. RS-422 is a point-to-multipoint (multidrop)
standard, which allows only one driver and up to 10 (assuming
one unit load devices) receivers on each bus. RS-485 is a true
multipoint standard, which allows up to 32 one unit load devices
(any combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 specification requires that
drivers must handle bus contention without sustaining any
damage.
Driver (Tx) Features
The RS-485/RS-422 driver is a differential output device that
delivers at least 1.7V across a 54Ω load (RS-485), and at least 2V
across a 100Ω load (RS-422) with VCC ≥ 4.5V. The drivers feature
low propagation delay skew to maximize bit width and to
minimize EMI, and all drivers are tri-statable via the active high
DE input.
The 250kbps and 1Mbps driver outputs are slew rate limited to
minimize EMI and to minimize reflections in unterminated or
improperly terminated networks. Outputs of the ISL32458E and
ISL32459E drivers are not limited; thus, faster output transition
times allow data rates of at least 20Mbps.
Another important advantage of RS-485 is the extended
common-mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as long as
4000 feet; thus, the wide CMR is necessary to handle ground
potential differences, as well as voltages induced in the cable by
external fields.
High Overvoltage (Fault) Protection
Increases Ruggedness
The ISL32450E, ISL32452E, ISL32453E, ISL32455E,
ISL32457E, ISL32458E, ISL32459E are a family of ruggedized
RS-485 transceivers that improve on the RS-485 basic
requirements and therefore increases system reliability. The
CMR increases to ±20V, while the RS-485 bus pins (receiver
inputs and driver outputs) include fault protection against
voltages and transients up to ±60V. Additionally, the ±15kV to
±16.5kV built-in ESD protection complements the fault
protection.
The ±60V (referenced to the IC GND) fault protection on the
RS-485 pins makes these transceivers some of the most rugged
on the market. This level of protection makes the ISL32450E,
ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E,
ISL32459E ideal for applications in which power (e.g., 24V and
48V supplies) must be routed in the conduit with the data lines and
for outdoor applications where large transients are likely to occur.
When power is routed with the data lines, even a momentary short
between the supply and data lines will destroy an unprotected device.
The ±60V fault levels of this family are at least four times higher than
the levels specified for standard RS-485 ICs. The ISL32450E,
ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E,
ISL32459E protection is active whether the Tx is enabled or
disabled, and even if the IC is powered down.
Receiver (Rx) Features
These devices utilize a differential input receiver for maximum
noise immunity and common-mode rejection. Input sensitivity is
better than ±200mV (3.3V operation), as required by the RS-422
and RS-485 specifications.
Receiver input (load) current surpasses the RS-422 specification
of 3mA, and is four times lower than the RS-485 “Unit Load (UL)”
requirement of 1mA maximum. Thus, these products are known
as “one-quarter UL” transceivers, and there can be up to 128 of
these devices on a network while still complying with the RS-485
loading specification.
The Rx functions with common-mode voltages as great as ±20V,
making them ideal for industrial or long networks where induced
voltages are a realistic concern.
All the receivers include a “full fail-safe” function that guarantees
a high level receiver output if the receiver inputs are unconnected
(floating), shorted together, or connected to a terminated bus
with all the transmitters disabled (i.e., an idle bus).
Receivers easily meet the data rates supported by the
corresponding driver, and most receiver outputs are tri-statable
via the active low RE input.
The Rx in the 250kbps and 1Mbps versions include noise filtering
circuitry to reject high frequency signals. The 1Mbps version
typically rejects pulses narrower than 50ns (equivalent to
20Mbps), while the 250kbps Rx rejects pulses below 150ns
(6.7Mbps). The 20Mbps versions have no Rx noise filtering.
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13
NOTE: The available smaller pitch package (MSOP) may not meet the
Creepage and Clearance (C&C) requirements for ±60V levels. The user is
advised to determine his C&C requirements before selecting a package
type.
If transients or voltages (including overshoots and ringing)
greater than ±60V are possible, then additional external
protection is required. Use a protection device with the lowest
clamping voltage acceptable for the application, and remember
that TVS type devices typically clamp 5V to 10V above the
designated stand-off voltage (e.g., a “54V TVS” clamps between
60V and 66V).
Wide Common-Mode Voltage (CMV) Tolerance
Improves Operating Range
RS-485 networks operating in industrial complexes or over long
distances are susceptible to large CMV variations. Either of these
operating environments may suffer from large node-to-node
ground potential differences or CMV pickup from external
electromagnetic sources, and devices with only the minimum
required +12V to -7V CMR may malfunction. The ISL32450E,
ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E,
ISL32459E extended ±20V CMR allows for operation in
environments that would overwhelm lesser transceivers.
Additionally, the Rx will not phase invert (erroneously change
state) even with CMVs of ±25V or differential voltages as large as
40V.
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Cable Invert (Polarity Reversal) Function
With large node count RS-485 networks, it is common for some
cable data lines to be wired backwards during installation. When
this happens, the node is unable to communicate over the
network. Once a technician finds the miswired node, he must
then rewire the connector, which is time consuming.
The ISL32457E and ISL32459E simplify this task by including a
cable invert pin (INV) that allows the technician to invert the
polarity of the Rx input and the Tx output pins simply by moving a
jumper to change the state of the invert pin. When the invert pin
is low, the IC operates like any standard RS-485 transceiver, and
the bus pins have their normal polarity definition of A and Y as
noninverting and B and Z as inverting. With the invert pin high,
the corresponding bus pins reverse their polarity, so B and Z
become noninverting, and A and Y become inverting.
Intersil’s unique cable invert function is superior to that found on
competing devices, because the Rx full fail-safe function is
maintained, even when the Rx polarity is reversed. Competitor
devices implement the Rx invert function simply by inverting the
Rx output. This means that with the Rx inputs floating or shorted
together, the Rx appropriately delivers a logic 1 in normal
polarity, but outputs a logic low when the IC is operated in the
inverted mode. Intersil’s innovative Rx design guarantees that,
with the Rx inputs floating or shorted together (VID = 0V), the Rx
output remains high, regardless of the state of the invert pin.
connecting a transceiver to the main cable should be kept as
short as possible.
Built-In Driver Overload Protection
As stated previously, the RS-485 specification requires that
drivers survive worst-case bus contentions undamaged. These
transceivers meet this requirement via driver output short-circuit
current limits and on-chip thermal shutdown circuitry.
The driver output stages incorporate a double fold-back
short-circuit current limiting scheme, which ensures that the
output current never exceeds the RS-485 specification, even at
the common-mode and fault condition voltage range extremes.
The first fold-back current level (≈83mA) is set to ensure that the
driver never folds back when driving loads with common-mode
voltages up to ±20V. The very low second fold-back current
setting (≈13mA) minimizes power dissipation if the Tx is enabled
when a fault occurs.
In the event of a major short-circuit condition, devices also include
a thermal shutdown feature that disables the drivers whenever the
die temperature becomes excessive. This eliminates the power
dissipation, allowing the die to cool. The drivers automatically
re-enable after the die temperature drops about +15°C. If the
contention persists, the thermal shutdown/re-enable cycle repeats
until the fault is cleared. Receivers stay operational during thermal
shutdown.
Data Rate, Cables and Terminations
Low Power Shutdown Mode
RS-485/RS-422 are intended for network lengths up to 4000ft,
but the maximum system data rate decreases as the
transmission length increases. High speed versions operating at
These BiCMOS transceivers all use a fraction of the power
required by competitive devices, but they (excluding ISL32457E
and ISL32459E) also include a shutdown feature that reduces
the already low quiescent ICC to a 10µA trickle. These devices
enter shutdown whenever the receiver and driver are
simultaneously disabled (RE = VCC and DE = GND) for a period of
at least 600ns. Disabling both the driver and the receiver for less
than 60ns guarantees that the transceiver will not enter
shutdown.
20Mbps may be used at lengths up to 150ft (46m), but the distance
can be increased to 328ft (100m) by operating them at 5Mbps.
1Mbps versions can operate at full data rates with lengths up to
800ft (244m). Jitter is the limiting parameter at faster data rates,
and may limit the network to shorter lengths, so employing
encoded data streams (e.g., Manchester coded or Return-to-Zero)
may allow increased transmission distances. The slow versions
can operate at 115kbps or less at the full 4000ft (1220m)
distance, or at 250kbps for lengths up to 3000ft (915m). DC
cable attenuation is the limiting parameter, so using better
quality cables (e.g., 22 AWG) may allow increased transmission
distance.
Note that receiver and driver enable times increase when the
transceiver enables from shutdown. Refer to Notes 12, 13, 14,
15 and 16, at the end of the “Electrical Specification” table on
page 10, for more information.
Twisted pair is the cable of choice for RS-485/RS-422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common-mode signals,
which are effectively rejected by the differential receivers in
these ICs.
To minimize reflections, proper termination is imperative when using
the 20Mbps devices. Short networks using the 250kbps versions
need not be terminated; however, terminations are
recommended unless power dissipation is an overriding concern.
In point-to-point or point-to-multireceiver (single driver on bus like
RS-422) networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multireceiver applications, stubs connecting
receivers to the main cable should be kept as short as possible.
Multipoint (multidriver) systems require that the main cable be
terminated in its characteristic impedance at both ends. Stubs
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14
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Typical Performance Curves
RD = 20Ω
70
RD = 30Ω
+25°C
60
DIFFERENTIAL OUTPUT VOLTAGE (V)
3.25
80
DRIVER OUTPUT CURRENT (mA)
TA = +25°C; unless otherwise specified.
RD = 54Ω
+85°C
+25°C
50
40
+85°C
RD = 100Ω
30
20
VCC = 5V
10
0
VCC = 3.3V
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VCC = 5V
3.00
2.75
RD = 100Ω
VCC = 5V
2.50
RD = 54Ω
2.25
2.00
1.75
RD = 100Ω
VCC = 3.3V
RD = 54Ω
1.50
1.25
-40 -30 -20 -10
5.0
DIFFERENTIAL OUTPUT VOLTAGE (V)
VCC = 3.3V
0
10
20
30
40
50
60
FIGURE 12. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT
VOLTAGE
80
VOL, +25°C
2.1
VCC = 5V
2.0
DE = GND, RE = GND
1.9
VCC = 5V
1.8
DE = VCC, RE = X
1.7
VCC = 3.3V
1.6
DE = GND, RE = GND
1.5
VCC = 3.3V
1.4
-40 -30 -20 -10
0
10
20
30
40
50
60
70
RECEIVER OUTPUT CURRENT (mA)
DE = VCC, RE = X
ICC (mA)
80 85
FIGURE 13. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
2.2
VCC = 5V
60
VOL, +85°C
VOL, +25°C
VCC = 3.3V
40
VOL, +85°C
20
VCC = 3.3V
0
VOH, +85°C
-20
VOH, +85°C
-40
-60
80 85
FIGURE 14. SUPPLY CURRENT vs TEMPERATURE
0
150
VCC = 0V TO 5.5V
125
800
100
OUTPUT CURRENT (mA)
400
200
0
Y OR Z
-200
75
-600
-70 -60 -50 -40 -30 -20 -10 0
10 20 30 40 50 60 70
BUS PIN VOLTAGE (V)
FIGURE 16. BUS PIN CURRENT vs BUS PIN VOLTAGE
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15
1.5 2.0
2.5 3.0
3.5 4.0
RECEIVER OUTPUT VOLTAGE (V)
4.5
5.0
VCC = 5V, +25°C
VCC = 5V, +85°C
VCC = 3.3V, +85°C
VCC = 3.3V, +25°C
Y OR Z = LOW
25
0
-25
-50
-100
A/Y OR B/Z
1.0
50
-75
-400
0.5
FIGURE 15. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE
1000
600
VCC = 5V
VOH, +25°C
VOH, +25°C
TEMPERATURE (°C)
BUS PIN CURRENT (µA)
70
TEMPERATURE (°C)
VCC = 3.3V, +25°C
Y OR Z = HIGH
VCC = 3.3V, +85°C
VCC = 5V, +85°C
-125
-60 -50 -40 -30 -20 -10
VCC = 5V, +25°C
0
10
20
30
40
50
60
OUTPUT VOLTAGE (V)
FIGURE 17. DRIVER OUTPUT CURRENT vs SHORT-CIRCUIT VOLTAGE
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Typical Performance Curves
300
6
tPHL
VCC = 3.3V
270
5
tPLH
260
SKEW (ns)
PROPAGATION DELAY (ns)
7
RD = 54Ω, CD = 50pF
290
280
TA = +25°C; unless otherwise specified. (Continued)
250
240
230
tPLH
220
VCC = 5V
4
3
2
VCC = 3.3V
VCC = 5V
tPHL
1
210
|tPLH - tPHL|
200
-40 -30 -20 -10
0
10
20
30
40
50
60
70
0
80 85
-40 -30 -20 -10
0
10 20 30 40 50
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 18. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE (ISL32450E, ISL32452E, ISL32457E)
70
80 85
4.5
RD = 54Ω, CD = 50pF
tPLH
VCC = 3.3V
4.0
VCC = 5V
3.5
tPHL
3.0
65
60
0
10
2.0
VCC = 3.3V
1.0
VCC = 5V
55
50
-40 -30 -20 -10
2.5
1.5
tPLH
tPHL
0.5
20
30
40
50
60
70
|tPLH - tPHL|
0
-40 -30 -20 -10
80 85
0
TEMPERATURE (°C)
VCC = 3.3V
tPHL
20
3.0
tPLH
VCC = 5V
tPHL
15
10
50
60
70
80 85
VCC = 5V
2.5
2.0
VCC = 3.3V
1.5
1.0
5
0.5
0
10
20
30
40
50
60
70
TEMPERATURE (°C)
FIGURE 22. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE (ISL32458E, ISL32459E)
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40
3.5
tPLH
0
-40 -30 -20 -10
30
4.0
RD = 54Ω, CD = 50pF
30
25
20
FIGURE 21. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
(ISL32453E, ISL32455E)
SKEW (ns)
35
10
TEMPERATURE (°C)
FIGURE 20. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE (ISL32453E, ISL32455E)
PROPAGATION DELAY (ns)
70
FIGURE 19. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
(ISL32450E, ISL32452E, ISL32457E)
SKEW (ns)
PROPAGATION DELAY (ns)
75
60
16
80 85
|tPLH - tPHL|
0
-40 -30 -20 -10
0
10
20
30
40
50
60
70
80 85
TEMPERATURE (°C)
FIGURE 23. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
(ISL32458E, ISL32459E)
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Typical Performance Curves
A
10
VID = ±1V
250kbps
10
VCC = 5V
RO
0
VCC = 3.3V
VCC = 5V
5
RO
0
VCC = 3.3V
-10
-15
A
-20
RO
0
-10
VCC = 3.3V
A
-20
B
VCC = 3.3V
VCC = 5V
5
-5
-15
RO
0
-5
VID = ±1V
1Mbps
VCC = 5V
5
VOLTAGE (V)
5
B
15
B
TIME (1µs/DIV)
TIME (400ns/DIV)
A
20
B
15
10
VID = ±1V
20Mbps
VCC = 5V
5
RO
0
VCC = 3.3V
VCC = 5V
5
RO
0
DRIVER OUTPUT (V)
VOLTAGE (V)
FIGURE 25. ±20V RECEIVER PERFORMANCE (ISL32453E,
ISL32455E)
VCC = 3.3V
-5
-10
-15
A
-20
RECEIVER OUTPUT (V)
FIGURE 24. ±20V RECEIVER PERFORMANCE (ISL32450E,
ISL32452E, ISL32457E)
B
RD = 54Ω, CD = 50pF
3
DI
0
3
RO
0
2
1
0
A/Y - B/Z
-1
-2
TIME (1µs/DIV)
TIME (20ns/DIV)
3
0
3
0
RO
2
1
0
A/Y - B/Z
-1
-2
TIME (400ns/DIV)
FIGURE 28. VCC = 3.3V, DRIVER AND RECEIVER WAVEFORMS
(ISL32453E, ISL32455E)
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RECEIVER OUTPUT (V)
RD = 54Ω, CD = 50pF
DRIVER INPUT (V)
FIGURE 27. VCC = 3.3V, DRIVER AND RECEIVER WAVEFORMS
(ISL32450E, ISL32452E, ISL32457E)
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
FIGURE 26. ±20V RECEIVER PERFORMANCE (ISL32458E,
ISL32459E)
DI
17
DRIVER INPUT (V)
15
A
20
B
RD = 54Ω, CD = 50pF
3
DI
0
3
0
RO
DRIVER INPUT (V)
20
VOLTAGE (V)
TA = +25°C; unless otherwise specified. (Continued)
2
1
0
A/Y - B/Z
-1
-2
TIME (20ns/DIV)
FIGURE 29. VCC = 3.3V, DRIVER AND RECEIVER WAVEFORMS
(ISL32458E, ISL32459E)
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
5
RO
0
3
2
1
0
-1
-2
-3
A/Y - B/Z
RD = 54Ω, CD = 50pF
0
5
0
RO
3
2
1
0
-1
A/Y - B/Z
-2
-3
TIME (400ns/DIV)
TIME (1µs/DIV)
FIGURE 31. VCC = 5V, DRIVER AND RECEIVER WAVEFORMS
(ISL32453E, ISL32455E)
5
0
5
0
RO
3
2
1
0
-1
-2
-3
DRIVER INPUT (V)
DI
2.4
2.2
INPUT HIGH VOLTAGE (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
FIGURE 30. VCC = 5V, DRIVER AND RECEIVER WAVEFORMS
(ISL32450E, ISL32452E, ISL32457E)
RD = 54Ω, CD = 50pF
5
DI
DRIVER INPUT (V)
0
RECEIVER OUTPUT (V)
DI
5
DRIVER INPUT (V)
RD = 54Ω, CD = 50pF
TA = +25°C; unless otherwise specified. (Continued)
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
Typical Performance Curves
VCC = 5V
2.0
1.8
1.6
VCC = 3.3V
1.4
1.2
A/Y - B/Z
1.0
-40 -30 -20 -10
TIME (20ns/DIV)
FIGURE 32. VCC = 5V, DRIVER AND RECEIVER WAVEFORMS
(ISL32458E, ISL32459E)
0
10
20
30
40
50
60
70
80 85
TEMPERATURE (°C)
FIGURE 33. LOGIC INPUT HIGH VOLTAGE vs TEMPERATURE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
PROCESS:
Si Gate BiCMOS
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FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest Rev.
DATE
REVISION
CHANGE
December 1, 2015
FN7921.1
Added 20Mbps versions (ISL32458E and ISL32459E) to datasheet.
Replaced Products section with About Intersil verbiage.
Updated Package Outline Drawing M10.118 to the latest version. Changes are as follows:
-Updated to new POD template. Added land pattern.
February 20, 2012
FN7921.0
Initial Release
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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19
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 7/11
5
3.0±0.05
A
DETAIL "X"
D
8
1.10 MAX
SIDE VIEW 2
0.09 - 0.20
4.9±0.15
3.0±0.05
5
0.95 REF
PIN# 1 ID
1
2
B
0.65 BSC
GAUGE
PLANE
TOP VIEW
0.55 ± 0.15
0.25
3°±3°
0.85±010
H
DETAIL "X"
C
SEATING PLANE
0.25 - 0.36
0.08 M C A-B D
0.10 ± 0.05
0.10 C
SIDE VIEW 1
(5.80)
NOTES:
(4.40)
(3.00)
1. Dimensions are in millimeters.
(0.65)
(0.40)
(1.40)
TYPICAL RECOMMENDED LAND PATTERN
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20
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 1/12
DETAIL "A"
1.27 (0.050)
0.40 (0.016)
INDEX
6.20 (0.244)
5.80 (0.228)
AREA
0.50 (0.20)
x 45°
0.25 (0.01)
4.00 (0.157)
3.80 (0.150)
1
2
8°
0°
3
0.25 (0.010)
0.19 (0.008)
SIDE VIEW “B”
TOP VIEW
2.20 (0.087)
SEATING PLANE
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
1
8
2
7
0.60 (0.023)
1.27 (0.050)
3
6
4
5
-C-
1.27 (0.050)
0.51(0.020)
0.33(0.013)
SIDE VIEW “A
0.25(0.010)
0.10(0.004)
5.20(0.205)
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1994.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the
seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
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FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Package Outline Drawing
M10.118
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 4/12
5
3.0±0.05
A
DETAIL "X"
D
10
1.10 MAX
SIDE VIEW 2
0.09 - 0.20
4.9±0.15
3.0±0.05
5
0.95 REF
PIN# 1 ID
1
2
0.50 BSC
B
GAUGE
PLANE
TOP VIEW
0.55 ± 0.15
0.25
3°±3°
0.85±010
H
DETAIL "X"
C
SEATING PLANE
0.18 - 0.27
0.08 M C A-B D
0.10 ± 0.05
0.10 C
SIDE VIEW 1
(5.80)
NOTES:
(4.40)
(3.00)
1. Dimensions are in millimeters.
2. Dimensioning and tolerancing conform to JEDEC MO-187-BA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
(0.50)
(0.29)
(1.40)
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
TYPICAL RECOMMENDED LAND PATTERN
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FN7921.1
December 1, 2015
ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E, ISL32458E, ISL32459E
Package Outline Drawing
M14.15
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 10/09
8.65
A 3
4
0.10 C A-B 2X
6
14
DETAIL"A"
8
0.22±0.03
D
6.0
3.9
4
0.10 C D 2X
0.20 C 2X
7
PIN NO.1
ID MARK
5
0.31-0.51
B 3
(0.35) x 45°
4° ± 4°
6
0.25 M C A-B D
TOP VIEW
0.10 C
1.75 MAX
H
1.25 MIN
0.25
GAUGE PLANE C
SEATING PLANE
0.10 C
0.10-0.25
1.27
SIDE VIEW
(1.27)
DETAIL "A"
(0.6)
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSEY14.5m-1994.
3. Datums A and B to be determined at Datum H.
(5.40)
4. Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5. The pin #1 indentifier may be either a mold or mark feature.
(1.50)
6. Does not include dambar protrusion. Allowable dambar protrusion
shall be 0.10mm total in excess of lead width at maximum condition.
7. Reference to JEDEC MS-012-AB.
TYPICAL RECOMMENDED LAND PATTERN
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23
FN7921.1
December 1, 2015
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