Datasheet

ISL54217
Features
The Intersil ISL54217 is a single supply dual SP3T
analog switch that operates from a single supply in the
range of 2.7V to 4.6V. It was designed to multiplex
between audio stereo signals and two different USB 2.0
high speed differential data signals. The audio channels
allow signal swings below ground, allowing the
multiplexing of voice and data signals through a
common headphone connector in Personal Media
Players and other portable battery powered devices.
• High Speed (480Mbps) and Full Speed (12Mbps)
Signaling Capability per USB 2.0
• Low Distortion Negative Signal Capability Audio
Switches
• Clickless/Popless Audio Switches
• Power OFF Protection
• COM Pins Overvoltage Tolerant to 5.5V
• Low Distortion Headphone Audio Signals
- THD+N at 5mW into 32Ω Load. . . . . . . <0.03%
The audio switch cells can pass ±1V ground referenced
audio signals with very low distortion (<0.03% THD+N
when driving 5mW into 32Ω loads). The USB switch
cells have very low ON-capacitance (8pF) and high
bandwidth to pass USB high speed signals (480Mbps)
with minimal edge and phase distortion.
• Crosstalk (100kHz). . . . . . . . . . . . . . . . . . -98dB
• OFF-Isolation (100kHz) . . . . . . . . . . . . . . 95.5dB
• Single Supply Operation (VDD) . . . . . 2.7V to 4.6V
• -3dB Bandwidth USB Switches. . . . . . . . . 700MHz
The ISL54217 is available in a tiny 12 Ld
2.2mmx1.4mm ultra thin QFN and a 12 Ld 3mmx3mm
TQFN package. It operates over a temperature range of
-40°C to +85°C.
• Available in Tiny 12 Ld µTQFN and TQFN Packages
• Compliant with USB 2.0 Short Circuit Requirements
Without Additional External Components
• Pb-Free (RoHS Compliant)
Related Literature*(see page 22)
Applications*(see page 22)
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)
• MP3 and other Personal Media Players
• Cellular/Mobile Phone
Application Block Diagram
3.3V
µCONTROLLER
VDD
C0
LOGIC CONTROL
4MΩ
C1
2DUSB
HIGH-SPEED
TRANSCEIVER
L
AUDIO
CODEC
COM -
2D+
R
COM +
CLICK/
POP
1D-
USB
HIGH-SPEED
1kΩ
1D+
TRANSCEIVER
50kΩ
1kΩ
VBUS
USB/HEADPHONE JACK
ISL54217
50kΩ
GND
June 17, 2010
FN6817.4
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008, 2009, 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL54217
USB 2.0 High-Speed x 2 Channels/Stereo Audio
Dual SP3T (Dual 3-to-1 Multiplexer)
ISL54217
State Diagram
0
ALL
00
00
SWITCHES
OFF
10
01
00
00
0
1
0
01
USB2
00
11
10
USB1
AUDIO
MUTE
01
INTERNAL REGISTER VALUE
WHEN TRANSISTIONED
INTO THIS STATE
11
10
11
1
11
01
AUDIO
11
Pin Configurations
ISL54217
(12 LD 3X3 TQFN)
TOP VIEW
ISL54217
(12 LD 2.2X1.4 µTQFN)
TOP VIEW
2D-
VDD
C0
2D-
12
11
10
12
VDD
C0
11
10
PD
2D+
1
L
2
R
3
LOGIC
CONTROL
9
C1
C/P
8
COM -
C/P
7
COM +
4
5
6
1D-
1D+
GND
2D+
1
L
2
R
3
LOGIC
CONTROL
9
C1
C/P
8
COM -
C/P
7
COM +
4
5
1D-
1D+
6
GND
NOTE:
1. ISL54217 Switches Shown for C1 = Logic “1” and C0 = Logic “1”. The R and L 50kΩ pull-down resistors, C1 and CO 4MΩ
pull-down resistors and COM- and COM+ 1kΩ Shunts are not shown.
2
FN6817.4
June 17, 2010
ISL54217
Pin Descriptions
µTQFN
TQFN
NAME
1
1
2D+
FUNCTION
USB2 Differential Input
2
2
L
Audio Left Input
3
3
R
Audio Right Input
4
4
1D-
USB1 Differential Input
5
5
1D+
USB1 Differential Input
6
6
GND
7
7
COM+
Voice and Data Common Pin
8
8
COM-
Voice and Data Common Pin
9
9
C1
Digital Control Input
10
10
C0
Digital Control Input
11
11
VDD
Power Supply
12
12
2D-
USB2 Differential Input
-
PD
PD
Thermal Pad. Tie to Ground or Float
Ground Connection
Truth Table
CURRENT
CODE
LAST CODE
SHUNT SWITCHES
C1
C0
C1
C0
MODE
CLICK/POP AUDIO
SHUNTS
0
0
X
X
All Switches Off
ON
0
1
X
X
USB1
ON
OFF
0
1
0
0
0
USB2
ON
OFF
0
1
0
0
1
USB2
ON
OFF
0
1
0
1
0
USB2
ON
OFF
0
1
1
X
X
AUDIO
OFF
OFF
1
1
0
1
0
MUTE
OFF
ON
1
1
0
1
1
MUTE
OFF
ON
1
1kΩ COM SHUNTS
INTERNAL REGISTER
OFF
0
NOTE: C0, C1: Logic “0” when ≤ 0.5V, Logic “1” when ≥ 1.4V with VDD in the range of 2.7V to 3.6V.
Ordering Information
PART NUMBER
(Note 5)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL54217IRUZ-T (Notes 2, 3)
GP
-40 to +85
12 Ld 2.2mmx1.4mm µTQFN (Tape and Reel)
L12.2.2x1.4A
ISL54217IRTZ (Note 4)
4217
-40 to +85
12 Ld 3mmx3mm TQFN
L12.3x3A
ISL54217IRTZ-T (Notes 2, 4)
4217
-40 to +85
12 Ld 3mmx3mm TQFN (Tape and Reel)
L12.3x3A
ISL54217EVAL1Z
Evaluation Board
NOTES:
2. Please refer to TB347 for details on reel specifications.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach
materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
4. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
5. For Moisture Sensitivity Level (MSL), please see device information page for ISL54217. For more information on MSL please
see techbrief TB363.
3
FN6817.4
June 17, 2010
ISL54217
Absolute Maximum Ratings
VDD to GND . . . . . . . . . . . . . . . . . . . . . . .
Input Voltages
1D+, 1D-, L, R, 2D+, 2D-. . . . . . . . . . . .
C0, C1 (Note 6). . . . . . . . . . . . . . . . . . .
Output Voltages
COM-, COM+ . . . . . . . . . . . . . . . . . . . .
Continuous Current (L, R) . . . . . . . . . . . . .
Peak Current (L, R)
(Pulsed 1ms, 10% Duty Cycle, Max) . . . .
Continuous Current (1D-, 1D+, 2D-, 2D+) .
Peak Current (1D-, 1D+, 2D-, 2D+)
(Pulsed 1ms, 10% Duty Cycle, Max) . . . .
ESD Rating:
Human Body Model . . . . . . . . . . . . . . . .
Machine Model . . . . . . . . . . . . . . . . . . .
Charged Device Model . . . . . . . . . . . . . .
Latch-up Tested per JEDEC; Class II Level A
Thermal Information
. . -0.3V to 5.5V
. . . -2V to 5.5V
. . -0.3V to 5.5V
. . . -2V to 5.5V
. . . . . . ±60mA
. . . . . ±120mA
. . . . . . ±40mA
. . . . . ±100mA
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
12 Ld µTQFN Package (Note 7, 10).
155
90
12 Ld TQFN Package (Notes 8, 9). .
58
1.0
Maximum Junction Temperature (Plastic Package). . +150°C
Maximum Storage Temperature Range. . . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C
Supply Voltage Range . . . . . . . . . . . . . . . . . . 2.7V to 4.6V
. . >5kV
. >500V
. . >2kV
at 85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
6. Signals on C1 and C0 exceeding GND by specified amount are clamped. Limit current to maximum current ratings.
7. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379 for details.
8. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
9. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
10. For θJC, the “case temp” location is taken at the package top center.
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VC0H, VC1H = 1.4V, VC0L,
VC1L= 0.5V, (Note 11), Unless Otherwise Specified.
Boldface limits apply over the operating temperature range,
-40°C to +85°C.
PARAMETER
TEST CONDITIONS
MAX
MIN
(Notes
TEMP (Notes
(°C) 12, 13) TYP 12, 13) UNITS
ANALOG SWITCH CHARACTERISTICS
Audio Switches (L, R)
Analog Signal Range, VANALOG
VDD = 3.0V to 3.6V, Audio Mode (C0 = VDD,
C1 = VDD)
Full
-1.5
-
1.5
V
ON-Resistance, rON
VDD = 3.0V, Audio Mode (C0 = 1.4V, C1 = 1.4V),
ICOMx = 60mA, VL or VR = -0.85V to 0.85V, (see
Figure 3, Note 15)
+25
-
2.3
2.8
Ω
Full
-
-
3.4
Ω
rON Matching Between Channels, VDD = 3.0V, Audio Mode (C0 = 1.4V, C1 = 1.4V),
ΔrON
ICOMx = 60mA, VL or VR = Voltage at max rON over
signal range of -0.85V to 0.85V, (Notes 15, 16)
+25
-
0.04
0.25
Ω
Full
-
-
0.26
Ω
rON Flatness, rFLAT(ON)
+25
-
0.03
0.05
Ω
Full
-
-
0.07
Ω
+25
-
28
-
Ω
Full
-1
-
VDD
V
VDD = 3.0V, Audio Mode (C0 = 1.4V, C1 = 1.4V),
ICOMx = 60mA, VL or VR = -0.85V to 0.85V,
(Notes 14, 15)
Click/Pop Shunt Resistance, RL, RR VDD = 3.6V, ALL OFF Mode (C0 = 0.5V, C1 = 0.5V),
VCOM- or VCOM+ = -0.85V, 0.85V, VL or VR = -0.85V,
0.85V, Measure current into L or R pin and calculate
resistance value.
USB/DATA Switches (1D+, 1D-, 2D+, 2D-)
Analog Signal Range, VANALOG
4
VDD = 2.7V to 4.6V, USB1 mode (C0 = 0V, C1 = VDD)
or USB2 Mode (C0 = VDD, C1 = 0V)
FN6817.4
June 17, 2010
ISL54217
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VC0H, VC1H = 1.4V, VC0L,
VC1L= 0.5V, (Note 11), Unless Otherwise Specified.
Boldface limits apply over the operating temperature range,
-40°C to +85°C. (Continued)
PARAMETER
TEST CONDITIONS
MAX
MIN
(Notes
TEMP (Notes
(°C) 12, 13) TYP 12, 13) UNITS
25
-
6.2
8
Ω
Full
-
-
10
Ω
25
-
0.08
0.5
Ω
Full
-
-
0.55
Ω
25
-
0.26
1
Ω
Full
-
-
1.2
Ω
+25
-
9.8
20
Ω
Full
-
-
25
Ω
25
-15
0.11
15
nA
Full
-20
-
20
nA
25
-20
2.4
20
nA
Full
-25
-
25
nA
ALL OFF to USB or USB to All OFF VDD = 2.7V, RL = 50Ω, CL = 10pF, (see Figure 1)
Address Transition Time, tTRANS
25
-
175
-
ns
Audio to USB1 Address Transition VDD = 2.7V, RL = 50Ω, CL = 10pF, (see Figure 1)
Time, tTRANS
25
-
12
-
µs
Break-Before-Make Time Delay, tD VDD = 3.6V, RL = 50Ω, CL = 10pF, (see Figure 2)
25
-
52
-
ns
Skew, (tSKEWOUT - tSKEWIN)
VDD = 3.0V, USB1 mode (C0 = 0V, C1 = VDD) or USB2
Mode (C0 = VDD, C1 = 0V), RL = 45Ω, CL = 10pF,
tR = tF = 500ps at 480Mbps, (Duty Cycle = 50%)
(see Figure 7)
25
-
75
-
ps
Total Jitter, tJ
VDD =3.0V, USB1 mode (C0 = 0V, C1 = VDD) or USB2
Mode (C0 = VDD, C1 = 0V), RL = 45Ω, CL = 10pF,
tR = tF = 500ps at 480Mbps
25
-
210
-
ps
Rise/Fall Degradation
(Propagation Delay), tPD
VDD = 3.0V, USB1 mode (C0 = 0V, C1 = VDD) or USB2
Mode (C0 = VDD, C1 = 0V), RL = 45Ω, CL = 10pF,
(see Figure 7)
25
-
250
-
ps
Audio Crosstalk
R to COM-, L to COM+
VDD = 3.0V, Audio Mode (C0 = VDD, C1 = VDD),
RL = 32Ω, f = 20Hz to 20kHz, VR or VL = 0.707VRMS,
(see Figure 6)
25
-
-88
-
dB
Crosstalk
(Audio to USB, USB to Audio)
VDD = 3.0V, RL = 50Ω, f = 100kHz
25
-
-98
-
dB
OFF-Isolation
VDD = 3.0V, RL = 50Ω, f = 100kHz
25
-
95.5
-
dB
Audio OFF-Isolation
(All OFF Mode)
VDD = 3.0V, C0 = 0V, C1 = 0V, RL = 32Ω, f = 20Hz to
20kHz
25
-
115
-
dB
Audio OFF-Isolation
(Mute Mode)
VDD = 3.0V, C1 = VDD , C0 = 0V, RL = 32Ω, f = 20Hz
to 20kHz
25
-
105
-
dB
Audio OFF-Isolation
(Mute Mode)
VDD = 3.0V, C1 = VDD , C0 = 0V, RL = 20kΩ, f = 20Hz
to 20kHz
25
-
77
-
dB
ON-Resistance, rON
VDD = 2.7V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or
USB2 Mode (C0 = 1.4V, C1 = 0.5V), ICOMx = 40mA,
VD+ or VD = 0V to 400mV (see Figure 4, Note 15)
rON Matching Between Channels, VDD = 2.7V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or
ΔrON
USB2 Mode (C0 = 1.4V, C1 = 0.5V), ICOMx = 40mA,
VD+ or VD-= Voltage at max rON, (Notes 15, 16)
rON Flatness, RFLAT(ON)
VDD = 2.7V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or
USB2 Mode (C0 = 1.4V, C1 = 0.5V), ICOMx = 40mA,
VD+ or VD-= 0V to 400mV, (Notes 14, 15)
ON-Resistance, rON
VDD = 3.3V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or
USB2 Mode (C0 = 1.4V, C1 = 0.5V), ICOMx = 40mA,
VD+ or VD- = 3.3V (see Figure 4, Note 15)
OFF Leakage Current, ID+(OFF) or VDD = 3.6V, All OFF Mode (C0 = 0.5V, C1 = 0.5V),
ID-(OFF)
VCOM- or VCOM+ = 0.5V, 0V, VD+ or VD- = 0V, 0.5V,
L = R = float
ON Leakage Current, IDX
VDD = 3.3V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or
USB2 Mode (C0 = 1.4V, C1 = 0.5V), VD+ or
VD- = 2.7V, COM- = COM+ = Float, L and R = float
DPDT DYNAMIC CHARACTERISTICS
5
FN6817.4
June 17, 2010
ISL54217
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VC0H, VC1H = 1.4V, VC0L,
VC1L= 0.5V, (Note 11), Unless Otherwise Specified.
Boldface limits apply over the operating temperature range,
-40°C to +85°C. (Continued)
PARAMETER
TEST CONDITIONS
MAX
MIN
(Notes
TEMP (Notes
(°C) 12, 13) TYP 12, 13) UNITS
Total Harmonic Distortion
f = 20Hz to 20kHz, VDD = 3.0V, C0 = VDD, C1 = VDD,
L or R = 0.707VRMS (2VP-P), RL = 32Ω
25
-
0.045
-
%
Total Harmonic Distortion
f = 20Hz to 20kHz, VDD = 3.0V, C0 = VDD, C1 = VDD,
5mW into RL = 32Ω
25
-
0.025
-
%
Click and Pop
VDD = 3.3V, Audio Mute (C0 = 0V, C1 = 0V), RL =1kΩ,
L or R = 0 to 1.25V DC step or 1.25V to 0V DC step,
(see Figure 8)
25
-
75
-
µVp
Click and Pop
VDD = 3.3V, C0, C1 = 0.5Hz Square Wave, RL = 1kΩ,
L or R = AC coupled to ground, (see Figure 9)
25
-
520
-
µVp
USB Switch -3dB Bandwidth
Signal = 0dBm, 0.2VDC offset, RL = 50Ω, CL = 5pF
25
-
700
-
MHz
Audio Switch -3dB Bandwidth
Signal = 0dBm, RL = 50Ω, CL = 5pF
25
-
330
-
MHz
1D+/1D- OFF Capacitance,
C1D+OFF, C1D-OFF
f = 1MHz, VDD = 3.0V, C0 = VDD, C1 = VDD, VD- or
VD+ = VCOMx = 0V (see Figure 5)
25
-
3
-
pF
L/R OFF Capacitance, CLOFF,
CROFF
f = 1MHz, VDD = 3.0V, C0 = 0V, C1 = VDD,
L or R = COMx = 0V (see Figure 5)
25
-
5
-
pF
2D+/2D- OFF Capacitance,
C2D+OFF, C2D-OFF
f = 1MHz, VDD = 3.3V, C0 = VDD, C1 = VDD, Tx or
Rx = COMx = 0V (see Figure 5)
25
-
3
-
pF
COM ON Capacitance, CCOM(ON), CCOM+(ON)
f = 1MHz, VDD = 3.0V, USB1 mode (C0 = 0V, C1 = VDD)
or USB2 Mode (C0 = VDD, C1 = 0V) (see Figure 5)
25
-
8
-
pF
Full
2.7
4.6
V
25
-
6.2
10
µA
Full
-
-
15
µA
25
-
6.5
10
µA
Full
-
-
15
µA
25
-
6.2
10
µA
Full
-
-
15
µA
25
-
9
14
µA
Full
-
-
20
µA
25
-
6.6
10
µA
Full
-
-
15
µA
Power OFF COMx Current, ICOMx VDD = 0V, C0 = C1 = Float, COMx = 5.25V
25
-
-
4
µA
Power OFF Logic Current, IC0, IC1 VDD = 0V, C0 = C1 = 5.25V
25
-
11
-
µA
Power OFF D+/D- Current, IXD+, VDD = 0V, C0 = C1 = Float, XD- = XD+ = 5.25V
IXD-
25
-
5
-
µA
VDD = 2.7V to 3.6V
Full
-
-
0.5
V
C0, C1 Voltage High, VC0H, VC1H VDD = 2.7V to 3.6V
Full
1.4
-
5.25
V
C0, C1 Input Current, IC0L, IC1L
Full
-50
6.2
50
nA
Full
-2
1.6
2
µA
POWER SUPPLY CHARACTERISTICS
Power Supply Range, VDD
Positive Supply Current, IDD
(ALL OFF Mode)
VDD = 3.6V, C1 = GND, C0 = GND
Positive Supply Current, IDD
(USB1 Mode)
VDD = 3.6V, C1 = GND, C0 = VDD
Positive Supply Current, IDD
(USB2 Mode)
VDD = 3.6V, C1 = VDD, C0 = GND
Positive Supply Current, IDD
(Audio Mode)
VDD = 3.6V, C0 = C1 = VDD)
Positive Supply Current, IDD
(MUTE Mode)
VDD = 3.6V, C1 = VDD, C0 = GND
DIGITAL INPUT CHARACTERISTICS
C0, C1 Voltage Low, VC0L, VC1L
VDD = 3.6V, C0 = C1= 0V or Float
C0, C1 Input Current, IC0H, IC1H VDD = 3.6V, C0 = C1= 3.6V
6
FN6817.4
June 17, 2010
ISL54217
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VC0H, VC1H = 1.4V, VC0L,
VC1L= 0.5V, (Note 11), Unless Otherwise Specified.
Boldface limits apply over the operating temperature range,
-40°C to +85°C. (Continued)
PARAMETER
MAX
MIN
(Notes
TEMP (Notes
(°C) 12, 13) TYP 12, 13) UNITS
TEST CONDITIONS
C0, C1 Pull-Down Resistor, RCx
VDD = 3.6V, C0 = C1= 3.6V, Measure current into C0
or C1 pin and calculate resistance value.
Full
-
4
-
MΩ
NOTES:
11. VLOGIC = Input voltage to perform proper function.
12. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this
data sheet.
13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
14. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal
range.
15. Limits established by characterization and are not production tested.
16. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel
with lowest max rON value, between L and R or between 1D+ and 1D- or between 2D+ and 2D-.
Test Circuits and Waveforms
VC0,C1
LOGIC
INPUT
VC0,C1
50%
SWITCH
INPUT VINPUT
VOUT
SWITCH
INPUT
COMx
C0, C1
VOUT
90%
C
VINPUT
tOFF
SWITCH
OUTPUT
VDD
tr < 20ns
tf < 20ns
90%
0V
LOGIC
INPUT
GND
RL
50Ω
CL
10pF
tON
Logic input waveform is inverted for switches that have the
opposite logic sense.
FIGURE 1A. ADDRESS tTRANS MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray
capacitance.
RL
V OUT = V (INPUT) -----------------------R L + r ON
FIGURE 1B. ADDRESS tTRANS TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
7
FN6817.4
June 17, 2010
ISL54217
Test Circuits and Waveforms (Continued)
VDD
2D- OR 2D+
VC0
LOGIC
INPUT
1D- OR 1D+
VINPUT
VC1
SWITCH
OUTPUT
C
VOUT
COMx
L OR R
VOUT
90%
GND
LOGIC
INPUT
0V
CL
10pF
RL
50Ω
C0, C1
tD
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. BREAK-BEFORE-MAKE TIME
VDD
VDD
C
C
rON = V1/40mA
rON = V1/60mA
D- OR D+
COMx
VD- OR D+
VL OR R
C0
V1
60mA
VCOH
V1
VC1H
C1
40mA
L OR R
C0
VC0L AND
C1
VC1H OR
VC0H AND
VC1L
COMx
GND
GND
Repeat test for all switches.
Repeat test for all switches.
FIGURE 3. AUDIO rON TEST CIRCUIT
FIGURE 4. USB rON TEST CIRCUIT
VDD
VDD
CTRL
CTRL
SIGNAL
GENERATOR
AUDIO OR USB
COMx
32Ω
0V OR FLOAT
VCxL OR
VCxH
COMx
GND
Repeat test for all switches.
FIGURE 5. CAPACITANCE TEST CIRCUIT
8
L OR R
VCx
VCx
IMPEDANCE
ANALYZER
C
C
R or L
COMx
ANALYZER
NC
GND
32Ω
FIGURE 6. AUDIO CROSSTALK TEST CIRCUIT
FN6817.4
June 17, 2010
ISL54217
Test Circuits and Waveforms (Continued)
VDD
tri
C
90%
DIN+
DIN-
10%
50%
tskew_i
90%
0V
C0
VDD
C1
15.8Ω
50%
DIN90%
OUT+
OUT-
15.8Ω
OUT+
D+
143Ω
tfi
tro
10%
COM+
DIN+
10%
VDD
CL
COM-
OUT-
DCL
143Ω
45Ω
45Ω
50%
tskew_o
GND
|tro - tri| Delay Due to Switch for Rising Input and Rising Output Signals.
50%
90%
tf0
|tfo - tfi| Delay Due to Switch for Falling Input and Falling Output Signals.
|tskew_0| Change in Skew through the Switch for Output Signals.
|tskew_i| Change in Skew through the Switch for Input Signals.
10%
FIGURE 7A. MEASUREMENT POINTS
FIGURE 7B. TEST CIRCUIT
FIGURE 7. SKEW TEST
3.3V
AUDIO PRECISION
SYSTEM II CASCADE
ANALYZER
CHA
CHB
VDD
COMCOM+
CLICK
AND
POP
L
R
RLOAD
RLOAD
C0 C1
GND
0V TO 1.25V
DC STEP
OR
1.25V TO 0V
DC STEP
0V 0V
ALL OFF MODE
Set Audio Analyzer for Peak Detection, 32 Samples/Sec, Aweighted Filter, Manual Range 1X/Y, Units to dBV
FIGURE 8. CLICK AND POP TEST CIRCUIT
9
FN6817.4
June 17, 2010
ISL54217
Test Circuits and Waveforms (Continued)
3.3V
AUDIO PRECISION
SYSTEM II CASCADE
ANALYZER
CHA
C
VDD
CHB
COM-
L
CLICK
AND
POP
COM+
RLOAD
R
RLOAD
GND
C0, C1
0V TO VDD
SQUARE WAVE
Set Audio Analyzer for Peak Detection, 32 Samples/Sec, Aweighted Filter, Manual Range 1X/Y, Units to dBV
FIGURE 9. CLICK AND POP TEST CIRCUIT
10
FN6817.4
June 17, 2010
ISL54217
Block Diagram
3.3V
µCONTROLLER
VDD
ISL54217
C0
4MΩ
C1
2DUSB
HIGH-SPEED
TRANSCEIVER
#2
COM -
2D+
COM +
L
CLICK/
R
POP
AUDIO
CODEC
1D-
USB
HIGH-SPEED
TRANSCEIVER
#1
OR
UART
VBUS
USB/HEADPHONE JACK
LOGIC CONTROL
1kΩ
1D+
50kΩ
50kΩ
GND
TRANSCEIVER
Detailed Description
Audio Switches
The ISL54217 device consists of dual SP3T (single
pole/triple throw) analog switches. It operates from a
single DC power supply in the range of 2.7V to 4.6V. It
was designed to function as differential 3-to-1
multiplexer to select between two different USB
differential data signals and audio L and R stereo signals.
It comes in a tiny µTQFN and TQFN packages for use in
MP3 players, PDAs, cell phones, and other personal
media players.
Over a signal range of ±1V (0.707VRMS) with
VDD > 2.7V, these switches have an extremely low rON
resistance variation. They can pass ground referenced
audio signals with very low distortion (<0.05% THD+N)
when delivering 15.6mW into a 32Ω headphone speaker
load. See Figures 20, 21, 22, 23 and 24 THD+N
performance curves.
A device consists of two 2.3Ω audio switches and four
6.2Ω USB switches. The audio switches can accept
signals that swing below ground. They were designed to
pass audio left and right stereo signals, that are ground
referenced, with minimal distortion. The USB switches
were designed to pass high-speed USB differential data
signals with minimal edge and phase distortion.
The ISL54217 was specifically designed for MP3 players,
personal media players and cellphone applications that
need to combine the stereo audio and USB data channels
into a single shared connector, thereby saving space and
component cost. The “Block Diagram” of this
functionality is shown on page 11.
The ISL54217 contains two logic control pins (C1 and C0)
that determine the state of the device. The part has the
following five states or modes of operation: All
SWITCHES OFF; USB1; USB2; Audio; and Audio Mute.
These states are discussed in detail in “Logic Control” on
page 12.
A detailed description of the various types of switches are
provided in “Audio Switches” beginning on page 11.
11
The two audio switches (L, R) are 2.3Ω switches that can
pass signals that swing below ground.
Crosstalk between the L and R audio switches over the
frequency range of 20Hz to 20kHz when driving a 32Ω
load is <-88dB. These switches have excellent
off-isolation >105dB over the audio band when
connected to 32Ω loads and 77dB when connected to
20kΩ loads (In Audio Mute mode). See Figures 25 and
26 in “Typical Performance Curves” section beginning on
page 14.
The audio drivers should be connected at the L and R
side of the switch (pins 2 and 3) and the speaker loads
should be connected at the COM side of the switch (pins
7 and 8).
The switches have click and pop circuitry on the L and R
side that is activated when the part comes out of Audio
mode by taking the C1 and C0 logic pins low (All OFF
mode). The ISL54217 should be put in this mode before
powering down or powering up of the audio CODEC
drivers. In this mode the audio, USB1, USB2 switches will
be OPEN (OFF) and the audio click and pop circuitry will
be ON. The high off-isolation of the audio switches along
with the click and pop circuitry will isolate the transients
generated during power-up and power down of the audio
CODECs from getting through to the headphones thus
FN6817.4
June 17, 2010
ISL54217
eliminating click and pop noise in the headphones. See
the “AC COUPLED CLICK AND POP OPERATION” on
page 13.
The C1 pin and C0 pin are internally pulled low through
4MΩ resistors to ground and can be tri-stated or left
floating.
The audio switches are active (turned ON) whenever the
C1 and C0 logic pins are logic “1” (High).
The C1 pin and C0 pin can be driven with a voltage that
is higher than the VDD supply voltage. They can be
driven up to 5.25V with the VDD supply in the range of
2.7V to 4.6V. Driving the logic higher than the supply rail
will cause the logic current to increase. With VDD = 2.7V
and VLOGIC = 5.25V, ILOGIC current is approximately
5.5µA.
USB Switches
The four USB switches (1D+, 1D-, 2D+, 2D-) are 6.2Ω
bidirectional switches that were specifically designed to
pass high-speed USB differential data signals in the
range of 0V to 400mV. The switches have low
capacitance and high bandwidth to pass USB
high-speed signals (480Mbps) with minimum edge and
phase distortion to meet USB 2.0 signal quality
specifications. See Figures 27 and 28 for High-speed Eye
Pattern taken with switch in the signal path.
These switches can also swing rail to rail and pass USB
full-speed signals (12Mbps) with minimal distortion. See
Figure 29 for Full-speed Eye Pattern taken with switch in
the signal path.
The maximum normal operating signal range for the USB
switches is from -1V to VDD. The signal voltage at D- and
D+ should not be allow to exceed the VDD voltage rail or
go below ground by more than -1V for normal operation.
However, in the event that the USB 5.25V VBUS voltage
were shorted to one or both of the COM pins, the
ISL54217 has fault protection circuitry to prevent
damage to the ISL54217 part. The fault circuitry allows
the signal pins (COM-, COM+, 1D-, 1D+, 2D-, 2D+, L
and R) to be driven up to 5.25V while the VDD supply
voltage is in the range of 0V to 4.6V. This fault condition
causes no stress to the IC. In addition, when VDD is at 0V
(ground) all switches are OFF and the fault voltage is
isolated from the other side of the switch. When VDD is in
the range of 2.7V to 4.6V the fault voltage will pass
through to the output of an active switch channel.
Note: During the fault condition normal operation is not
guaranteed until the fault condition is removed.
The USB (1D+ and 1D-) switches are active (turned ON)
whenever the C1 is logic “0” (Low) and C0 is logic “1”
(High). The USB (2D+ and 2D-) switches are active
(turned ON) whenever the C1 is logic “1” (High) and C0
is logic “0” (Low) provided the last state was not the
Audio or Audio Mute state.
ISL54217 Operation
The discussion that follows will discuss using the
ISL54217 in the “Block Diagram” on page 11.
LOGIC CONTROL
The state of the ISL54217 device is determined by the
voltage at the C1 pin (pin 9) and the C0 pin (pin 10). The
part has five states or modes of operation. The All
SWITCHES OFF mode, USB1 mode, USB2 mode, Audio
mode and Audio Mute mode. Refer to “Truth Table” on
page 3 and “State Diagram” on page 2 of data sheet.
12
Logic Control Voltage Levels
With VDD in the range of 2.7V to 3.6V the logic levels
are:
C1, C0 = Logic “0” (Low) when ≤ 0.5V or Floating.
C1, C0 = Logic “1” (High) when ≥ 1.4V.
ALL SWITCHES OFF Mode
If the C1 pin = Logic “0” and C0 pin = Logic “0” the part
will be in the ALL SWITCHES OFF mode. In this mode the
2D- and 2D+ USB switches, the L and R audio switches
and the 1D- and 1D+ USB switches will be OFF (high
impedance).
The audio click and pop shunt circuitry will be activated
(ON) and the 1kΩ COM shunt resistors will be
disconnected (OFF).
Before powering down or powering up of the audio
CODECs drivers the ISL54217 should be put in the ALL
SWITCHES OFF mode. In this mode transients present at
the L and R signal pins due to the changing DC voltage of
the audio drivers will not pass to the headphones,
preventing clicks and pops in the headphones. See the
“AC COUPLED CLICK AND POP OPERATION” on page 13.
It is recommended that when transitioning from USB1 to
USB2 or from USB2 to USB1 that you always pass
through the All Switches OFF state.
Audio Mode
If the C1 pin = Logic “1” and C0 pin = Logic “1” the part
will be in the Audio mode. In Audio mode the L (left) and
R (right) 2.3Ω audio switches are ON. The 1D- and 1D+
6.2Ω USB switches and 2D- and 2D+ 6.2Ω USB switches
will be OFF (high impedance).
The audio click and pop circuitry is de-activated. The 1kΩ
shunts on the COM side of the switch will be
disconnected (OFF).
When a headphone is plugged into the common
connector, the µcontroller will drive the C1 and C0 logic
pins “High” putting the part in the audio mode. In the
audio mode, the audio drivers of the player can drive the
headphones and play music.
USB1 Mode
If the C1 pin = Logic “0” and C0 pin = Logic “1” the part
will go into USB1 mode. In USB1 mode the 1D- and 1D+
6.2Ω switches are ON. The L and R 2.3Ω audio switches
and 2D- and 2D+ 6.2Ω USB switches will be OFF (high
impedance).
FN6817.4
June 17, 2010
ISL54217
The audio L and R click and pop shunt circuitry will be
activated and the 1kΩ COM shunt resistors will be
disconnected (OFF).
When a USB cable from a computer or USB hub is
connected at the common connector, the µcontroller will
route the incoming USB signal to USB transceiver section
#1 by taking the C1 pin “Low” and the C0 pin “High”
putting the ISL54217 part into the USB1 mode. In USB1
mode the computer or USB hub transceiver and the MP3
player or cellphone USB transceiver #1 are connected
and digital data will be able to be transmit back and
forth.
USB2 Mode
If the C1 pin = Logic “1” and C0 pin = Logic “0” the part
will be in the USB2 mode provided that the last state was
not the Audio or Audio Mute state. In the USB2 mode the
2D- and 2D+ 6.2Ω USB switches will be ON and audio
switches and the 1D- and 1D+ USB switches will be OFF
(high impedance).
The audio L and R click and pop shunt circuitry will be
activated and the 1kΩ COM shunt resistors will be
disconnected (OFF).
When a USB cable from a computer or USB hub is
connected at the common connector, the µcontroller
will route the incoming USB signal to USB transceiver
section #2 by taking the C1 pin “High” and the C0 pin
“Low” putting the ISL54217 part into the USB2 mode.
In USB2 mode the computer or USB hub transceiver
and the MP3 player or cellphone USB transceiver #2
are connected and digital data will be able to be
transmit back and forth.
Audio MUTE Mode
If the C1 pin = Logic “1” and C0 pin = Logic “0” the part
will be in the Audio MUTE mode provided that the last
state was the Audio state. In the audio MUTE mode the
2D- and 2D+ USB switches, the L and R audio switches
and the 1D- and 1D+ USB switches will be OFF (high
impedance).
The audio click and pop shunt circuitry will be
de-activated and the 1kΩ COM shunt resistors will be
connected (ON). Note: 1kΩ COM shunt resistors are
only ON when in Audio MUTE mode.
The 1kΩ shunts provide 77dB of off-isolation when
driving 10kΩ to 20kΩ amplifier inputs.
Logic Control Timing Between C1 and C0
The ISL54217 has a unique logic control architecture.
The part has five different logic states but only two
external logic control pins, C1 and C0. Refer to “State
Diagram” on page 2 and “Truth Table” on page 3.
The following state transitions require both C1 and C0
logic control bits to change their logic levels in unison:
All OFF(C1 = 0, C0 = 0) -----> Audio (C1 = 1, C0 =1)
Audio (C1 = 1, C0 = 1) -----> All OFF (C1 = 0, C0 = 0)
Audio Mute (C1 = 1, C0 = 0) ---> USB1 (C1 = 0, C0 = 1)
13
The delay time between transition of these bits must be
<100ns to ensure that you directly move between these
states without momentarily transitioning to one of the
other states.
For example, if you are going from the “All OFF” state to
the “Audio” state and C0 does not go high until 100ns
after C1 went high you will momentarily transition to the
“USB2” state. Any signals connected at the USB2 signal
lines will momentarily get passed through to the COM
outputs.
Delay time between C1 and C0 must be <100ns and
should be controlled by logic control drivers with well
behaved monotonic transitions from High to Low and Low
to High and with typical logic family rise and fall times of
1ns to 6ns.
POWER
The power supply connected at VDD (pin 11) provides
power to the ISL54217 part. Its voltage should be kept in
the range of 2.7V to 4.6V. In a typical application, VDD
will be in the range of 2.7V to 4.3V and will be connected
to the battery or LDO of the MP3 player or cellphone.
A 0.01µF or 0.1µF decoupling capacitor should be
connected from the VDD pin to ground to filter out any
power supply noise from entering the part. The capacitor
should be located as close to the VDD pin as possible.
Before power-up and power-down of the ISL54217 part,
the C1 and C0 control pins should be driven to ground or
tri-stated. This will put the switch in the ALL SWITCHES
OFF state, which turns all switches OFF and activate the
click and pop circuitry. This will minimize transients at the
speaker loads during power-up and power-down of the
ISL54217 device. See Figure 32 in the “Typical
Performance Curves” section.
AC COUPLED CLICK AND POP OPERATION
Single supply audio drivers have their signal biased at a DC
offset voltage, usually at 1/2 the DC supply voltage of the
driver. As this DC bias voltage comes up or goes down
during power-up or power-down of the driver, a transient
can be coupled into the speaker load through the DC
blocking capacitor (see the “Block Diagram” on page 11).
When a driver is OFF and suddenly turned ON the rapidly
changing DC bias voltage at the output of the driver will
cause an equal voltage at the input side of the switch due
to the fact that the voltage across the blocking capacitor
cannot change instantly. If the switch is in the Audio
mode or there is no low impedance path to discharge the
blocking capacitor voltage, before turning the audio
switch ON, a transient discharge will occur in the speaker,
generating a click/pop noise.
Proper elimination of a click/pop transient at the speaker
loads while powering up or down of the audio drivers
requires that the ISL54217 have its click/pop circuitry
activated by putting the part in the ALL SWITCHES OFF
mode. This allows the transients generated by the audio
drivers to be discharged through the click and pop shunt
circuitry.
FN6817.4
June 17, 2010
ISL54217
Once the driver DC bias has reached VDD/2 and the
transient on the switch side of the DC blocking capacitor
has been discharged to ground through the click/pop
shunt circuitry, the audio switches can be turned ON and
connected through to the speaker loads without
generating any undesirable click/pop noise in the
speakers.
Typical Performance Curves
2.95
2.90
With a typical DC blocking capacitor of 220µF and the
click/pop shunt circuitry designed to have a resistance
of 20Ω to 70Ω, allowing a 100ms wait time to discharge
the transient before placing the switch in the Audio
mode will prevent the transient from getting through
to the speaker load. See Figures 30 and 31 in the
“Typical Performance Curves” section.
TA = +25°C, Unless Otherwise Specified
2.60
ICOM = 60mA
ICOM = 60mA
2.58
2.85
2.80
VDD = 3.0V
2.56
rON (Ω)
rON (Ω)
2.75
2.70
2.65
2.60
2.50
VDD = 3.6V
VDD = 4.6V
VDD = 4.6V
-1.0
-0.5
0
VCOM (V)
0.5
1.0
2.48
-1.5
1.5
FIGURE 10. AUDIO ON-RESISTANCE vs SUPPLY
VOLTAGE vs SWITCH VOLTAGE
-0.5
0
VCOM (V)
0.5
1.0
1.5
4.0
ICOM = 60mA
+85°C
3.5
VDD = 3.0V
14
3.0
12
VDD = 3.6V
10
rON (Ω)
rON (Ω)
-1.0
FIGURE 11. AUDIO ON-RESISTANCE vs SUPPLY
VOLTAGE vs SWITCH VOLTAGE
18
16
VDD = 3.6V
VDD = 4.0V
2.55
2.45
-1.5
2.54
2.52
VDD = 2.7V
2.50
VDD = 3.3V
8
+25°C
2.5
2.0
6
-40°C
4
1.5
2
0
-1.5
VDD = 4.6V
-0.5
0.5
1.5
2.5
3.5
VCOM (V)
FIGURE 12. AUDIO ON-RESISTANCE vs SUPPLY
VOLTAGE vs SWITCH VOLTAGE
14
4.6
1.0
-1.5
VDD = 3.0V
ICOM = 60mA
-1.0
-0.5
0
VCOM (V)
0.5
1.0
1.5
FIGURE 13. AUDIO ON-RESISTANCE vs SWITCH
VOLTAGE vs TEMPERATURE
FN6817.4
June 17, 2010
ISL54217
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified (Continued)
18
18
VDD = 3.3V
ICOM = 60mA
16
14
14
12
12
10
10
rON (Ω)
rON (Ω)
16
VDD = 3.0V
ICOM = 60mA
8
8
6
6
+85°C
4
+85°C
4
+25°C
+25°C
2
2
-40°C
0
-1.5
-1.0
-0.5
0
0.5
1.0
VCOM (V)
1.5
2.0
2.5
FIGURE 14. AUDIO ON-RESISTANCE vs SWITCH
VOLTAGE vs TEMPERATURE
6.6
-0.5
0.5
1.5
VCOM (V)
2.5
3.6
FIGURE 15. AUDIO ON-RESISTANCE vs SWITCH
VOLTAGE vs TEMPERATURE
6.7
9
ICOM = 40mA
-40°C
0
-1.5
3.0
VDD = 2.7V
VDD = 2.7V
ICOM = 40mA
+85°C
8
6.5
7
VDD = 3.3V
6.3
rON (Ω)
rON (Ω)
6.4
VDD = 3.0V
6.2
VDD = 3.3V
6.1
+25°C
6
-40°C
5
6.0
VDD = 4.6V
5.9
5.8
0
0.05
0.10
0.15
0.20
0.25
VCOM (V)
4
VDD = 4.0V
0.30
0.35
FIGURE 16. USB ON-RESISTANCE vs SUPPLY VOLTAGE
vs SWITCH VOLTAGE
9
VDD = 3.3V
ICOM = 40mA
8
3
0
0.40
0.10
0.15
0.20
0.25
VCOM (V)
0.30
0.35
0.40
FIGURE 17. USB ON-RESISTANCE vs SWITCH VOLTAGE
vs TEMPERATURE
16
+85°C
VDD = 3.3V
ICOM = 40mA
14
12
7
+25°C
rON (Ω)
rON (Ω)
0.05
6
-40°C
5
+85°C
10
8
+25°C
6
-40°C
4
3
0
4
0.05
0.10
0.15
0.20
0.25
VCOM (V)
0.30
0.35
0.40
FIGURE 18. USB ON-RESISTANCE vs SWITCH VOLTAGE
vs TEMPERATURE
15
2
0
0.5
1.0
1.5
2.0
VCOM (V)
2.5
3.0
3.3
FIGURE 19. USB ON-RESISTANCE vs SWITCH VOLTAGE
vs TEMPERATURE
FN6817.4
June 17, 2010
ISL54217
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified (Continued)
0.056
0.032
RLOAD = 32Ω
VLOAD = 0.707VRMS
0.054
THD+N (%)
0.053
0.052
0.051
VDD = 3.0V
0.030
VDD = 2.7V
VDD = 3.6V
0.029
VDD = 3.3V
VDD = 4V
0.050
0.049
VDD = 4.6V
0.046
20
50
100
200
500 1k
2k
FREQUENCY (Hz)
5k
100
200 500
1k
2k
FREQUENCY (Hz)
5k
10k
20k
FIGURE 21. THD+N vs SUPPLY VOLTAGE vs
FREQUENCY
PEAK-TO-PEAK VOLTAGES AT LOAD
0.055
2.5VP-P
0.050
0.045
0.045
THD+N (%)
2VP-P
0.050
1.5VP-P
0.040
0.035
1.13VP-P
0.030
RLOAD = 32Ω
FREQ = 1kHz
VDD = 3V
0.060
0.055
THD+N (%)
50
0.065
RLOAD = 32Ω
VDD = 3V
0.060
0.040
0.035
0.030
0.025
0.020
0.025
0.015
1VP-P
0.020
0.010
510mVP-P
0.015
50
100
200
500
1k
2k
FREQUENCY (Hz)
0.005
5k
10k
0
0.5
20k
FIGURE 22. THD+N vs SIGNAL LEVELS vs FREQUENCY
1.0
1.5
2.0
OUTPUT VOLTAGE (VP-P)
2.5
FIGURE 23. THD+N vs OUTPUT VOLTAGE
-60
0.09
0.08
RLOAD = 32Ω
-70
-80
0.07
FREQ = 1kHz
VDD = 3V
-90
CROSSTALK (dB)
0.06
THD+N (%)
VDD = 4.6V
0.024
20
10k 20k
FIGURE 20. THD+N vs SUPPLY VOLTAGE vs
FREQUENCY
0.010
20
VDD = 4.0V
0.027
0.025
0.047
0.065
VDD = 3.6V
0.028
0.026
0.048
0.070
RLOAD = 32Ω
PLOAD = 5mW
0.031
THD+N (%)
0.055
0.05
0.04
0.03
VDD = 3V
RLOAD = 32Ω
VSIGNAL = 0.707VRMS
-100
-110
-120
-130
-140
-150
0.02
-160
0.01
0
-170
0
5
10
15
20
OUTPUT POWER (mW)
25
FIGURE 24. THD+N vs OUTPUT POWER
16
30
-180
20
50
100
200
500
1k
2k
FREQUENCY (Hz)
5k
10k
20k
FIGURE 25. AUDIO CHANNEL-TO-CHANNEL CROSSTALK
FN6817.4
June 17, 2010
ISL54217
Typical Performance Curves
-60
-65
-70
VDD = 3.3V
VSIGNAL = 0.707VRMS
AUDIO MUTE MODE
-75
OFF- ISOLATION (dB)
TA = +25°C, Unless Otherwise Specified (Continued)
-80
RL = 20kΩ
RL = 1kΩ
-85
-90
-95
-100
RL = 32Ω
-105
-110
-115
-120
-125
-130
20
50
100
200
500
1k
2k
FREQUENCY (Hz)
5k
10k
20k
FIGURE 26. OFF-ISOLATION AUDIO SWITCH vs LOADING vs FREQUENCY
17
FN6817.4
June 17, 2010
ISL54217
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified (Continued)
VDD = 2.7V
VOLTAGE SCALE (0.1V/DIV)
USB NEAR END MASK
TIME SCALE (0.2ns/DIV)
FIGURE 27. EYE PATTERN: 480Mbps WITH USB SWITCHES IN THE SIGNAL PATH
18
FN6817.4
June 17, 2010
ISL54217
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified (Continued)
VDD = 2.7V
VOLTAGE SCALE (0.1V/DIV)
FAR END MASK
TIME SCALE (0.2ns/DIV)
FIGURE 28. EYE PATTERN: 480Mbps WITH USB SWITCHES IN THE SIGNAL PATH
19
FN6817.4
June 17, 2010
ISL54217
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified (Continued)
VOLTAGE SCALE (0.5V/DIV)
VDD = 2.7V
TIME SCALE (10ns/DIV)
FIGURE 29. EYE PATTERN: 12Mbps USB SIGNAL WITH USB SWITCHES IN THE SIGNAL PATH
C1, C0 2V/DIV
C1, C0 2V/DIV
RIN 200mV/DIV
VDD/2 2V/DIV
VOLTAGE (V)
VOLTAGE (V)
VDD/2 2V/DIV
LIN 200mV/DIV
LOUT 50mV/DIV
ROUT 50mV/DIV
TIME (s) 100ms/DIV
TIME (s) 100ms/DIV
FIGURE 30. 32Ω AC COUPLED CLICK/POP REDUCTION
20
FIGURE 31. 1kΩ AC COUPLED CLICK/POP REDUCTION
FN6817.4
June 17, 2010
ISL54217
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified (Continued)
1
VDD
1V/DIV
USB SWITCH
NORMALIZED GAIN (dB)
VOLTAGE (V)
0
VIN = 1.5V OR 0V
C1 = C0 = 0V
VOUT
10mV/DIV
-1
-2
-3
-4
RL = 50Ω
-5
TIME (s) 200ms/DIV
VIN = 0.2VP-P TO 2VP-P
1M
FIGURE 32. POWER-UP/POWER-DOWN CLICK AND
POP TRANSIENT
1G
FIGURE 33. FREQUENCY RESPONSE
-20
-10
RL = 50Ω
VIN = 0.2VP-P to 2VP-P
RL = 50Ω
VIN = 0.2VP-P to 2VP-P
-30
NORMALIZED GAIN (dB)
-40
NORMALIZED GAIN (dB)
10M
100M
FREQUENCY (Hz)
-60
-80
-100
-70
-90
-110
-120
-140
0.001
-50
0.01
0.10
1M
FREQUENCY (Hz)
10M
100M
FIGURE 34. OFF-ISOLATION USB SWITCHES
500M
-130
0.001
0.01
0.10
1M
10M
100M
500M
FREQUENCY (Hz)
FIGURE 35. OFF-ISOLATION AUDIO SWITCHES
Die Characteristics
SUBSTRATE AND TQFN THERMAL PAD
POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT
837
PROCESS
Submicron CMOS
21
FN6817.4
June 17, 2010
ISL54217
Revision History
DATE
REVISION
CHANGE
4/28/10
FN6817.4
On page 2 , added seperate pin configuration diagrams for the µTQFN and TQFN parts.
On page 6, changed “Positive Supply Current, IDD” MAX for “(ALL OFF Mode)”,“(USB1 Mode)”,
“(USB2 Mode)”, and “(MUTE Mode)” for 25°C from:8µA, to 10µA.
On page 6, changed “Power OFF COMx Current, ICOMx” current limit for 25°C from:1µA,
to:4µA.
Converted to new Intersil template. Changes include:
Added Note 5 to “Ordering Information” on page 3.
On page 3 in “Pin Descriptions”, updated to show the thermal pad.
“Absolute Maximum Ratings” on page 4, added latch-up level.
Added “Products” on page 22.
Added “Revision History” on page 22.
5/4/09
FN6817.3
On page 6, under Parameter “Power OFF D+/D- Current, IXD+, IXD-”, changed units from
"nA" to "µA"
4/1/09
FN6817.2
“Absolute Maximum Ratings” on page 4, changed C0,C1... From "-0.3 to (VDD) + 0.3V" to "0.3V to 5.5V"
“Power OFF COMx Current, ICOMx” on page 6 max limit changed from "100nA" to "1µA"
“Power OFF Logic Current, IC0, IC1” on page 6 added typ "11µa", deleted max limit of "550nA"
“Power OFF D+/D- Current, IXD+, IXD-” on page 6, added typ "5µa", deleted max limit of
"500nA"
Under - “DIGITAL INPUT CHARACTERISTICS” on page 6
For “C0, C1 Voltage High, VC0H, VC1H” Parameter with test conditions of VDD = 2.7V to
3.6V, Full temp range; added a MAX spec of 5.25V
Added “Logic Control” on page 12.
2/27/09
FN6817.1
Removed Off_isolation Left Audio Switch vs Loading curve (was Figure 26)
12/11/08
FN6817.0
Initial release
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The
Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones,
handheld products, and notebooks. Intersil's product families address power management and analog signal
processing functions. Go to www.intersil.com/products for a complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device
information page on intersil.com: ISL54217
To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff
FITs are available from our website at http://rel.intersil.com/reports/search.php
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
22
FN6817.4
June 17, 2010
ISL54217
Package Outline Drawing
L12.3x3A
12 LEAD THIN QUAD FLAT NO LEAD PLASTIC PACKAGE
Rev 0, 09/07
3.00
0.5
BSC
A
B
6
12
10
PIN #1 INDEX AREA
6
PIN 1
INDEX AREA
1
4X 1.45
3.00
9
7
3
0.10 M C A B
(4X)
0.15
4
6
0.25 +0.05 / -0.07
4
12X 0 . 4 ± 0 . 1
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
0 . 75
C
BASE PLANE
( 2 . 8 TYP )
1.45 )
SEATING PLANE
0.08 C
(
SIDE VIEW
0.6
C
0 . 50
0 . 2 REF
5
0 . 00 MIN.
0 . 05 MAX.
0 . 25
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.18mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
23
FN6817.4
June 17, 2010
ISL54217
Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)
D
6
INDEX AREA
2X
A
N
L12.2.2x1.4A
B
12 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC
PACKAGE
MILLIMETERS
E
0.10C
1
2X
2
0.10C
MIN
NOMINAL
A
0.45
A1
-
A3
TOP VIEW
0.10C
C
A1
A
SYMBOL
0.05C
LEADS COPLANARITY
SIDE VIEW
MAX
NOTES
0.50
0.55
-
-
0.05
-
0.127 REF
-
b
0.15
0.20
0.25
5
D
2.15
2.20
2.25
-
E
1.35
1.40
1.45
-
e
0.40 BSC
-
k
0.20
-
-
-
L
0.35
0.40
0.45
-
N
12
2
Nd
3
3
Ne
3
3
θ
0
-
12
4
Rev. 0 12/06
NOTES:
(DATUM A)
PIN #1 ID
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
NX L
1 2
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on D and E side, respectively.
e
Ne
(DATUM B)
NX b
5
0.10 MC A B
0.05 MC
Nd
3
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be either a mold or mark feature.
7. Maximum package warpage is 0.05mm.
8. Maximum allowable burrs is 0.076mm in all directions.
BOTTOM VIEW
9. Same as JEDEC MO-255UABD except:
No lead-pull-back, "A" MIN dimension = 0.45 not 0.50mm
"L" MAX dimension = 0.45 not 0.42mm.
CL
NX (b)
10. For additional information, to assist with the PCB Land Pattern
Design effort, see Intersil Technical Brief TB389.
(A1)
L
5
1.50
e
SECTION "C-C"
C C
TERMINAL TIP
2.30
1
2
0.40
3
0.45 (12x)
0.25 (12x)
0.40
TYPICAL RECOMMENDED LAND PATTERN
24
10
FN6817.4
June 17, 2010
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