EL4094 Datasheet

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August 1996, Rev D
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8-INT
1-88
Video Gain Control/Fader
EL4094
FN7160
Features
The EL4094 is a complete two-input
fader. It combines two inputs according
to the equation:
VOUT = VINA (0.5V + VG) + VINB (0.5V - VG),
where VGAIN is the difference between VGAIN and VGAIN
pin voltages and ranges from -0.5V to +0.5V. It has a wide
60MHz bandwidth at -3dB, and is designed for excellent
video distortion performance. The EL4094 is the same circuit
as the EL4095, but with feedback resistors included on-chip
to implement unity-gain connection. An output buffer is
included in both circuits.
The gain-control input is also very fast, with a 20MHz smallsignal bandwidth and 70ns recovery time from overdrive.
The EL4094 is compatible with power supplies from ±5V to
±15V, and is available in both the 8-pin plastic DIP and
SO-8.
Pinout
• Complete video fader
• 0.02%/0.04° differential gain/phase @100% gain
• Output amplifier included
• Calibrated linear gain control
• ±5V to ±15V operation
• 60MHz bandwidth
• Low thermal errors
Applications
• Video faders/wipers
• Gain control
• Video text insertion
• Level adjust
• Modulation
Ordering Information
EL4094
(8-PIN PDIP, SO)
TOP VIEW
PART
NUMBER
TEMP. RANGE
PACKAGE
PKG. NO.
EL4094CN
-40°C to +85°C
8-Pin PDIP
MDP0031
EL4094CS
-40°C to +85°C
8-Pin SO
MDP0027
Manufactured under U.S. Patent No. 5,321,371, 5,374,898
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
EL4094
Absolute Maximum Ratings (TA = 25°C)
VS+
VS
VINA,
VINB
VGAIN
VGAIN
Voltage between VS+ and GND . . . . . . . . . . . . . . . . .+18V
Voltage between VS+ and VS- . . . . . . . . . . . . . . . . . .+33V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . (VS-) -0.3V
to (VS+) +0.3V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . VGAIN ±5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . VS- to VS+
IOUT
TA
TJ
TST
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35mA
Internal Power Dissipation. . . . . . . . . . . . . . . . See Curves
Operating Ambient Temp. Range . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . 150°C
Storage Temperature Range . . . . . . . . . . .-65°C to +150°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Open-Loop DC Electrical Specifications
VS = ±5V, TA = 25°C, VGAIN = +0.6V to measure channel A, VGAIN = -0.6V to
measure channel B, VGAIN = 0V, unless otherwise specified. NL, AV = 0.25V
LIMITS
PARAMETER
DESCRIPTION
MIN
UNITS
TYP
MAX
VOS
Input Offset Voltage
4
30
mV
IB+
VIN Input Bias Current
2
10
µA
PSRR
Power Supply Rejection Ratio
EG
Gain Error, 100% Setting
VIN
VIN Range
VO
Output Voltage Swing
ISC
Output Short-Circuit Current
VGAIN, 100%
60
80
dB
-0.5
-0.8
%
(V-) +2.5
(V+) -2.5
V
(V-) +2.5
(V+) -2.5
V
50
95
150
mA
Minimum Voltage at VGAIN for 100% Gain
0.45
0.5
0.55
V
VGAIN, 0%
Maximum Voltage at VGAIN for 0% Gain
-0.55
-0.5
-0.45
V
NL, Gain
Gain Control Non-linearity, VIN = ±0.5V
1.5
4
%
NL, AV = 1
Signal Non-linearity, VIN = 0 to ±1V, VGAIN = 0.55V
0.01
%
AV = 0.5
Signal Non-linearity, VIN = 0 to ±1V, VGAIN = 0V
0.05
%
AV = 0.25
Signal Non-linearity, VIN = 0 to ±1V, VGAIN = -0.25V
0.2
0.5
%
RGAIN
Resistance between VGAIN and VGAIN
4.6
5.5
6.6
kΩ
IS
Supply Current
12
14.5
19
mA
FT
Off-Channel Feedthrough
-75
-50
dB
Closed-Loop AC Electrical Specifications
VS = ±15V, CL = 15pF, TA = 25°C, AV = 100% unless otherwise noted.
LIMITS
PARAMETER
DESCRIPTION
MIN
TYP
MAX
UNITS
SR
Slew Rate; VOUT from -3V to +3V measured at -2V and +2V
370
500
V/µs
BW
Bandwidth,
-3dB
45
60
MHz
-1dB
35
MHz
-0.1dB
6
MHz
2
EL4094
Closed-Loop AC Electrical Specifications
VS = ±15V, CL = 15pF, TA = 25°C, AV = 100% unless otherwise noted. (Continued)
LIMITS
PARAMETER
dG
dθ
DESCRIPTION
MIN
TYP
MAX
UNITS
Differential Gain, AC amplitude of 286mVP-P
at 3.58MHz on DC offset of -0.7, 0, and +0.7V
AV = 100%
0.02
%
AV = 50%
0.20
%
AV = 25%
0.40
%
at 3.58MHz on DC offset of -0.7, 0, and +0.7V
AV = 100%
0.04
(°)
AV = 50%
0.20
(°)
AV = 25%
0.20
(°)
Differential Phase, AC amplitude of 286mVP-P
BW, GAIN
-3dB Gain Control Bandwidth, VGAIN Amplitude 0.5 VP-P
20
MHz
TREC, GAIN
Gain Control Recovery from Overload; VGAIN from -0.6V to 0V
70
ns
Typical Performance Curves
Small-Signal Step
Response for Gain = 100%, 50%,
25%, and 0%. VS ±5V
3
Large-Signal Step
Response for Gain = 100%, 50%,
25%, and 0%. VS ±12V
EL4094
Typical Performance Curves
(Continued)
Frequency Response vs
Capacitive Loading
Frequency Response vs Gain
Change in Slewrate and
Bandwidth with Supply Voltage
4
Frequency Response vs
Resistive Loading
Off-Channel Isolation
Over Frequency
Output Noise Over Frequency
EL4094
Typical Performance Curves
(Continued)
Change in 100% Gain Error,
Supply Current, Slewrate and
Bandwidth over Temperature
Differential Gain Error vs
VOFFSET for Gain = 100%,
75%, 50% and 25%. F = 3.58MHz
Differential Gain Error vs
VOFFSET for Gain = 100%,
75%, 50% and 25%. F = 3.58MHz
5
Nonlinearity vs VIN for
Gain = 100%, 75%, 50% and 25%
Differential Phase Error vs
VOFFSET for Gain = 100%,
75%, 50% and 25%. F = 3.58MHz
Differential Phase Error vs
VOFFSET for Gain = 100%,
75%, 50% and 25%. F = 3.58MHz
EL4094
Typical Performance Curves
(Continued)
Differential Gain and
Phase Error vs Gain
Gain vs VG. 1VDC at VINA
Gain Control Response to a Non-Overloading Step,
Constant Sinewave at VINA
6
Differential Gain and
Phase Error vs Gain
Cross-Fade Balance. VINA = VINB = 0V
VGAIN Overload Recovery Response
EL4094
Typical Performance Curves
(Continued)
Gain Control Gain vs Frequency
Change in V(100%) and V(0%) of Gain
Control vs Supply Voltage
Supply Current vs Supply Voltage
Applications Information
The EL4094 is a self-contained and calibrated fader
subsystem. When a given channel has 100% gain the circuit
behaves as a current-feedback amplifier in unity-gain
connection. As such, video and transfer distortions are very
low. As the gain of the input is reduced, a 2-quadrant
multiplier is gradually introduced into the signal path and
distortions increase with reducing gain.
The input impedance also changes with gain setting, from
about 1MΩ at 100% gain down to 16kΩ at zero gain. To
7
Change in V(100%) and V(0%) of
Gain Control vs /VG Offset
Change in V(100%) and V(0%) of Gain
Control vs Die Temperature
Maximum Dissipation vs
Ambient Temperature
maximize gain accuracy and linearity, the inputs should be
driven from source impedances of 500Ω or less.
Linearity
The EL4094 is designed to work linearly with ±2V inputs, but
lowest distortion occurs at ±1V levels and below. Errors are
closer to those of a good current-feedback amplifier above
90% gain.
Low-frequency linearity is 0.1% or better for gains 25% to
100% and inputs up to 1V. NTSC differential gain and phase
errors are better than 0.3% and 0.3° for the 25% to 100%
gain range. These distortions are not strongly affected by
EL4094
supply voltage nor output loading, at least down to 150Ω. For
settling to 0.1%, however, it is best to not load the output
heavily and to run the EL4094 on the lowest practical supply
voltages, so that thermal effects are minimized.
Gain Control Inputs
The gain control inputs are differential and may be biased at
any voltage as long as VGAIN is less than 2.5V below V+ and
3V above V-. The differential input impedance is 5.5kΩ, and
the common-mode impedance is more than 500kΩ. With
zero differential voltage on the gain inputs, both signal inputs
have a 50% gain factor. Nominal calibration sets the 100%
gain of VINA input at +0.5V of gain control voltage, and 0% at
-0.5V of gain control. VINB’s gain is complementary to that of
VINA; +0.5V of gain control sets 0% gain at VINB and -0.5V
gain control sets 100% VINB gain. The gain control does not
have a completely abrupt transition at the 0% and 100%
points. There is about 10mV of “soft” transfer at the gain
endpoints. To obtain the most accurate 100% gain factor or
best attenuation at 0% gain, it is necessary to overdrive the
gain control input by 30mV or more. This would set the gain
control voltage range as -0.565V to +0.565V, or 30mV
beyond the maximum guaranteed 0% to 100% range. In fact,
the gain control inputs are very complex. Here is a
representation of the terminals:
Output Loading
The EL4094 does not work well with heavy capacitive loads.
Like all amplifier outputs, the output impedance becomes
inductive over frequency resonating with a capacitive load.
The effective output inductance of the EL4094 is about
350nH. More than 50pF will cause excessive frequency
response peaking and transient ringing. The problem can be
solved by inserting a low-value resistor in series with the
load, 22Ω or more. If a series resistance cannot be used,
then adding a 300Ω or less load resistor to ground or a
“snubber” network may help. A snubber is a resistor in series
with a capacitor, 150Ω and 100pF being typical values. The
advantage of a snubber is that it does not draw DC load
current.
Unterminated coaxial line loads can also cause resonances,
and they should be terminated either at the far end or a
series back-match resistor installed between the EL4094
and the cable.
The output stage can deliver up to 140mA into a short-circuit
load, but it is only rated for a continuous 35mA. More
continuous current can cause reliability problems with the
on-chip metal interconnect. Video levels and loads cause no
problems at all.
Noise
The EL4094 has a very simple noise characteristic: the
output noise is constant (40nV/√Hz wideband) for all gain
settings. The input-referred noise is then the output noise
divided by the gain. For instance, at a gain of 50% the input
noise is 40nV/√Hz/0.5, or 80nV/√Hz.
Bypassing
FIGURE 1. REPRESENTATION OF GAIN CONTROL
INPUTS VG AND /VG
For gain control inputs between ±0.5V (±90µA), the diode
bridge is a low impedance and all of the current into VG flows
back out through/VG. When gain control inputs exceed this
amount, the bridge becomes a high impedance as some of
the diodes shut off, and the VG impedance rises sharply
from the nominal 5.5KΩ to about 500KΩ. This is the
condition of gain control overdrive. The actual circuit
produces a much sharper overdrive characteristic than does
the simple diode bridge of this representation.
The gain input has a 20MHz -3dB bandwidth and 17ns
risetime for inputs to ±0.45V. When the gain control voltage
exceeds the 0% or 100% values, a 70ns overdrive recovery
transient will occur when it is brought back to linear range. If
quicker gain overdrive response is required, the Force
control inputs of the EL4095 can be used.
8
The EL4094 is fairly tolerant of power-supply bypassing, but
best multiplier performance is obtained with closely
connected 0.1µF ceramic capacitors. The leaded chip
capacitors are good, but neither additional tantalums nor
chip components are necessary. The signal inputs can
oscillate locally when connected to long lines or
unterminated cables.
Power Dissipation
Peak die temperature must not exceed 150°C. At this
temperature, the epoxy begins to soften and becomes
unstable, chemically and mechanically. This allows 75°C
internal temperature rise for a 75°C ambient. The EL4094 in
the 8-pin PDIP package has a thermal resistance of 87°/W,
and can thus dissipate 862mW at a 75°C ambient
temperature. The device draws 17mA maximum supply
current, only 510mW at ±15V supplies, and the circuit has no
dissipation problems in this package.
The SO-8 surface-mount package has a 153°/W thermal
resistance with the EL4094, and only 490mW can be
dissipated at 75°C ambient temperature. The EL4094 thus
cannot be operated with ±15V supplies at 75°C in the
surface-mount package; the supplies should be reduced to
EL4094
±5V to ±12V levels, especially if extra dissipation occurs
when driving a load.
distortion for varying inputs, with the output set to standard
video level:
The EL4094 as a Level Adjust
A common use for gain controls is as an input signal
leveller—a circuit that scales too-large or too-small signals to
a standard amplitude. A typical situation would be to scale a
variable video input by +6dB to -6dB to obtain a standard
amplitude. The EL4094 cannot provide more than 0dB gain,
but it can span the range of 0dB to -12dB with another
amplifier gaining the output up by 6dB. The simplest way to
obtain the range is to simply ground the B input and vary the
gain of the signal applied to the A input. The disadvantage of
this approach is that linearity degrades at low gains. By
connecting the signal to the A input of the EL4094 and the
signal attenuated by 12dB to the B input, the gain control
offers the highest linearity possible at 0dB and -12dB
extremes, and good performance between. The circuit is
shown on the following page.
The EL4095 can be used to provide the required gains
without the extra amplifier. In practice, the gain control is
adjusted to set a standard video level regardless of the input
level. The EL4583 sync-separator has a recovered
amplitude output that can be used to servo the gain control
voltage. Here is the curve of differential gain and phase
FIGURE 2. DIFFERENTIAL GAIN AND PHASE OF
LINEARIZED LEVEL CONTROL
The differential gain error is kept to 0.3% and the differential
phase to 0.15° or better over the entire input range.
The EL4094 as an Adjustable Filter
Equalizers are used to adjust the delay or frequency
response of systems. A typical use is to compensate for the
high-frequency loss of a cable system ahead of the cable so
as to create a flat response at the far end. A generalized
scheme with the EL4094 is shown below.
FIGURE 3. +6dB to -6dB LINEARIZED LEVEL CONTROL
9
EL4094
FIGURE 4. GENERAL ADJUSTABLE EQUALIZER
For an adjustable preemphasis filter, for instance, filter A
might be an all-pass filter to compensate for the delay of filter
B, a peaking filter. Fading the gain from A to B provides a
variable amount of peaking, but constant delay.
The EL4094 as a Phase Modulator
To make a phase modulator, filter A might be a leadingphase network, and filter B a lagging network. The wide
bandwidth of the gain-control input allows wideband phase
modulation of the carrier applied to the main input. Of
course, the carrier and gain inputs must not be digital but be
reasonably clean sinewaves for the modulation to be
accurate.
EL4094 Macromodel
This macromodel is offered to allow simulation of general
EL4094 behavior. We have included these characteristics:
-
Small-signal frequency response
Output loading effects
Input impedance
Off-channel feedthrough
Output impedance over frequency
Signal path DC distortions
VGAIN I-V characteristics
VGAIN overdrive recovery delay
100% gain error
10
These will give a good range of results for various operating
conditions, but the macromodel does not behave identically
as the circuit in these areas:
- Temperature effects
- Signal overload effects
- Signal and VG operating range
- Current-limit
- Video and high-frequency distortions
- Supply voltage effects
- Slewrate limitations
- Noise
- Power supply interactions
The macromodel’s netlist is based on the Pspice simulator
(copywritten by the Microsim Company). Other simulators
may not support the POLY function, which is used to
implement multiplication as well as square-low
nonlinearities.
EL4094
FIGURE 5. GEL4094 MACROMODEL SCHEMATIC
EL4094 Macromodel
******
******
*
VINB
*
|
VOUT
*
|
|
/VG
*
|
|
|
VG
*
|
|
|
|
VINA
*
|
|
|
|
|
.subckt EL4094subckt (1 4 6 7 8)
***
ROL 810 0 290k
Ccomp 810 0 3.5p
G1 10 0 810 0 -10
ROUT 10 0 0.1
LOUT 10 4 350.200n
RLOUT 10 4 80
r1 10 910 10
c1 910 911 300p
r2 911 0 90
***
*** Input channel A
***
RINA 22 910 16k
ra 11 0 1k
Cfeedthrougha 23 8 130p
Rfeedthrougha 8 22 1.0
Ela 23 22 1 0 1.0
Rspice3 23 22 1E12
G1a110POLY(1)(22, 910)0.00.001-3E-6
G2a8100POLY(2)(11,0)(13, 0)0.00.00.00.00.001
***
***Input channel B
***
RINB 25 910 16k
rb 20 0 1k
Cfeedthroughb 24 1 130p
11
EL4094
Rfeedthroughb 1 25 1.0
E1b 24 25 8 0 1.0
Rspice4 24 25 1E12
G1b200POLY(1)(25, 910)0.00.001-3E-6
G2b8100POLY(2)(20,0)(19, 0)0.00.00.00.00.001
***
***Gain control
***
Rspice1 13 0 1E12
Rspice2 18 0 1E12
R10 14 0 1E7
C10 14 0 8E-16
D1 14 15 Dclamp
D2 16 14 Dclamp
.model Dclamp D (TT=200n)
V1 15 0 4999.3
V2 0 16 4999.3
V3 13 17 0.5
V4 19 18 0.5
G10 14 0 7 6 -0.001
G11 7 6 14 0 -2E-8
E10 17 0 14 0 1E-4
E11 18 0 14 0 -1E-4
***
.ends
******
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reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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12
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