Fujitsu Microelectronics Europe
User Guide
FMEMCU- UG-910005-24
MB91360 SERIES
EVALUATION BOARD
LEVELSHIFTER BOARD
USER GUIDE
LEVELSHIFTER BOARD
Revision History
Revision History
Date
27/07/00
23/10/00
24/10/00
31/10/00
06/06/01
11/02/02
19/02/02
31/01/03
06/02/03
04/03/03
21/10/03
27/11/03
02/03/2007
09/01/2009
Issue
1.1 NFL
Hardware –REV 1.0
WRx1 on GAL is missed patch wire on Pin 7
1.2 NFL
updated GAL with V2.0
1.3 NFL
wrong address line
changed A0 to A18 on RAM, changed A1 to A19 on RAM
1.4 NFL
short circuit JP21 BREQ, changed JP21 to 1BREQ
1.5 NFL
Hardware-REV2.0 with bug fix up to V1.4
1.6 NFL
New disclaimer corrected
1.7 NFL
wrong pin description, figure 3 corrected
1.8 MST
New format
1.9 MST
typos corrected
2.0 DFI
added information about transceiver direction signal
2.1 NFL
added information about www
2.2 NFL
Hardware-REV2.0 bug fix for floating CS-signal in case of unused SRAM
2.2 Recycling Note added
2.4 corrected version conflict, information WWW updated
This document contains 20 pages.
UG-910005-24
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© Fujitsu Microelectronics Europe GmbH
LEVELSHIFTER BOARD
Warranty and Disclaimer
Warranty and Disclaimer
To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH restricts
its warranties and its liability for LEVELSHIFTER BOARD and all its deliverables (eg. software
include or header files, application examples, target boards, evaluation boards, engineering samples
of IC’s etc.), its performance and any consequential damages, on the use of the Product in
accordance with (i) the terms of the License Agreement and the Sale and Purchase Agreement under
which agreements the Product has been delivered, (ii) the technical descriptions and (iii) all
accompanying written materials. In addition, to the maximum extent permitted by applicable law,
Fujitsu Microelectronics Europe GmbH disclaims all warranties and liabilities for the performance of
the Product and any consequential damages in cases of unauthorised decompiling and/or reverse
engineering and/or disassembling. Note, the LEVELSHIFTER BOARD and all its deliverables are
intended and must only be used in an evaluation laboratory environment.
1.
Fujitsu Microelectronics Europe GmbH warrants that the Product will perform substantially in
accordance with the accompanying written materials for a period of 90 days form the date of
receipt by the customer. Concerning the hardware components of the Product, Fujitsu
Microelectronics Europe GmbH warrants that the Product will be free from defects in material
and workmanship under use and service as specified in the accompanying written materials
for a duration of 1 year from the date of receipt by the customer.
2.
Should a Product turn out to be defect, Fujitsu Microelectronics Europe GmbH´s entire liability
and the customer´s exclusive remedy shall be, at Fujitsu Microelectronics Europe GmbH´s
sole discretion, either return of the purchase price and the license fee, or replacement of the
Product or parts thereof, if the Product is returned to Fujitsu Microelectronics Europe GmbH in
original packing and without further defects resulting from the customer´s use or the transport.
However, this warranty is excluded if the defect has resulted from an accident not attributable
to Fujitsu Microelectronics Europe GmbH, or abuse or misapplication attributable to the
customer or any other third party not relating to Fujitsu Microelectronics Europe GmbH.
3.
To the maximum extent permitted by applicable law Fujitsu Microelectronics Europe GmbH
disclaims all other warranties, whether expressed or implied, in particular, but not limited to,
warranties of merchantability and fitness for a particular purpose for which the Product is not
designated.
4.
To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH´s
and its suppliers´ liability is restricted to intention and gross negligence.
NO LIABILITY FOR CONSEQUENTIAL DAMAGES
To the maximum extent permitted by applicable law, in no event shall Fujitsu
Microelectronics Europe GmbH and its suppliers be liable for any damages whatsoever
(including but without limitation, consequential and/or indirect damages for personal
injury, assets of substantial value, loss of profits, interruption of business operation,
loss of information, or any other monetary or pecuniary loss) arising from the use of
the Product.
Should one of the above stipulations be or become invalid and/or unenforceable, the remaining
stipulations shall stay in full effect
© Fujitsu Microelectronics Europe GmbH
-3-
UG-910005-24
LEVELSHIFTER BOARD
Contents
Contents
REVISION HISTORY ............................................................................................................ 2
WARRANTY AND DISCLAIMER ......................................................................................... 3
CONTENTS .......................................................................................................................... 4
0 INTRODUCTION .............................................................................................................. 5
1 FEATURES ...................................................................................................................... 6
1.1
Key Features........................................................................................................... 6
1.2
Transceiver direction control signal ......................................................................... 7
2 INSTALLATION ............................................................................................................... 8
2.1
Using of the header board for extended bus interface at 3v level ............................ 8
2.1.1
Using of new header board MB2197-127-3V3 ........................................... 8
2.1.2
Using of modified header board MB2197-127............................................ 8
2.2
Follow these steps to use the Level-Shifter board ................................................... 9
2.3
CS-setting on EVA board (default setting) ............................................................... 9
2.4
Jumper setting on Level-Shifter board (Default setting) ......................................... 10
2.5
CS-setting on EVA board (SRAM setting).............................................................. 12
2.6
Jumper setting on Level-Shifter board (SRAM setting) .......................................... 12
3 APPENDIX..................................................................................................................... 13
3.1
Silk Screen ............................................................................................................ 13
3.2
PAL-Listing............................................................................................................ 14
3.3
Simple test routine for SRAM of Level-Shifter board.............................................. 16
3.4
HW-Error and Patch List........................................................................................ 18
3.5
Figures .................................................................................................................. 18
4 INFORMATION IN THE WWW....................................................................................... 19
UG-910005-24
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© Fujitsu Microelectronics Europe GmbH
LEVELSHIFTER BOARD
Introduction
0 Introduction
This report describes the basic features of the new LEVEL-SHIFTER board. This board can
be used together with 32-bit target board to support the external bus interface at 3.3V levels
on the MB2197-01 emulator.
The Eva-chip MB91V360 and MB91FV360 don't support the external bus interface at 3.3V
levels. The “VGC Level-Shifter” board can be used as conversion for external bus level. The
board can be configured as level shifter with additional memory.
All IO-signals are available on the header board MB2197-127-3V3.
Related documents such as MB91360 or MB91F36x “Hardware Manual” are available and
should always be use in addition to this manual.
Note, this board must only be used for test applications in a laboratory environment.
© Fujitsu Microelectronics Europe GmbH
-5-
UG-910005-24
LEVELSHIFTER BOARD
Chapter 1 Features
1 Features
1.1
Key Features
-
DC Power supply can be used from target or external
-
3V Regulator for level shifter circuit and SRAM
-
512k x16 external SRAM available for user code and data
-
22V10-Pal for decoder of memory access
-
Connectors suitable to evaluation board MB2197-120
-
Various jumper for individual configuration
-
Not used bus control signals can be used as I/O-pin
Connectors to
EMU Board
3V Regulator
JP2/5/8/10-12:
CS as I/O
Target --> EMU
JP13-17:
ext. Bus or I/O
Target --> EMU
JP36:
Power Supply
JP1/3/4/6/7/9:
DMA acces
9V DC Input
ext. Power Supply
JP23-28: CSx
EMU --> Target
1024kB SRAM
JP18-22:
ext. Bus or I/O
EMU --> Target
Decoder
JP29-34:
CS for SRAM
Connectors to
Target Board
Level Shifter
Figure 1: Illustrated Board Components
UG-910005-24
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© Fujitsu Microelectronics Europe GmbH
LEVELSHIFTER BOARD
Chapter 1 Features
VCC1
5V
Regulator
5V
GND
5V I/O-Interface
VSS
3V
5V ext.
3V
5VI/O + ext. Bus Interface
5V
Probe cable
MB2197-127
target system
5V
3V ext. Bus Interface
Emulator
system
MB2197-120
D0-D31
3V
D0-D31
D0-D31
A0-A20
A0-A20
CS0..6 /RD/
W R0123/DMA
CS0..6 /RD/W R0123/
DMA
Connector
to emulator
SRAM
1024kB
A0-A17
Connector
to target
D0-D15
CS0..6 /RD/
W R0123
Decoder
RD/W R
CE
D16-D31
U/L
VGC Level Shifter Board
Figure 2: Block diagram - Level-Shifter board
1.2
Transceiver direction control signal
The DATA bus (D[31:0]) transceiver direction signal is a hardwired combination of CSx1 and
RDx :
DIR=CSx1 & not(RDx).
The ADDRESS bus (A[20:0], WRx[3:0], CLK, RDx) direction is fixed to EVA TARGET.
Other control signals (CSx[6:2], CSx0, BREQ, BGRNTx, ALE, AH/BOOT, AS, DREQ, DACK,
DEOP) can be configured by jumpers on the level shifter board.
DIR
CSx1
RDx
signal on level
shifter board
from
EVA
board
from
EVA
board
direction of
ADDRESS bus
A[20:0], CLK,
WRx[3:0], RDx
direction of
DATA bus D[31:0]
fixed direction
EVA TARGET
(B A)1
1
EVA TARGET
(B A)1
0
EVA TARGET
(B A) 1
1
1
0
else
pin names of transceiver 74ALVC164245
© Fujitsu Microelectronics Europe GmbH
-7-
UG-910005-24
LEVELSHIFTER BOARD
Chapter 2 Installation
2 Installation
2.1
Using of the header board for extended bus interface at 3v level
2.1.1 Using of new header board MB2197-127-3V3
For the extended bus interface at 3v level we using the new header board
MB2197-127-3V3, designed with separately 3v and 5v power supply lines.
2.1.2 Using of modified header board MB2197-127
If VDD pins 25,51,182 and 198 are connected to 3.3v and VDD-pins 79,82,144,160 and 118
to 5v externally the external bus interface can be normally operated at 3.3v.
Please note that the Eva-chip MB91V360 doesn't support the external bus interface at 3.3v
levels.
The Level-Shifter board is designed to convert 5v to 3.3v bus interface for this.
The problem is yet, that the various VDD-pin (3.3v and 5v) are connected on the header
board. Therefore, we have to cut the 3.3v pins 25,51,182 and 198 on the pin header of the
header board MB2197-127.
105
156
104
157
182
198
53
51
208
25
52
1
Pin Header
MB2197-127
Figure 3: Modification of Pin-Header Board MB2197-127
UG-910005-24
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© Fujitsu Microelectronics Europe GmbH
LEVELSHIFTER BOARD
Chapter 2 Installation
2.2
Follow these steps to use the Level-Shifter board
1.
Be sure to have the Level-Shifter board in the appropriate mode for your
application.
2.
Check the position of jumpers according to the following table. The standard
setting should be used for the software examples provided.
3.
Connect the Level Shifter Board immediate with EVA board.
4.
Connect the probe cable from Level-Shifter board to header board on the target
board.
5.
Check the 5v power supply on the VCC1 Test-Pin of EVA board.
6.
Check the 3v power supply on the 3v regulator (Level Shifter Board)
Top Side
EVA-Board
Level Shifter-Board
Header-Board
Botton
Side
Target-Board
Figure 4: Installation Level-Shifter board
2.3
CS-setting on EVA board (default setting)
Make sure to connect CSx1 (USER) on the EVA adapter board (S1 – 1 – USER) to the CS
signal, which is used for the emulation SRAM on the adapter board. This is necessary to set
the transceiver direction to EVA TARGET if a read access from the adapter board SRAM
is performed. Otherwise, the transceiver and the adapter board SRAM write to the DATA
bus, causing corrupted data. Please refer also to section 1.2.
E.g. if CSx1 is routed to the adapter board SRAM (S1 – 1 – EVA), CSx1 must also be
connected to CSx1 (USER) (S1 – 1 –USER).
CS
Address area
Used for
CS0
CS1
18:0000 - 1F:FFFF
rest
CS2
CS3
CS4
CS5
CS6
-
SRAM EVA board
Direction Level-Shifter board
(Read Level-Shifter = RD & /CS1)
-
© Fujitsu Microelectronics Europe GmbH
-9-
S1
S2
3er JP
USER
SRAM
-
-
UG-910005-24
LEVELSHIFTER BOARD
Chapter 2 Installation
2.4
Jumper setting on Level-Shifter board (Default setting)
Jumper
Signal
JP1
VGC_DACK
JP2
VGC_CSx0
JP3
DACK
Description
I/O
1-2 closed: EVA LS
O
2-3 closed: LS EVA
I
2-JH closed: EVA Target
without LS
I/O
closed: Target LS EVA
I
1-2 closed: LS Target
O
2-3 closed: Target LS
I
open: EVA target without LS, if
JP1 2-JH closed
JP4
VGC_DEOP
JP5
VGC_CSx4
JP6
DEOP
JP7
VGC_DREQ
JP8
VGC_CSx3
JP9
DREQ
setting
open
open
open
I/O
1-2 closed: EVA LS
I
2-3 closed: LS EVA
O
2-JH closed: EVA Target without
LS
I/O
closed: Target LS EVA
I
1-2 closed: LS Target
O
2-3 closed: Target LS
I
open: EVA target without LS, if
JP4 2-JH closed
Standard
open
open
open
I/O
1-2 closed: EVA LS
O
2-3 closed: LS EVA
I
2-JH closed: EVA Target
without LS
I/O
closed: Target LS EVA
I
1-2 closed: LS Target
O
2-3 closed: Target LS
I
open: EVA target without LS, if
JP7 2-JH closed
I/O
open
open
open
JP10
VGC_CSx2
closed: Target LS EVA
I
open
JP11
VGC_CSx5
closed: Target LS EVA
I
open
JP12
VGC_CSx6
closed: Target LS EVA
I
open
JP13
VGC_BGRNTx
closed: Target LS EVA
I
open
JP14
VGC_ALE
closed: Target LS EVA
I
open
JP15
VGC_AH/BOOT
closed: Target LS EVA
I
closed
JP16
VGC_BREQ
closed: Target LS EVA
I
closed
UG-910005-24
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© Fujitsu Microelectronics Europe GmbH
LEVELSHIFTER BOARD
Chapter 2 Installation
Standard
Jumper
Signal
Description
I/O
JP17
VGC_AS
closed: Target LS EVA
I
open
JP18
BGRNTx
closed: EVA LS Target
O
closed
JP19
ALE
closed: EVA LS Target
O
closed
JP20
AH/BOOT
closed: EVA LS Target
O
open
JP21
BREQ
closed: EVA LS Target
O
open
JP22
AS
closed: EVA LS Target
O
closed
JP23
CSx0
closed: EVA LS Target
O
closed
JP24
CSx2
closed: EVA LS Target
O
closed
JP25
CSx3
closed: EVA LS Target
O
closed
JP26
CSx4
closed: EVA LS Target
O
closed
JP27
CSx5
closed: EVA LS Target
O
closed
JP28
CSx6
closed: EVA LS Target
O
closed
JP29
CSx0
closed: CSx0 select SRAM
-
open
JP30
CSx2
closed: CSx2 select SRAM
-
open
JP31
CSx3
closed: CSx3 select SRAM
-
open
JP32
CSx4
closed: CSx4 select SRAM
-
open
JP33
CSx5
closed: CSx5 select SRAM
-
open
JP34
CSx6
closed: CSx6 select SRAM
-
open
Power supply
1-2 closed: ext. 5V DC Power
supply
-
2-3 closed
JP36
setting
2-3 closed: int. 5V VDD of Target
LS:
Level shifter board
EVA: Evaluation board
For more details see the schematic in the appendix.
© Fujitsu Microelectronics Europe GmbH
- 11 -
UG-910005-24
LEVELSHIFTER BOARD
Chapter 2 Installation
2.5
CS-setting on EVA board (SRAM setting)
Following setting is an example for using of additional SRAM of Level-Shifter board.
CS
Address area
Used for
S1
S2
CS0
-
-
-
-
CS1
18:0000 - 1F:FFFF
SRAM EVA board
3er JP
SRAM
rest
Direction Level-Sshifter board
USER
(Read Level-Shifter = RD & /CS1)
CS2
-
-
-
-
CS3
-
-
-
-
CS4
-
-
-
-
CS5
-
-
-
-
CS6
20:0000 – 27:FFFF
SRAM Level shifter board
USER
-
2.6
Jumper setting on Level-Shifter board (SRAM setting)
Following setting is an example for using of additional SRAM of Level-Shifter board.
Standard
Jumper
Signal
Description
I/O
JP23
CSx0
closed: EVA LS Target
O
closed
JP24
CSx2
closed: EVA LS Target
O
closed
JP25
CSx3
closed: EVA LS Target
O
closed
JP26
CSx4
closed: EVA LS Target
O
closed
JP27
CSx5
closed: EVA LS Target
O
closed
JP28
CSx6
closed: EVA LS Target
O
closed
JP29
CSx0
closed: CSx0 select SRAM
-
open
JP30
CSx2
closed: CSx2 select SRAM
-
open
JP31
CSx3
closed: CSx3 select SRAM
-
open
JP32
CSx4
closed: CSx4 select SRAM
-
open
JP33
CSx5
closed: CSx5 select SRAM
-
open
JP34
CSx6
closed: CSx6 select SRAM
-
closed
UG-910005-24
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setting
© Fujitsu Microelectronics Europe GmbH
LEVELSHIFTER BOARD
Chapter 3 Appendix
3 Appendix
3.1
Silk Screen
© Fujitsu Microelectronics Europe GmbH
- 13 -
UG-910005-24
LEVELSHIFTER BOARD
Chapter 3 Appendix
3.2
PAL-Listing
*******************************************************************************
LevelShifter
*******************************************************************************
ADVANCED PLD
Device
Created
Name
Partno
Revision
Date
Designer
Company
Assembly
Location
4.0 Serial# MW-67999999
p22v10lcc Library DLIB-h-36-17
Mo Okt 23
LevelShifter
FJJ18A
2.0
23/10/2000
JRohn
Fujitsu
None
U10
===============================================================================
Expanded Product Terms
===============================================================================
LB1x =>
CS
# RDx & WR3x
LB2x =>
CS
# RDx & WR1x
UB1x =>
CS
# RDx & WR2x
UB2x =>
CS
# RDx & WR0x
WEx =>
WR0x & WR1x & WR2x & WR3x
LB1x.oe
1
=>
LB2x.oe
1
=>
UB1x.oe
1
=>
UB2x.oe
1
=>
WEx.oe
1
=>
UG-910005-24
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© Fujitsu Microelectronics Europe GmbH
LEVELSHIFTER BOARD
Chapter 3 Appendix
===============================================================================
Symbol Table
===============================================================================
Pin Variable
Pol
Name
--- -------CS
LB1x
LB2x
RDx
UB1x
UB2x
WEx
WR0x
WR1x
WR2x
WR3x
LB1x
LB2x
UB1x
UB2x
WEx
LEGEND
D
I
U
T
:
:
:
:
Ext
---
Pin
---
Type
----
oe
oe
oe
oe
oe
6
18
19
2
20
21
17
3
7
4
5
18
19
20
21
17
V
V
V
V
V
V
V
V
V
V
V
D
D
D
D
D
default variable
intermediate variable
undefined
function
Pterms
Used
-----2
2
2
2
1
1
1
1
1
1
F : field
N : node
V : variable
Max
Pterms
------
Min
Level
-----
10
12
14
16
8
1
1
1
1
1
2
2
2
2
2
0
0
0
0
0
G : group
M : extended node
X : extended variable
===============================================================================
Chip Diagram
===============================================================================
NC
RDx | Vcc
WR0x | | |
WR2x | | | | |
x x x x x x x
_|__|__|__|__|__|__|__
/ 4 3 2 1 2 2 2 |
|
8 7 6 |
WR3x x-|05
25|-x
CS x-|06
24|-x
WR1x x-|07
23|-x
NC x-|08
LevelShifter
22|-x NC
x-|09
21|-x UB2x
x-|10
20|-x UB1x
x-|11
19|-x LB2x
| 1 1 1 1 1 1 1 |
|__2__3__4__5__6__7__8__|
| | | | | | |
x x x x x x x
| | | | | LB1x
| | | WEx
GND |
© Fujitsu Microelectronics Europe GmbH
- 15 -
UG-910005-24
LEVELSHIFTER BOARD
Chapter 3 Appendix
3.3
Simple test routine for SRAM of Level-Shifter board
/********************************************************************************************/
/* Levelshifter – Simple Test Routine for SRAM-Access with CS6
*/
/* Usage MEM window of Softune workbench for memory check at 20:00000000 */
/* Notes: before usage of the SRAM must be set jumper and pre selected CS6 */
/*
by software with port function register
*/
/********************************************************************************************/
#include "MB91360.H"
#include "global.h"
/* include all IO-Register definitions */
/* some useful definitions */
/* declarations */
/* prototypes */
/*****************************************************************************/
/* Main Routine */
/*****************************************************************************/
void main(void)
{
#define DATATYPE long
volatile DATATYPE Data;
volatile DATATYPE *pData;
unsigned long i;
/* set size of SRAM-Memory 0:0000-F:FFFF */
#define RAM_SIZE 0x40000
/* set chip select for test */
#define CS6_Adr 0x20000000
/* Chip-select area 2 */
pData = (DATATYPE *)CS6_Adr;
/* Pointer at ext. SRAM */
PFR7_PF76
PFR27
/* PFR select CS6 */
/* ... */
= 1;
= 0x40;
ASR6 = CS6_Adr>>16;
AMR6 = 0x000F;
AMD6 = 0x17;
CSE = 0x42;
/* 1Mbyte address range 2000:0000-200F:FFFF */
/* 32 bits bus width, 7 wait cycles,
RDY disable, SRAM 150ns cycle time */
/* CS1 + CS6 enable */
/*****************************************************************************/
/* RAM check 0x12345678 */
/*****************************************************************************/
pData = (DATATYPE*)CS6_Adr;
for ( i=0;i<RAM_SIZE;i++ )
*pData++ = 0x12345678;
/* set Pointer at start-ADR of ext. SRAM */
/* (2 x 512kbyts) */
/* write Testpattern into ext.SRAM of LevelShifter-Board
*/
pData = (DATATYPE*)CS6_Adr;
for ( i=0;i<RAM_SIZE;i++ )
if ( *pData++ != 0x12345678 )
__asm(" INTE ");
at this Adress-4 */
/*
/*
/*
/*
set Pointer at start-ADR of ext. SRAM */
(2 x 512kbyts) */
check memory - SRAM of LevelShifter-Board */
--> Emulator stop by memory error
/*****************************************************************************/
/* RAM check 0x55555555 */
/*****************************************************************************/
pData = (DATATYPE*)CS6_Adr;
for ( i=0;i<RAM_SIZE;i++ )
*pData++ = 0x55555555;
/* set Pointer at start-ADR of ext. SRAM */
/* (2 x 512kbyts) */
/* write Testpattern into ext.SRAM of LevelShifter-Board
pData = (DATATYPE*)CS6_Adr;
/* set Pointer at start-ADR of ext. SRAM */
*/
UG-910005-24
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© Fujitsu Microelectronics Europe GmbH
LEVELSHIFTER BOARD
Chapter 3 Appendix
for ( i=0;i<RAM_SIZE;i++ )
if ( *pData++ != 0x55555555 )
__asm(" INTE ");
at this Adress-4 */
/* (2 x 512kbyts) */
/* check memory - SRAM of LevelShifter-Board */
/* --> Emulator stop by memory error
/*****************************************************************************/
/* RAM check 0xaaaaaaaa */
/*****************************************************************************/
pData = (DATATYPE*)CS6_Adr;
for ( i=0;i<RAM_SIZE;i++ )
*pData++ = 0xaaaaaaaa;
/* set Pointer at start-ADR of ext. SRAM */
/* (2 x 512kbyts) */
/* write Testpattern into ext.SRAM of LevelShifter-Board
pData = (DATATYPE*)CS6_Adr;
for ( i=0;i<RAM_SIZE;i++ )
if ( *pData++ != 0xaaaaaaaa )
__asm(" INTE ");
at this Adress-4 */
/*
/*
/*
/*
*/
set Pointer at start-ADR of ext. SRAM */
(2 x 512kbyts) */
check memory - SRAM of LevelShifter-Board */
--> Emulator stop by memory error
/*****************************************************************************/
/* RAM check via address counter */
/*****************************************************************************/
pData = (DATATYPE*)CS6_Adr;
for ( i=0;i<RAM_SIZE;i++ )
*pData++ = i;
/* set Pointer at start-ADR of ext. SRAM */
/* (2 x 512kbyts) */
/* write Testpattern into ext.SRAM of LevelShifter-Board
*/
pData = (DATATYPE*)CS6_Adr;
for ( i=0;i<RAM_SIZE;i++ )
if ( *pData++ != i )
__asm(" INTE ");
at this Adress-4 */
/*
/*
/*
/*
set Pointer at start-ADR of ext. SRAM */
(2 x 512kbyts) */
check memory - SRAM of LevelShifter-Board */
--> Emulator stop by memory error
/*****************************************************************************/
/* End of RAM check */
/*****************************************************************************/
__asm(" INTE ");
/* --> Emulator stop without memory error */
}
/*****************************************************************************/
/* End of Main Routine */
/*****************************************************************************/
© Fujitsu Microelectronics Europe GmbH
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LEVELSHIFTER BOARD
Chapter 3 Appendix
3.4
HW-Error and Patch List
The following bugs have been found with the board and need to be observed when
working with this tool:
Date
27/07/00
HW-Errors and Patches
HW
Version
Hardware –REV 1.0 bug fix for missed WRx1 on GAL
V1.01
patch wire insert on Pin 7
23/10/00
Hardware –REV 1.0 bug fix for SRAM byte access
V1.02
updated GAL with V2.0
24/10/00
Hardware –REV 1.0 bug fix for wrong address line
V1.03
changed A0 to A18 on RAM
changed A1 to A19 on RAM
31/10/00
Hardware –REV 1.0 bug fix for short circuit JP21 BREQ
V1.04
changed JP21 to 1BREQ
06/06/01
Hardware-REV2.0 redesign with bug fix up to V1.04
V2.00
23/05/03
Hardware-REV2.0 bug fix for floating CS (JP29-JP34) in case of
unused SRAM on board, insert 10k pull-up at CS (JP29-JP34)
V2.01
3.5
Figures
Figure 1: Illustrated Board Components................................................................................. 6
Figure 2: Block diagram - Level-Shifter board ........................................................................ 7
Figure 3: Modification of Pin-Header Board MB2197-127 ...................................................... 8
Figure 4: Installation Level-Shifter board ................................................................................ 9
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© Fujitsu Microelectronics Europe GmbH
LEVELSHIFTER BOARD
Chapter 4 Information in the WWW
4 Information in the WWW
Information about FUJITSU MICROELECTRONICS Products
can be found on the following Internet pages:
Microcontrollers (8-, 16- and 32bit), Graphics Controllers
Datasheets and Hardware Manuals, Support Tools (Hard- and Software)
http://www.fme.gsdc.de/gsdc.htm
Memory products: Flash, SDRAM and FRAM
http://www.fme.fujitsu.com/products/memory/index1.html
Linear Products: Power Management, A/D and D/A Converters
http://www.fme.fujitsu.com/products/linear/start.html
Media Products: SAW filters, acoustic resonators and VCOs
http://www.fme.fujitsu.com/products/media/index1.html
For more information about FUJITSU MICROELECTRONICS
http://www.fme.fujitsu.com/products/start.html
© Fujitsu Microelectronics Europe GmbH
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UG-910005-24
LEVELSHIFTER BOARD
Chapter 4 Information in the WWW
Recycling
Gültig für EU-Länder:
Gemäß der Europäischen WEEE-Richtlinie und deren Umsetzung in landesspezifische
Gesetze nehmen wir dieses Gerät wieder zurück.
Zur Entsorgung schicken Sie das Gerät bitte an die folgende Adresse:
Fujitsu Microelectronics Europe GmbH
Warehouse/Disposal
Monzastraße 4a
63225 Langen
Valid for European Union Countries:
According to the European WEEE-Directive and its implementation into national laws we
take this device back.
For disposal please send the device to the following address:
Fujitsu Microelectronics Europe GmbH
Warehouse/Disposal
Monzastraße 4a
63225 Langen
UG-910005-24
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© Fujitsu Microelectronics Europe GmbH