Datasheet

DATASHEET
High ESD Protected, +125°C, 40Mbps, 3.3V, Full
Fail-Safe, RS-485/RS-422 Transceivers
ISL3179E, ISL3180E
Features
Intersil’s ISL3179E and ISL3180E are high ESD Protected (see
Table 2), 3.3V powered, single transceivers that meet both the
RS-485 and RS-422 standards for balanced communication.
Each device has low bus currents (+220µA/-150µA), so it
presents a “1/5 unit load” to the RS-485 bus. This allows up to
160 transceivers on the network without violating the RS-485
specification’s 32 unit load maximum, and without using
repeaters.
• High ESD protection on RS-485 I/O pins
- ISL3179E. . . . . . . . . . . . . . . . . . . . . . . . . ±16.5kV IEC61000
- ISL3180E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±12kV HBM
- Class 3 HBM level on all other pins (ISL3179E) . . . . . >9kV
Receiver (Rx) inputs feature a “full fail-safe” design, which
ensures a logic high Rx output if Rx inputs are floating,
shorted, or terminated but undriven.
• Specified for +125°C operation
• High data rates. . . . . . . . . . . . . . . . . . . . . . . . . . . up to 40Mbps
• 5V tolerant logic inputs
• 1/5 unit load allows up to 160 devices on the bus
• Full fail-safe (open, shorted, terminated/undriven) receiver
The ISL3180E is configured for full duplex applications. The
ISL3179E half duplex version multiplexes the Rx inputs and Tx
outputs to allow a transceiver with an output disable function
in 8 Ld packages.
• Hot plug - Tx and Rx outputs remain three-state during
power-up
Hot plug circuitry ensures that the Tx and Rx outputs remain in
a high impedance state while the power supply stabilizes.
• -7V to +12V common-mode input voltage range
Applications
• 16/16.5ns (max) Tx/Rx propagation delays; 1.5ns (max) skew
• Low quiescent current . . . . . . . . . . . . . . . . . . . . . . . 4mA (max)
• Low current shutdown mode . . . . . . . . . . . . . . . . . 1µA (max)
• Three-state Rx and Tx outputs
• Motor controller/position encoder systems
• Operates from a single +3.3V supply (10% tolerance)
• Factory automation
• Field bus networks
• Current limiting and thermal shutdown for driver overload
protection
• Security networks
• Pb-free (RoHS compliant)
• Building environmental control systems
TABLE 1. KEY DIFFERENCES BETWEEN HIGH-SPEED INTERFACE
FAMILY OF PARTS
• Industrial/process control networks
PART
NUMBER
FULL/HALF
DUPLEX
VCC
(V)
VOD
(V)
DATA RATE
(Mbps)
Half
3.3
1.5
40
ISL3180E
Full
3.3
1.5
40
ISL3159E
Half
5
2.1
40
ISL3259E
Half
5
2.1
100
ISL3179E
+3.3V
+3.3V
(SOIC AND MSOP PIN NUMBERS SHOWN)
+
8
0.1µF
0.1µF
+
8
VCC
1 RO
VCC
R
D
2 RE
B/Z
3 DE
A/Y
4 DI
7
RT
RT
6
DI 4
7
B/Z
DE 3
6
A/Y
RE 2
R
D
GND
GND
5
5
RO 1
FIGURE 1. TYPICAL OPERATING CIRCUIT - ISL3179E
August 25, 2015
FN6365.5
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2007-2008, 2011, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL3179E, ISL3180E
Ordering Information
PART
NUMBER
(Note 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(RoHS Compliant)
PKG. DWG. #
ISL3179EFBZ
3179 EFBZ
-40 to +125
8 Ld SOIC
M8.15
ISL3179EFUZ
179FZ
-40 to +125
8 Ld MSOP
M8.118
ISL3179EFRZ
79FZ
-40 to +125
10 Ld DFN
L10.3x3C
ISL3179EIBZ
3179 EIBZ
-40 to +85
8 Ld SOIC
M8.15
ISL3179EIUZ
179IZ
-40 to +85
8 Ld MSOP
M8.118
ISL3179EIRZ
79IZ
-40 to +85
10 Ld DFN
L10.3x3C
ISL3180EIBZ
ISL3180 EIBZ
-40 to +85
14 Ld SOIC
M14.15
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate
plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL3179E, ISL3180E. For more information on MSL please see techbrief
TB363.
TABLE 2. SUMMARY OF FEATURES
PART
NUMBER
HALF/FULL
DUPLEX
DATA RATE
(Mbps)
RS-485 PIN
ESD LEVEL
HOT
PLUG?
RX/TX
ENABLE?
QUIESCENT
ICC
(mA)
LOW POWER
SHUTDOWN?
PIN
COUNT
ISL3179E
HALF
40
16.5kV
IEC61000
YES
YES
2.6
YES
8, 10
ISL3180E
FULL
40
12kV HBM
YES
YES
2.6
YES
14
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ISL3179E, ISL3180E
Pin Configurations
RO 1
R
RE 2
DE 3
DI 4
D
ISL3180E
(14 LD SOIC)
TOP VIEW
ISL3179E
(10 LD DFN)
TOP VIEW
ISL3179E
(8 LD SOIC, MSOP)
TOP VIEW
8
VCC
RO
1
10 VCC
NC 1
7
B/Z
RE
2
9 NC
RO 2
8 B/Z
RE 3
6
A/Y
DE
3
5
GND
DI
4
7 A/Y
DE 4
NC
5
6 GND
DI 5
EP
Truth Table
14 VCC
13 NC
R
12 A
11 B
D
10 Z
GND 6
9 Y
GND 7
8 NC
Truth Table
RECEIVING
TRANSMITTING
INPUTS
INPUTS
OUTPUTS
RE
DE
DI
B/Z
A/Y
X
1
1
0
1
X
1
0
1
0
0
0
X
High-Z
High-Z
1
0
X
High-Z*
High-Z*
NOTE: *Shutdown Mode
A-B
OUTPUT
RE
DE
RO
0
0
≥ -0.05V
1
0
0
≤ -0.2V
0
0
0
Inputs Open/Shorted
1
1
X
High-Z
1
0
X
High-Z*
1
NOTE: *Shutdown Mode
Pin Descriptions
PIN
FUNCTION
RO
Receiver output: If A-B ≥ -50mV, RO is high; If A-B ≤ -200mV, RO is low; RO = High if A and B are unconnected (floating) or shorted, or connected
to a terminated bus that is undriven.
RE
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. If the Rx enable function isn’t required,
connect RE directly to GND.
DE
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high, and they are high impedance when DE is low. If the Tx
enable function isn’t required, connect DE to VCC through a 1kΩ or greater resistor.
DI
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.
GND
Ground connection. This is also the potential of the DFN’s exposed metal pad.
A/Y
±16.5kV IEC61000 ESD protected RS-485/RS-422 level, noninverting receiver input and noninverting driver output. Pin is an input (A) if
DE = 0; pin is an output (Y) if DE = 1. ISL3179E only.
B/Z
±16.5kV IEC61000 ESD protected RS-485/RS-422 level, inverting receiver input and inverting driver output. Pin is an input (B) if DE = 0;
pin is an output (Z) if DE = 1. ISL3179E only.
A
±12kV HBM ESD protected RS-485/RS-422 level, noninverting receiver input. ISL3180E only.
B
±12kV HBM ESD protected RS-485/RS-422 level, inverting receiver input. ISL3180E only.
Y
±12kV HBM ESD protected RS-485/RS-422 level, noninverting driver output. ISL3180E only.
Z
±12kV HBM ESD protected RS-485/RS-422 level, inverting driver output. ISL3180E only.
VCC
System power supply input (3.0V to 3.6V).
NC
No internal connection.
EP
The exposed metal pad on the bottom of the DFN; connect to GND.
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ISL3179E, ISL3180E
Typical Operating Circuits
(SOIC AND MSOP PIN NUMBERS SHOWN)
+3.3V
+3.3V
+
8
0.1µF
0.1µF
+
8
VCC
1 RO
R
D
2 RE
B/Z
A/Y
3 DE
4 DI
VCC
RT
7
RT
6
DI 4
7
B/Z
DE 3
6
A/Y
RE 2
RO 1
R
D
GND
GND
5
5
FIGURE 2. ISL3179E
(PIN NUMBERS FOR SOIC)
+3.3V
+3.3V
+
14
VCC
2 RO
R
A 12
0.1µF
0.1µF
RT
+
14
9 Y
B 11
VCC
D
10 Z
3 RE
DE 4
RE 3
4 DE
5 DI
DI 5
RT
Z 10
Y 9
D
11 B
R
12 A
GND
RO 2
GND
6, 7
6, 7
FIGURE 3. ISL3180E
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ISL3179E, ISL3180E
Absolute Maximum Ratings
Thermal Information
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, DE, RE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input/Output Voltages
A, B, Y, Z, A/Y, B/Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -9V to +13V
RO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V)
Short-circuit Duration
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . see Electrical Specifications table on page 6
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
8 Ld SOIC Package (Note 4) . . . . . . . . . . . .
160
N/A
14 Ld SOIC Package (Note 4) . . . . . . . . . . .
91
N/A
8 Ld MSOP Package (Note 4) . . . . . . . . . . .
132.5
N/A
10 Ld DFN Package (Notes 5, 6) . . . . . . . .
46
3.5
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Operating Conditions
Temperature Range
ISL3179EF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
ISL3179EI, ISL3180EI . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
6. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379
Electrical Specifications
operating temperature range. (Note 7)
PARAMETER
Test Conditions: VCC = 3.0V to 3.6V; Typicals are at VCC = 3.3V, TA = +25°C. Boldface limits apply across the
TEMP
(°C)
MIN
(Note 17)
TYP
MAX
(Note 17)
UNIT
RL = 100Ω (RS-422) (Figure 4A), (Note 16)
Full
2
2.3
-
V
RL = 54Ω (RS-485) (Figure 4A)
Full
1.5
2.1
VCC
V
No Load
Full
-
-
VCC
SYMBOL
TEST CONDITIONS
DC CHARACTERISTICS
Driver Differential VOUT
VOD
Change in Magnitude of Driver
Differential VOUT for
Complementary Output States
Driver Common-mode VOUT
Change in Magnitude of Driver
Common-mode VOUT for
Complementary Output States
RL = 60Ω, -7V ≤VCM ≤12V (Figure 4B), (Note 16)
Full
1.5
2
-
V
VOD
RL = 54Ω or 100Ω (Figure 4A)
Full
-
0.01
0.2
V
VOC
RL = 54Ω or 100Ω (Figure 4A)
Full
-
2
2.5
V
VOC
RL = 54Ω or 100Ω (Figure 4A)
Full
-
0.02
0.2
V
Logic Input High Voltage
VIH
DI, DE, RE
Full
2
-
-
V
Logic Input Low Voltage
VIL
DI, DE, RE
Full
-
-
0.8
V
Logic Input Current
IIN1
DI = DE = RE = 0V or VCC
Full
-2
-
2
µA
Input Current (A, B, A/Y, B/Z)
IIN2
DE = 0V, VCC = 0V or 3.6V
VIN = 12V
Full
-
-
220
µA
VIN = -7V
Full
-160
-
-
µA
Y or Z Output Leakage Current
IOZ
DE = 0V, -7V ≤ VY or VZ ≤ 12V, ISL3180E Only
Full
-40
-
40
µA
DE = VCC, -7V ≤ VY or VZ ≤ 12V (Note 9)
Full
-
-
±250
mA
Driver Short-circuit Current,
VO = High or Low
IOSD1
Receiver Differential Threshold
Voltage
V TH
-7V ≤ VCM ≤ 12V
Full
-200
-
-50
mV
Receiver Input Hysteresis
V TH
VCM = 0V
25
-
28
-
mV
Receiver Output High Voltage
VOH
IO = -12mA, VID = -50mV
Full
VCC - 0.5
-
-
V
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ISL3179E, ISL3180E
Electrical Specifications
Test Conditions: VCC = 3.0V to 3.6V; Typicals are at VCC = 3.3V, TA = +25°C. Boldface limits apply across the
operating temperature range. (Note 7) (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 17)
TYP
MAX
(Note 17)
UNIT
Receiver Output Low Voltage
VOL
IO = +10mA, VID = -200mV
Full
-
-
0.4
V
Receiver Output Low Current
IOL
VOL = 1V, VID = -200mV
Full
25
-
-
mA
Three-state (high impedance)
Receiver Output Current
IOZR
0.4V ≤ VO ≤ 2.4V
Full
-1
0.015
1
µA
Receiver Input Resistance
RIN
-7V ≤ VCM ≤ 12V
Full
54
80
-
kΩ
Receiver Short-circuit Current
IOSR
0V ≤ VO ≤ VCC
Full
±20
-
±110
mA
DI = DE = 0V or VCC
Full
-
2.6
4
mA
DE = 0V, RE = VCC, DI = 0V or VCC
Full
-
0.05
1
µA
IEC61000-4-2, Air-gap Discharge Method
25
-
±16.5
-
kV
SUPPLY CURRENT
No-load Supply Current (Note 8)
ICC
Shutdown Supply Current
ISHDN
ESD PERFORMANCE
RS-485 Pins (A/Y, B/Z)
ISL3179E Only
IEC61000-4-2, Contact Discharge Method
25
-
±9
-
kV
Human Body Model, from bus pins to GND
25
-
±16.5
-
kV
All Pins
ISL3179E Only
Human Body Model, per JEDEC
25
-
>±9
-
kV
Machine Model, per JEDEC
25
-
>±400
-
V
RS-485 Pins (A, B, Y, Z)
ISL3180E Only
IEC61000-4-2, Air-gap Discharge Method
25
-
±4
-
kV
IEC61000-4-2, Contact Discharge Method
25
-
±5
-
kV
Human Body Model, from bus pins to GND
25
-
±12
-
kV
Human Body Model, per JEDEC
25
-
±3
-
kV
Machine Model, per JEDEC
25
-
±150
-
V
All Pins
ISL3180E Only
DRIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
fMAX
VOD ≥ ±1.5V, RD = 54Ω, CL = 100pF (Figure 7)
Full
40
60
-
Mbps
Driver Differential Output Delay
tDD
RD = 54Ω, CD = 50pF (Figure 5)
Full
-
11
16
ns
Prop Delay Part-to-part Skew
tSKP-P
RD = 54Ω, CD = 50pF (Figure 5), (Note 15)
Full
-
-
4
ns
Driver Differential Output Skew
tSKEW
RD = 54Ω, CD = 50pF (Figure 5)
Full
-
0
1.5
ns
Driver Differential Rise or Fall Time
tR, tF
RD = 54Ω, CD = 50pF (Figure 5)
Full
-
4
7
ns
Driver Enable to Output High
tZH
RL = 110Ω, CL = 50pF, SW = GND (Figure 6),
(Note 10)
Full
-
18
25
ns
Driver Enable to Output Low
tZL
RL = 110Ω, CL = 50pF, SW = VCC (Figure 6),
(Note 10)
Full
-
16
25
ns
Driver Disable from Output High
tHZ
RL = 110Ω, CL = 50pF, SW = GND (Figure 6)
Full
-
15
25
ns
Driver Disable from Output Low
tLZ
RL = 110Ω, CL = 50pF, SW = VCC (Figure 6)
Full
-
18
25
ns
(Note 12)
Full
60
-
600
ns
Time to Shutdown
tSHDN
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 110Ω, CL = 50pF, SW = GND (Figure 6),
(Notes 12, 13)
Full
-
-
1000
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 110Ω, CL = 50pF, SW = VCC (Figure 6),
(Notes 12, 13)
Full
-
-
1000
ns
Full
40
60
-
Mbps
Full
-
10
16.5
ns
Full
-
-
4
ns
RECEIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
fMAX
tPLH, tPHL Figure 8
Receiver Input to Output Delay
Prop Delay Part-to-part Skew
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VID = ±1.5V
tSKP-P
6
Figure 8, Note 15
FN6365.5
August 25, 2015
ISL3179E, ISL3180E
Electrical Specifications
Test Conditions: VCC = 3.0V to 3.6V; Typicals are at VCC = 3.3V, TA = +25°C. Boldface limits apply across the
operating temperature range. (Note 7) (Continued)
PARAMETER
TEMP
(°C)
MIN
(Note 17)
TYP
MAX
(Note 17)
UNIT
Figure 8
Full
-
0
1.5
ns
SYMBOL
Receiver Skew | tPLH - tPHL |
tSKD
TEST CONDITIONS
Receiver Enable to Output High
tZH
RL = 1kΩ, CL = 15pF, SW = GND (Figure 9),
(Note 11)
Full
-
10
15
ns
Receiver Enable to Output Low
tZL
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 9),
(Note 11)
Full
-
11
15
ns
Receiver Disable from Output High
tHZ
RL = 1kΩ, CL = 15pF, SW = GND (Figure 9)
Full
-
10
15
ns
Receiver Disable from Output Low
tLZ
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 9)
Full
-
10
15
ns
(Note 12)
Full
60
-
600
ns
Time to Shutdown
tSHDN
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 9),
(Notes 12, 14)
Full
-
-
1000
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 9),
(Notes 12, 14)
Full
-
-
1000
ns
NOTES:
7. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
8. Supply current specification is valid for loaded drivers when DE = 0V.
9. Applies to peak current. See “Typical Performance Curves” on page 9 for more information.
10. Because of the shutdown feature, keep RE = 0 to prevent the device from entering SHDN.
11. Because of the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
12. These IC’s are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not to
enter shutdown. If the inputs are in this state for at least 700ns, the parts are guaranteed to have entered shutdown. See “Low Power Shutdown
Mode” on page 13.
13. Keep RE = VCC, and set the DE signal low time >700ns to ensure that the device enters SHDN.
14. Set the RE signal high time >700ns to ensure that the device enters SHDN.
15. This is the part-to-part skew between any two units tested with identical test conditions (Temperature, VCC, etc.).
16. VCC = 3.3V ±5%
17. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
Test Circuits and Waveforms
VCC
RL/2
DE
DI
VCC
Z
Z
DI
VOD
D
375Ω
DE
VOD
D
Y
Y
RL/2
FIGURE 4A. VOD AND VOC
VOC
RL = 60Ω
VCM
-7V TO +12V
375Ω
FIGURE 4B. VOD WITH COMMON-MODE LOAD
FIGURE 4. DC DRIVER TEST CIRCUITS
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ISL3179E, ISL3180E
Test Circuits and Waveforms (Continued)
3V
DI
1.5V
1.5V
0V
tPHL
tPLH
VCC
DE
Z
DI
RD
D
CD
OUT (Z)
VOH
OUT (Y)
VOL
Y
90%
DIFF OUT (Y - Z)
SIGNAL
GENERATOR
+VOD
90%
10%
10%
tR
-VOD
tF
SKEW = |tPLH - tPHL|
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE
Z
DI
110Ω
VCC
D
SIGNAL
GENERATOR
SW
Y
GND
50pF
3V
DE
(Note 12)
tZH, tZH(SHDN)
(Note 12)
PARAMETER
OUTPUT
RE
DI
SW
tHZ
Y/Z
X
1/0
GND
tLZ
Y/Z
X
0/1
VCC
tZH
Y/Z
0 (Note 10)
1/0
GND
tZL
Y/Z
0 (Note 10)
0/1
VCC
tZH(SHDN)
Y/Z
1 (Note 13)
1/0
GND
tZL(SHDN)
Y/Z
1 (Note 13)
0/1
VCC
1.5V
1.5V
0V
OUTPUT HIGH
tHZ
VOH - 0.5V
50%
OUT (Y, Z)
VOH
0V
tZL, tZL(SHDN)
tLZ
(Note 12)
VCC
OUT (Y, Z)
50%
OUTPUT LOW
VOL + 0.5V V
OL
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6A. TEST CIRCUIT
FIGURE 6. DRIVER ENABLE AND DISABLE TIMES
VCC
DE
+
Z
DI
54Ω
D
CL
VOD
Y
3V
DI
0V
-
SIGNAL
GENERATOR
CL
+VOD
DIFF OUT (Y - Z)
-VOD
FIGURE 7A. TEST CIRCUIT
0V
FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. DRIVER DATA RATE
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8
FN6365.5
August 25, 2015
ISL3179E, ISL3180E
Test Circuits and Waveforms (Continued)
RE
+1.5V
+3V
15pF
B
R
A
A
RO
1.5V
1.5V
0V
tPHL
tPLH
VCC
SIGNAL
GENERATOR
1.7V
RO
1.7V
0V
FIGURE 8A. TEST CIRCUIT
FIGURE 8B. MEASUREMENT POINTS
FIGURE 8. RECEIVER PROPAGATION DELAY
RE
GND
B
A
1kΩ
RO
R
VCC
SW
SIGNAL
GENERATOR
(Note 12)
3V
GND
RE
15pF
1.5V
1.5V
0V
PARAMETER
DE
A
SW
tHZ
0
+1.5V
GND
tLZ
0
-1.5V
VCC
tZH (Note 11)
0
+1.5V
GND
tZL (Note 11)
0
-1.5V
VCC
tZH(SHDN) (Note 14)
0
+1.5V
GND
tZL(SHDN) (Note 14)
0
-1.5V
VCC
tZH, tZH(SHDN)
(Note 12)
OUTPUT HIGH
tHZ
VOH - 0.5V
1.5V
RO
VOH
0V
tZL, tZL(SHDN)
(Note 12)
tLZ
VCC
RO
1.5V
OUTPUT LOW
VOL + 0.5V V
OL
FIGURE 9B. MEASUREMENT POINTS
FIGURE 9A. TEST CIRCUIT
FIGURE 9. RECEIVER ENABLE AND DISABLE TIMES
Typical Performance Curves
VCC = 3.3V, TA = +25°C; Unless Otherwise Specified
90
DRIVER OUTPUT CURRENT (mA)
+85°C
+25°C
RD = 33Ω
70
+125°C
60
50
RD = 54Ω
40
30
RD = 100Ω
20
10
0
0
0.5
1.0
1.5
2.0
2.5
DIFFERENTIAL OUTPUT VOLTAGE (V)
3.0
3.3
FIGURE 10. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT
VOLTAGE
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9
DIFFERENTIAL OUTPUT VOLTAGE (V)
2.40
80
2.35
2.30
RD = 100Ω
2.25
2.20
2.15
2.10
2.05
2.00
RD = 54Ω
1.95
1.90
-40
-15
10
35
60
TEMPERATURE (°C)
85
110
125
FIGURE 11. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
FN6365.5
August 25, 2015
ISL3179E, ISL3180E
Typical Performance Curves
VCC = 3.3V, TA = +25°C; Unless Otherwise Specified (Continued)
2.40
150
Y OR Z = LOW
2.35
100
OUTPUT CURRENT (mA)
DE = VCC, RE = X OR DE = GND, RE = GND
2.30
ICC (mA)
50
0
2.25
2.20
-50
2.15
Y OR Z = HIGH
-100
-7 -6
-4
-2
0
2
4
6
OUTPUT VOLTAGE (V)
8
10
2.10
-40
12
10
35
60
85
110 125
TEMPERATURE (°C)
FIGURE 12. DRIVER OUTPUT CURRENT vs SHORT-CIRCUIT
VOLTAGE
FIGURE 13. SUPPLY CURRENT vs TEMPERATURE
0.25
13.0
|tPLH - tPHL|
12.5
0.20
12.0
PROPAGATION DELAY (ns)
-15
11.0
SKEW (ns)
11.5
tPLH
10.5
tPHL
10.0
0.15
0.10
9.5
0.05
9.0
8.5
-15
10
35
60
85
0
-40
110 125
-15
10
TEMPERATURE (°C)
0
5
RO
0
3
2
1
Y-Z
0
-1
-2
-3
TIME (5ns/DIV)
FIGURE 16. DRIVER AND RECEIVER WAVEFORMS
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RECEIVER OUTPUT (V)
5
DRIVER INPUT (V)
DI
10
60
85
125
110
FIGURE 15. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
FIGURE 14. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE
RDIFF = 54Ω, CD = 50pF
35
TEMPERATURE (°C)
RDIFF = 54Ω, CD = 50pF
DI
5
0
5
RO
0
DRIVER INPUT (V)
8.0
-40
3
2
1
0
-1
Y-Z
-2
-3
TIME (5ns/DIV)
FIGURE 17. DRIVER AND RECEIVER WAVEFORMS
FN6365.5
August 25, 2015
ISL3179E, ISL3180E
0
5.0
RO
0
DRIVER+CABLE DELAY
3.0
DI = 2Mbps
0
5.0
A-B
0
-1.5
-3.0
TIME (10ns/DIV)
RO
0
(~160ns)
1.5
5
3.0
DRIVER+CABLE DELAY
1.5
DRIVER INPUT (V)
5
RECEIVER OUTPUT (V)
DI = 40Mbps
DRIVER INPUT (V)
VCC = 3.3V, TA = +25°C; Unless Otherwise Specified (Continued)
RECEIVER INPUT (V)
RECEIVER INPUT (V)
RECEIVER OUTPUT (V)
Typical Performance Curves
(~720ns)
A-B
0
-1.5
-3.0
TIME (200ns/DIV)
FIGURE 18. DRIVER AND RECEIVER WAVEFORMS DRIVING 100’
(31m) OF CAT5 CABLE (DOUBLE TERMINATED WITH
120Ω)
FIGURE 19. DRIVER AND RECEIVER WAVEFORMS DRIVING 500’
(152m) OF CAT5 CABLE (DOUBLE TERMINATED WITH
120Ω)
RECEIVER OUTPUT CURRENT (mA)
60
VOL +25°C
50
VOH +25°C
VOL +85°C
40
VOL +125°C
VOH +125°C
30
VOH +85°C
20
10
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.3
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 20. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE
Die Characteristics
SUBSTRATE AND DFN THERMAL PAD POTENTIAL
(POWERED UP):
GND
PROCESS:
Si Gate BiCMOS
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FN6365.5
August 25, 2015
ISL3179E, ISL3180E
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a
point-to-multipoint (multidrop) standard, which allows only one
driver and up to 10 (assuming one unit load devices) receivers on
each bus. RS-485 is a true multipoint standard, which allows up
to 32 one unit load devices (any mix of drivers and receivers) on
each bus. To allow for multipoint operation, the RS-485 spec
requires that drivers must handle bus contention without
sustaining any damage.
Another important advantage of RS-485 is the extended
common-mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as long as
4000’ (~1200m), so the wide CMR is necessary to handle ground
potential differences, as well as voltages induced in the cable by
external fields.
Receiver (Rx) Features
This transceiver utilizes a differential input receiver for maximum
noise immunity and common-mode rejection. Input sensitivity is
±200mV, as required by the RS-422 and RS-485 specifications.
Receiver inputs function with common-mode voltages as great
as +9/-7V outside the power supplies
(i.e., +12V and -7V), making them ideal for long networks, or
industrial environments, where induced voltages are a realistic
concern.
The receiver input resistance of 50kΩ surpasses the RS-422
specification of 4kΩ, and is 5x the RS-485 “Unit Load” (UL)
requirement of 12kΩ minimum. Thus, the ISL3179E is known as
a “one-fifth UL” transceiver, and there can be up to 160 devices
on the RS-485 bus while still complying with the RS-485 loading
specification.
The receiver is a “full fail-safe” version that guarantees a high
level receiver output if the receiver inputs are unconnected
(floating), shorted together, or connected to a terminated bus
with all the transmitters disabled (terminated/undriven).
Rx outputs deliver large low state currents (typically 28mA at
VOL = 1V) to ease the design of optically coupled isolated
networks.
Receivers easily meet the 40Mbps data rate supported by the
driver, and the receiver output is tri-statable via the active low RE
input.
Driver (Tx) Features
The RS-485/RS-422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485), and at least 2V
across a 100Ω load (RS-422). The drivers feature low
propagation delay skew to maximize bit width and to minimize
EMI.
Outputs of the drivers are not slew rate limited, so faster output
transition times allow data rates of at least 40Mbps. Driver
outputs are tri-statable via the active high DE input.
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12
For parallel applications, bit-to-bit skews between any two
transmitter and receiver pairs are guaranteed to be no worse
than 8ns (4ns max for any two Tx, 4ns max for any two Rx).
ESD Protection
All pins on the ISL3179E include class 3 (>9kV) Human Body
Model (HBM) ESD protection structures, but the RS-485 pins
(driver outputs and receiver inputs) incorporate advanced
structures allowing them to survive ESD events in excess of
±16.5kV HBM (ISL3179E) or ±12kV HBM (ISL3180E), and
±16.5kV (ISL3179E) or ±4kV (ISL3180E) IEC61000-4-2. The
RS-485 pins are particularly vulnerable to ESD strikes because
they typically connect to an exposed port on the exterior of the
finished product. Simply touching the port pins, or connecting a
cable, can cause an ESD event that might destroy unprotected
ICs. These new ESD structures protect the device whether or not
it is powered up, and without degrading the RS-485 commonmode range of -7V to +12V. This built-in ESD protection
eliminates the need for board level protection structures (e.g.,
transient suppression diodes) and the associated, undesirable
capacitive load they present.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment, rather
than to an individual IC. Therefore, the pins most likely to suffer
an ESD event are those that are exposed to the outside world (the
RS-485 pins in this case), and the IC is tested in its typical
application configuration (power applied) rather than testing
each pin-to-pin combination. The IEC61000 standard’s lower
current limiting resistor coupled with the larger charge storage
capacitor yields a test that is much more severe than the HBM
test. The extra ESD protection built into the ISL3179E’s RS-485
pins allows the design of equipment meeting level 4 criteria
without the need for additional board level protection on the
RS-485 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the IC pin
until the voltage arcs to it. The current waveform delivered to the
IC pin depends on approach speed, humidity, temperature, etc.,
so it is more difficult to obtain repeatable results. The ISL3179E
RS-485 pins withstand ±16.5kV air-gap discharges, while the
ISL3180E’s RS-485 pins withstand ±4kV.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the tested
pin before the probe tip is energized, thereby eliminating the
variables associated with the air-gap discharge. The result is a
more repeatable and predictable test, but equipment limits
prevent testing devices at voltages higher than ±9kV. The RS-485
pins of the ISL3179E survive ±9kV contact discharges, while the
ISL3180E’s RS-485 pins withstand ±5kV.
Hot Plug Function
When a piece of equipment powers up, there is a period of time
where the processor or ASIC driving the RS-485 control lines (DE,
RE) is unable to ensure that the RS-485 Tx and Rx outputs are
kept disabled. If the equipment is connected to the bus, a driver
activating prematurely during power-up may crash the bus. To
avoid this scenario, the ISL3179E and ISL3180E incorporate a
FN6365.5
August 25, 2015
ISL3179E, ISL3180E
DE, DI = VCC
RE = GND
2.5V
2.3V
2
VCC
0
4
RL = 1kΩ
2
0
A/Y
ISL3179E
RL = 1kΩ
RO
ISL3179E
4
2
0
RECEIVER OUTPUT (V)
DRIVER Y OUTPUT (V)
4
VCC (V)
“hot plug” function. Circuitry monitoring VCC ensures that, during
power-up and power-down, the Tx and Rx outputs remain disabled,
regardless of the state of DE and RE, if VCC is less than ~2.4V. This
gives the processor/ASIC a chance to stabilize and drive the RS-485
control lines to the proper states.
TIME (40µs/DIV)
FIGURE 21. HOT PLUG PERFORMANCE (ISL3179E) vs ISL83485
WITHOUT HOT PLUG CIRCUITRY
Data Rate, Cables, and Terminations
RS-485/RS-422 are intended for network lengths up to 4000’,
but the maximum system data rate decreases as the
transmission length increases. Devices operating at 40Mbps are
limited to lengths less than 100’.
Twisted pair is the cable of choice for RS-485/RS-422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common-mode signals,
which are effectively rejected by the differential receiver in this IC.
Built-in Driver Overload Protection
As stated previously, the RS-485 specification requires that
drivers survive worst case bus contentions undamaged. These
transmitters meet this requirement via driver output short circuit
current limits, and on-chip thermal shutdown circuitry.
The driver output stages incorporate short-circuit current limiting
circuitry, which ensures that the output current never exceeds the
RS-485 specification, even at the common-mode voltage range
extremes. In the event of a major short-circuit condition, the device
also includes a thermal shutdown feature that disables the drivers
whenever the die temperature becomes excessive. This eliminates
the power dissipation, allowing the die to cool. The drivers
automatically reenable after the die temperature drops about
+15°C. If the contention persists, the thermal shutdown/reenable
cycle repeats until the fault is cleared. Receivers stay operational
during thermal shutdown.
Low Power Shutdown Mode
This BiCMOS transceiver uses a fraction of the power required by
their bipolar counterparts, but it also includes a shutdown
feature that reduces the already low quiescent ICC to a 50nA
trickle. It enters shutdown whenever the receiver and driver are
simultaneously disabled (RE = VCC and DE = GND) for a period of
at least 600ns. Disabling both the driver and the receiver for less
than 60ns guarantees that the transceiver will not enter
shutdown.
Note that receiver and driver enable times increase when the
transceiver enables from shutdown. Refer to Notes 10, 11, 12,
13 and 14, at the end of the “Electrical Specifications” table on
page 7, for more information.
Proper termination is imperative to minimize reflections. In pointto-point, or point-to-multipoint (single driver on bus) networks,
the main cable should be terminated in its characteristic
impedance (typically 120Ω) at the end farthest from the driver. In
multireceiver applications, stubs connecting receivers to the
main cable should be kept as short as possible. Multipoint
(multidriver) systems require that the main cable be terminated
in its characteristic impedance at both ends. Stubs connecting a
transceiver to the main cable should be kept as short as possible.
The ISL3179E and ISL3180E may also be used at slower data
rates over longer cables, but there are some limitations. The Rx is
optimized for high speed operation, so its output may glitch if the
Rx input differential transition times are too slow. Keeping the
transition times below 500ns, which equates to the Tx driving a
1000’ (305m) CAT 5 cable, yields excellent performance over the
full operating temperature range.
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13
FN6365.5
August 25, 2015
ISL3179E, ISL3180E
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE
REVISION
CHANGE
August 25, 2015
FN6365.5
Added Key Differences table to page 1.
July 8, 2015
FN6365.4
Reformatted datasheet to newest template and standards.
Features, page 1 - Changed: “- Class 3 HBM Level on all Other Pins.....>9kV” to: “- Class 3 HBM level on all other
pins (ISL3179E).....>9kV”
Pin Description on page 3 - Added row for EP pin and added to description of GND.
Elec Spec table, page 6 ESD Performance section:
Added “ISL3179E Only” to All Pins and changed Test Conditions for HBM and Machine Model to “per JEDEC”.
- Added 2 rows for “All Pins, ISL3180E Only”
Updated note references on Figures 6B and 9B.
Die Characteristics section on page 11: removed Transistor Count
ESD Protection on page 12 - removed “and ISL3180E” from 1st sentence.
Added Revision History table and About Intersil section.
Updated POD L10.3x3C on page 16 from rev 2 to rev 4. Changes since rev 2:
- Removed package outline and included center to center distance between lands on recommended land
pattern.
- Removed Note 4 "Dimension b applies to the metallized terminal and is measured between 0.18mm and
0.30mm from the terminal tip." since it is not applicable to this package. Renumbered notes accordingly.
- Tiebar Note 4 updated
From: Tiebar shown (if present) is a non-functional feature.
To: Tiebar shown (if present) is a non-functional feature and may be located on any of the 4 sides (or ends).
Updated POD M8.15 on page 17 from rev 3 to rev 4. Changes since rev 3:
- Changed Note 1 "1982" to "1994"
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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14
FN6365.5
August 25, 2015
ISL3179E, ISL3180E
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 7/11
5
3.0±0.05
A
DETAIL "X"
D
8
1.10 MAX
SIDE VIEW 2
0.09 - 0.20
4.9±0.15
3.0±0.05
5
0.95 REF
PIN# 1 ID
1
2
B
0.65 BSC
GAUGE
PLANE
TOP VIEW
0.55 ± 0.15
0.25
3°±3°
0.85±010
H
DETAIL "X"
C
SEATING PLANE
0.25 - 0.36
0.08 M C A-B D
0.10 ± 0.05
0.10 C
SIDE VIEW 1
(5.80)
NOTES:
(4.40)
(3.00)
1. Dimensions are in millimeters.
(0.65)
(0.40)
(1.40)
TYPICAL RECOMMENDED LAND PATTERN
Submit Document Feedback
15
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
FN6365.5
August 25, 2015
ISL3179E, ISL3180E
Package Outline Drawing
L10.3x3C
10 LEAD DUAL FLAT PACKAGE (DFN)
Rev 4, 3/15
3.00
5
PIN #1 INDEX AREA
A
B
10
5
PIN 1
INDEX AREA
1
2.38
3.00
0.50
2
10 x 0.25
6
(4X)
0.10 C B
1.64
TOP VIEW
10x 0.40
BOTTOM VIEW
(4X)
0.10 M C B
SEE DETAIL "X"
(10 x 0.60)
(10x 0.25)
0.90
MAX
0.10 C
BASE PLANE
2.38
0.20
C
SEATING PLANE
0.08 C
SIDE VIEW
(8x 0.50)
1.64
2.80 TYP
C
TYPICAL RECOMMENDED LAND PATTERN
0.20 REF
4
0.05
DETAIL "X"
NOTES:
Submit Document Feedback
16
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Tiebar shown (if present) is a non-functional feature and may be
located on any of the 4 sides (or ends).
5.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
6.
Compliant to JEDEC MO-229-WEED-3 except for E-PAD
dimensions.
FN6365.5
August 25, 2015
ISL3179E, ISL3180E
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 1/12
DETAIL "A"
1.27 (0.050)
0.40 (0.016)
INDEX
6.20 (0.244)
5.80 (0.228)
AREA
0.50 (0.20)
x 45°
0.25 (0.01)
4.00 (0.157)
3.80 (0.150)
1
2
8°
0°
3
0.25 (0.010)
0.19 (0.008)
SIDE VIEW “B”
TOP VIEW
2.20 (0.087)
SEATING PLANE
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
1
8
2
7
0.60 (0.023)
1.27 (0.050)
3
6
4
5
-C-
1.27 (0.050)
0.51(0.020)
0.33(0.013)
SIDE VIEW “A
0.25(0.010)
0.10(0.004)
5.20(0.205)
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1994.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the
seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
Submit Document Feedback
17
FN6365.5
August 25, 2015
ISL3179E, ISL3180E
Package Outline Drawing
M14.15
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 10/09
8.65
A 3
4
0.10 C A-B 2X
6
14
DETAIL"A"
8
0.22±0.03
D
6.0
3.9
4
0.10 C D 2X
0.20 C 2X
7
PIN NO.1
ID MARK
5
0.31-0.51
B 3
(0.35) x 45°
4° ± 4°
6
0.25 M C A-B D
TOP VIEW
0.10 C
1.75 MAX
H
1.25 MIN
0.25
GAUGE PLANE C
SEATING PLANE
0.10 C
0.10-0.25
1.27
SIDE VIEW
(1.27)
DETAIL "A"
(0.6)
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSEY14.5m-1994.
3. Datums A and B to be determined at Datum H.
(5.40)
4. Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5. The pin #1 indentifier may be either a mold or mark feature.
(1.50)
6. Does not include dambar protrusion. Allowable dambar protrusion
shall be 0.10mm total in excess of lead width at maximum condition.
7. Reference to JEDEC MS-012-AB.
TYPICAL RECOMMENDED LAND PATTERN
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18
FN6365.5
August 25, 2015
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