74HC2GU04-Q100
Dual unbuffered inverter
Rev. 2 — 17 September 2014
Product data sheet
1. General description
The 74HC2GU04-Q100 is a high-speed Si-gate CMOS device.
The 74HC2GU04-Q100 provides two unbuffered inverters.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Wide supply voltage range from 2.0 V to 6.0 V
Complies with JEDEC standard no. 7A
High noise immunity
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Low power dissipation
Balanced propagation delays
Multiple package options
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74HC2GU04GW-Q100
40 C to +125 C
SC-88
plastic surface-mounted package; 6 leads
SOT363
74HC2GU04GV-Q100
40 C to +125 C
SC-74
plastic surface-mounted package (TSOP6); 6 leads
SOT457
74HC2GU04-Q100
NXP Semiconductors
Dual unbuffered inverter
4. Marking
Table 2.
Marking
Type number
Marking code
74HC2GU04GW-Q100
PD
74HC2GU04GV-Q100
HU4
5. Functional diagram
$
<
$
<
$
PQE
PQE
Fig 1.
Logic symbol
Fig 2.
<
PQD
IEC logic symbol
Fig 3.
Logic diagram (one gate)
6. Pinning information
6.1 Pinning
+&*84
$
<
*1'
9&&
$
<
DDD
Fig 4.
Pin configuration
6.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
1A
1
data input
GND
2
ground (0 V)
2A
3
data input
2Y
4
data output
VCC
5
supply voltage
1Y
6
data output
74HC2GU04-Q100
Product data sheet
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Rev. 2 — 17 September 2014
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74HC2GU04-Q100
NXP Semiconductors
Dual unbuffered inverter
7. Functional description
Table 4.
Function table[1]
Input
Output
nA
nY
L
H
H
L
[1]
H = HIGH voltage level;
L = LOW voltage level.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
0.5
+7.0
V
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
[1]
-
20
mA
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
[1]
-
20
mA
IO
output current
VO = 0.5 V to VCC + 0.5 V
[1]
-
25
mA
supply current
[1]
-
+50
mA
IGND
ground current
[1]
-
50
mA
Tstg
storage temperature
65
+150
C
Ptot
total power dissipation
-
250
mW
IIK
ICC
[2]
[1]
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
For SC-88 and SC-74 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCC
supply voltage
2.0
5.0
6.0
V
VI
input voltage
0
-
VCC
V
VO
output voltage
0
-
VCC
V
Tamb
ambient temperature
40
+25
+125
C
tr
rise time
VCC = 2.0 V
-
-
1000
ns
VCC = 4.5 V
-
-
500
ns
VCC = 6.0 V
-
-
400
ns
VCC = 2.0 V
-
-
1000
ns
VCC = 4.5 V
-
-
500
ns
VCC = 6.0 V
-
-
400
ns
tf
fall time
74HC2GU04-Q100
Product data sheet
except for Schmitt trigger inputs
except for Schmitt trigger inputs
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Rev. 2 — 17 September 2014
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74HC2GU04-Q100
NXP Semiconductors
Dual unbuffered inverter
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
HIGH-level input voltage
VCC = 2.0 V
1.7
1.1
-
V
VCC = 4.5 V
3.6
2.4
-
V
VCC = 6.0 V
4.8
3.1
-
V
VCC = 2.0 V
-
0.9
0.3
V
VCC = 4.5 V
-
2.1
0.9
V
VCC = 6.0 V
-
2.9
1.2
V
IO = 20 A; VCC = 2.0 V
1.9
2.0
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
V
IO = 20 A; VCC = 6.0 V
5.9
6.0
-
V
IO = 4.0 mA; VCC = 4.5 V
4.13
4.32
-
V
IO = 5.2 mA; VCC = 6.0 V
5.63
5.81
-
V
IO = 20 A; VCC = 2.0 V
-
0
0.1
V
IO = 20 A; VCC = 4.5 V
-
0
0.1
V
IO = 20 A; VCC = 6.0 V
-
0
0.1
V
IO = 4.0 mA; VCC = 4.5 V
-
0.15
0.26
V
IO = 5.2 mA; VCC = 6.0 V
-
0.16
0.26
V
Tamb = 25 C
VIH
VIL
VOH
VOL
LOW-level input voltage
HIGH-level output voltage
LOW-level output voltage
VI = VIH or VIL
VI = VIH or VIL
II
input leakage current
VI = GND or VCC; VCC = 6.0 V
-
-
0.1
A
ICC
supply current
VI = GND or VCC; IO = 0 A;
-
-
1.0
A
-
3.0
-
pF
VCC = 2.0 V
1.7
1.1
-
V
VCC = 4.5 V
3.6
2.4
-
V
VCC = 6.0 V
4.8
3.1
-
V
VCC = 2.0 V
-
0.9
0.3
V
VCC = 4.5 V
-
2.1
0.9
V
VCC = 6.0 V
-
2.9
1.2
V
IO = 20 A; VCC = 2.0 V
1.9
2.0
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
V
IO = 20 A; VCC = 6.0 V
5.9
6.0
-
V
IO = 4.0 mA; VCC = 4.5 V
4.13
4.32
-
V
IO = 5.2 mA; VCC = 6.0 V
5.63
5.81
-
V
VCC = 6.0 V
CI
input capacitance
Tamb = 40 C to +85 C
VIH
VIL
VOH
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
74HC2GU04-Q100
Product data sheet
VI = VIH or VIL
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NXP Semiconductors
Dual unbuffered inverter
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
-
0
0.1
V
IO = 20 A; VCC = 4.5 V
-
0
0.1
V
IO = 20 A; VCC = 6.0 V
-
0
0.1
V
IO = 4.0 mA; VCC = 4.5 V
-
0.15
0.33
V
IO = 5.2 mA; VCC = 6.0 V
-
0.16
0.33
V
II
input leakage current
VI = GND or VCC; VCC = 6.0 V
-
-
1.0
A
ICC
supply current
VI = GND or VCC; IO = 0 A;
-
-
10.0
A
VCC = 2.0 V
1.7
-
-
V
VCC = 4.5 V
3.6
-
-
V
VCC = 6.0 V
4.8
-
-
V
VCC = 2.0 V
-
-
0.3
V
VCC = 4.5 V
-
-
0.9
V
VCC = 6.0 V
-
-
1.2
V
IO = 20 A; VCC = 2.0 V
1.9
-
-
V
IO = 20 A; VCC = 4.5 V
4.4
-
-
V
IO = 20 A; VCC = 6.0 V
5.9
-
-
V
IO = 4.0 mA; VCC = 4.5 V
3.7
-
-
V
IO = 5.2 mA; VCC = 6.0 V
5.2
-
-
V
IO = 20 A; VCC = 2.0 V
-
-
0.1
V
IO = 20 A; VCC = 4.5 V
-
-
0.1
V
IO = 20 A; VCC = 6.0 V
-
-
0.1
V
IO = 4.0 mA; VCC = 4.5 V
-
-
0.4
V
IO = 5.2 mA; VCC = 6.0 V
-
-
0.4
V
VCC = 6.0 V
Tamb = 40 C to +125 C
VIH
VIL
VOH
VOL
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
LOW-level output voltage
VI = VIH or VIL
VI = VIH or VIL
II
input leakage current
VI = GND or VCC; VCC = 6.0 V
-
-
1.0
A
ICC
supply current
VI = GND or VCC; IO = 0 A;
-
-
20.0
A
VCC = 6.0 V
74HC2GU04-Q100
Product data sheet
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Rev. 2 — 17 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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74HC2GU04-Q100
NXP Semiconductors
Dual unbuffered inverter
11. Dynamic characteristics
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 6.
Symbol
Parameter
25 C
Conditions
40 C to +125 C
Min Typ Max Min
propagation delay
tpd
nA to nY; see Figure 5
VCC = 2.0 V; CL = 50 pF
-
13
60
-
75
90
ns
VCC = 4.5 V; CL = 50 pF
-
6
12
-
15
18
ns
-
5
10
-
13
15
ns
VCC = 2.0 V; CL = 50 pF
-
18
75
-
95
125
ns
VCC = 4.5 V; CL = 50 pF
-
6
15
-
19
25
ns
-
5
13
-
16
20
ns
-
5
-
-
-
-
pF
[2]
nY; see Figure 5
VCC = 6.0 V; CL = 50 pF
power dissipation capacitance VI = GND to VCC
CPD
[1]
tpd is the same as tPLH and tPHL
[2]
tt is the same as tTLH and tTHL
[3]
Max
(125 C)
[1]
VCC = 6.0 V; CL = 50 pF
transition time
tt
Max
(85 C)
Unit
[3]
CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of the outputs.
12. Waveforms
9,
Q$LQSXW
90
90
*1'
W 3+/
W 3/+
92+
Q<RXWSXW
90
90
92/
W 7+/
W 7/+
PQD
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5.
The data input (nA) to output (nY) propagation delays and output transition times
74HC2GU04-Q100
Product data sheet
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Rev. 2 — 17 September 2014
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NXP Semiconductors
Dual unbuffered inverter
Table 9.
Measurement points
Input
Output
VM
VI
tr = tf
VM
0.5VCC
GND to VCC
6.0 ns
0.5VCC
9&&
9&&
9,
38/6(
*(1(5$725
92
5/ Nȍ
RSHQ
'87
57
&/
S)
PJN
Test data is given in Table 10.
Definitions test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 6.
Test circuit for measuring switching times
Table 10.
Test data
Input
Test
VI
tr, tf
tPHL, tPLH
GND to VCC
6 ns
open
13. Additional characteristics
5ELDV Nȍ
9&&
)
LQSXW
RXWSXW
)
9,
I N+]
$ ,2
*1'
PQD
I
g fs = --------o
V i
VO is constant.
Fig 7.
Test set-up for measuring forward transconductance
74HC2GU04-Q100
Product data sheet
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Rev. 2 — 17 September 2014
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74HC2GU04-Q100
NXP Semiconductors
Dual unbuffered inverter
PQE
JIV
P$9
9&&9 Tamb = 25 C.
Fig 8.
Typical forward transconductance as a function of supply voltage
14. Typical transfer characteristics
PQE
,&& $
92
9
9,9 VCC = 2.0 V; IO = 0 A.
Fig 9.
PQE
, && P$
Product data sheet
9
9
,
VCC = 4.5 V; IO = 0 A.
Typical transfer characteristics VCC = 2.0 V
74HC2GU04-Q100
92 9
Fig 10. Typical transfer characteristics VCC = 4.5 V
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Rev. 2 — 17 September 2014
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74HC2GU04-Q100
NXP Semiconductors
Dual unbuffered inverter
PQE
, &&
P$
9 2
9
9,9
VCC = 6.0 V; IO = 0 A.
Fig 11. Typical transfer characteristics VCC = 6.0 V
15. Application information
Some applications for the 74HC2GU04-Q100 are:
• Linear amplifier (see Figure 12)
• Crystal oscillator (see Figure 13).
Remark: All values given are typical values unless otherwise specified.
5
9&&
)
5
8
=/
PQD
ZL > 10 k.
R1 3 k.
R2 1 M.
Open loop amplification: AOL = 20.
A OL
Voltage amplification: A V = – ----------------------------------------- .
R1
1 + ------- 1 + AOL
R2
Vo(p-p) = VCC 1.5 V centered at 0.5 VCC.
Unity gain bandwidth product is 5 MHz.
Fig 12. Linear amplifier application
74HC2GU04-Q100
Product data sheet
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Rev. 2 — 17 September 2014
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74HC2GU04-Q100
NXP Semiconductors
Dual unbuffered inverter
5
5
8
&
&
RXW
PQD
Test data is given in Table 11 and Table 12.
C1 = 47 pF.
C2 = 22 pF.
R1 = 1 M to 10 M.
R2 optimum value depends on the frequency and required stability against changes in VCC or average minimum ICC
(ICC = 2 mA at VCC = 3.0 V and f = 1 MHz).
Fig 13. Crystal oscillator application
Table 11.
External components for resonator (f < 1 MHz)
Frequency
R1
R2
C1
C2
10 kHz to 15.9 kHz
2.2 M
220 k
56 pF
20 pF
16 kHz to 24.9 kHz
2.2 M
220 k
56 pF
10 pF
25 kHz to 54.9 kHz
2.2 M
100 k
56 pF
10 pF
55 kHz to 129.9 kHz
2.2 M
100 k
47 pF
5 pF
130 kHz to 199.9 kHz
2.2 M
47 k
47 pF
5 pF
200 kHz to 349.9 kHz
2.2 M
47 k
47 pF
5 pF
350 kHz to 600 kHz
2.2 M
47 k
47 pF
5 pF
Table 12.
Optimum value for R2
Frequency
3 kHz
6 kHz
10 kHz
14 kHz
> 14 kHz
74HC2GU04-Q100
Product data sheet
R2
Optimum
2.0 k
for minimum required ICC
8.0 k
for minimum influence due to change in VCC
1.0 k
or minimum required ICC
4.7 k
or minimum influence by VCC
0.5 k
or minimum required ICC
2.0 k
or minimum influence by VCC
0.5 k
or minimum required ICC
2.0 k
or minimum influence by VCC
replace R2 by C3 = 35 pF (typical)
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 17 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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74HC2GU04-Q100
NXP Semiconductors
Dual unbuffered inverter
16. Package outline
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Fig 14. Package outline SOT363 (SC-88)
74HC2GU04-Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 17 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
11 of 16
74HC2GU04-Q100
NXP Semiconductors
Dual unbuffered inverter
3ODVWLFVXUIDFHPRXQWHGSDFNDJH7623OHDGV
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Fig 15. Package outline SOT457 (SC-74)
74HC2GU04-Q100
Product data sheet
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Rev. 2 — 17 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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Dual unbuffered inverter
17. Abbreviations
Table 13.
Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
ESD
ElectroStatic Discharge
HBM
Human Body Model
MIL
Military
MM
Machine Model
DUT
Device Under Test
18. Revision history
Table 14.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74HC2GU04_Q100 v.2
20140917
Product data sheet
-
74HC2GU04_Q100 v.1
Modifications:
74HC2GU04_Q100 v.1
74HC2GU04-Q100
Product data sheet
•
Section 1: Q100 automotive statement added in the general description.
20140825
Product data sheet
-
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 17 September 2014
-
© NXP Semiconductors N.V. 2014. All rights reserved.
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NXP Semiconductors
Dual unbuffered inverter
19. Legal information
19.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
19.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC2GU04-Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 17 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
14 of 16
74HC2GU04-Q100
NXP Semiconductors
Dual unbuffered inverter
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
20. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74HC2GU04-Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 17 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
15 of 16
NXP Semiconductors
74HC2GU04-Q100
Dual unbuffered inverter
21. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
12
13
14
15
16
17
18
19
19.1
19.2
19.3
19.4
20
21
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 3
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Additional characteristics . . . . . . . . . . . . . . . . . 7
Typical transfer characteristics . . . . . . . . . . . . 8
Application information. . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2014.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 17 September 2014
Document identifier: 74HC2GU04-Q100