DC2459A - Schematic

5
4
3
2
1
REVISION HISTORY
SPI_MISO
SET LINDUINO TO EXTERNAL
+3.3V
J2
SPI_CS
SPI_CLK
SPI_MOSI
SPI_MISO
10
9
11
12
14
1
2
3
4
5
6
7
8
9
10
GPIO
R27
10k
HD1X10-100
168
166
13
8
3
D14
TRIG
D5
GPIO +3.3V
SPI_CS
SPI_CLK
SPI_MOSI
SPI_MISO
GPIO_00
GPIO_01
GPIO_03
GPIO_05
GPIO_07
GND
GPIO_09
GPIO_011
GPIO_013
GPIO_015
GPIO_017
GPIO_019
GPIO_021
GPIO_023
GND
GPIO_025
GPIO_027
GPIO_029
GPIO_031
GPIO_033
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
100
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
68
66
64
62
60
58
56
54
52
50
48
46
44
42
D15
D13
D12
D11
D10
D9
D8
D7
D6
D4
D3
D2
D1
D0
12V
CLKIN1N
CLKIN1P
12V
LVDS_RXN7
LVDS_RXP7
12V
LVDS_RXN6
LVDS_RXP6
12V
LVDS_RXN5
LVDS_RXP5
12V
LVDS_RXN4
LVDS_RXP4
12V
LVDS_RXN3
LVDS_RXP3
12V
LVDS_RXN2
LVDS_RXP2
12V
LVDS_RXN1
LVDS_RXP1
12V
LVDS_RXN0
LVDS_RXP0
12V
D3
D1
TRIG
GPIO
SPI_CS
SPI_CLK
SPI_MOSI
SPI_MISO
+3.3V
3V3
CLKOUT1N
CLKOUT1P
3V3
LVDS_TXN7
LVDS_TXP7
3V3
LVDS_TXN6
LVDS_TXP6
3V3
LVDS_TXN5
LVDS_TXP5
3V3
LVDS_TXN4
LVDS_TXP4
3V3
LVDS_TXN3
LVDS_TXP3
3V3
LVDS_TXN2
LVDS_TXP2
3V3
LVDS_TXN1
LVDS_TXP1
3V3
LVDS_TXN0
LVDS_TXP0
3V3
D2
D0
36
34
32
30
28
26
24
22
20
18
16
14
12
10
4
2
ASSEMBLY TABLE:
A
B
C
C4
OPT 0.1uF
OPT OPT
20pF 0.1uF
5
62pF
OPT
OPT
E7 OPT
-5V
+5V
V-OPAMP
1
D
-5V
JP2
HD1X3-079
SEE NOTE 3 FOR SHUNT LOCATIONS
-5V
REFOUT
U1
LTC1668
99
97
95
93
91
89
87
85
83
81
79
77
75
73
71
69
67
65
63
61
59
57
55
53
51
49
47
45
43
41
D0
D1
16
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
CLK
20
R24
49.9
C11
0.1uF
COMP1
COMP2
+5V
25
23
C5
0.1uF
R17
[1]
2
OUT
GND
VCC
EOH
R13
[1]
-5V
C10
[1]
SNGL_OUT
R11
[1]
4
IOUTA
C3
0.1uF
OPT
[1]
3
2
+OPAMP
C1
[1]
R3
[1]
VMID
7
VOCM
2
1
R4
[1]
R21
[1]
GND
C15
[1]
+
6
-
C17
[1]
R25
[1]
J6
OUT+
BNC
OUT+
-OPAMP
U2
[1]
IN+
V+
VMID
OUT+
VOCM
OUT-
V-
IN-
VOCM
VMID
E9
+OPAMP
8
C
C13
[1]
U4
R1
[1]
R2
[1]
R12
[1]
R14
[1]
-OPAMP
C16
OPT
+3.3V
1
6
-
R16
[1]
0805
R18
[1]
C7
0.1uF
17
24
+
VREF
IOUTB
3
3
R15
[1]
-5V
BNC
[1]
IOUTB
21
22
+OPAMP C6
[1]
2
C9
OPT
C12
1uF
18
Y1 OPT
CB3LV
U3
IOUTA
19
AGND
DGND
R8
[1]
0805
R9
[1]
C8
[1]
C14
0.1uF
15
REFOUT
DB15(MSB)
DB14
IOUTA
DB13
DB12
IOUTB
DB11
DB10
DB9
LADCOM
DB8
DB7
DB6
COMP1
DB5
COMP2
DB4
DB3
DB2
VDD
DB1
DB0(LSB)
VSS
26
50M_CLK
D14
D15
IREFIN
27
28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GND
GND
GND
GND
CLKIN0
JTAG_TDI
CLKOUT0
JTAG_TDO
JTAG_TMS
SCL
XCVR_RXN0
XCVR_RXPO
XCVR_RXN1
XCVR_RXP1
JTAG_TCK
SDA
XCVR_TXN0
XCVR_TXP0
XCVR_TXN1
XCVR_TXP1
XCVR_RXN2
XCVR_RXP2
XCVR_TXN2
XCVR_TXP2
XCVR_RXN3
XCVR_RXP3
XCVR_TXN3
XCVR_TXP3
XCVR_RXN4
XCVR_RXP4
XCVR_TXN4
XCVR_TXP4
XCVR_RXN5
XCVR_RXP5
XCVR_RXN6
XCVR_RXP6
XCVR_TXN5
XCVR_TXP5
XCVR_TXN6
XCVR_TXP6
XCVR_RXN7
XCVR_RXP7
XCVR_TXN7
XCVR_TXP7
163
161
R5
[1]
4
J7
5
[1]
OUT-
OUT-
C2
[1]
B
C15,C17,
C18
OPT
OPT
OPT
OPT
47pF 0.1uF
C13
C19
J7
OPT
OPT
10uF
OPT
BNC
OPT
C29
[1]
R6
[1]
U5
27
25
19
17
11
9
[1]
7
5
ASSY
A
B
C
3
1
OPT
0
OPT
OPT
1k
OPT
GND
VOUT_F
VOUT_S
GND
C19
[1]
2. ALL RESISTORS ARE IN OHMS, 0603.
ALL CAPACITORS ARE IN MICROFARADS, 0603.
3. INSTALL SHUNTS ON JP1 AND JP2 AS BELOW:
a. FOR DC2459A-A/B: ON -5V AND +5V (PINS 1 AND 2).
b. FOR DC2459A-C: ON V- AND V+ (PINS 2 AND 3).
NOTES: UNLESS OTHERWISE SPECIFIED
15
13
OPT 52.3
1.58k 52.3
OPT OPT
SHDN
VIN
GND
GND
VREF
8
7
6
5
OPTIONAL CIRCUITS
23
21
R6
1
2
3
4
C18
[1]
31
29
R5
[1]
V+
35
33
R1,R3 R2,R4
4
C28
[1]
39
37
BANK 1
C6,C10 C8
C27
10uF
+OPAMP
JP1
HD1X3-079
R10
[1]
50M_CLK
GND
40
38
A
C1,C2,
C28,C29
OPT
0.1uF
OPT
+5V
7
-OPAMP
3
V2
V+
3
2
1
V+
VREF
R20
[1]
IREIN
J5
GND
GND
IO_L35N_GCLK16_0
50M_CLK
IO_L34N_GCLK18_0
D15
IO_L4N_0
D14
IO_L3N_0
D13
IO_L2N_0
D12
IO_L83N_VREF_3
D11
IO_L52N_3
D10
IO_L51N_3
D9
IO_L50N_3
D8
IO_L49N_3
D7
IO_L44N_GCLK20_3
D6
IO_L43N_GCLK22_IRDY2_3
D5
IO_L42N_GCLK24_3
D4
IO_L41N_GCLK26_3
D3
IO_L37N_3
D2
IO_L36N_3
D1
IO_L2N_3
D0
IO_L1N_VREF_3
GND
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
GND
6
-OPAMP
164
162
8
6
ASSY
R19
[1]
ASP-122952-01
HD2X20-100
[1]
VREF
VREF
P1A
49
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
OUTN
+OPAMP
E6 OPT
5
167
165
R29
OPT
R28
OPT
MIMAS/MOJO SPARTAN 6
VCCIO
IO_L35P_GCLK17_0
IO_L34P_GCLK19_0
IO_L4P_0
IO_L3P_0
IO_L2P_0
IO_L83P_3
IO_L52P_3
IO_L51P_3
IO_L50P_3
IO_L49P_3
IO_L44P_GCLK21_3
IO_L43P_GCLK23_3
IO_L42P_GCLK25_TRDY2_3
IO_L41P_GCLK27_3
IO_L37P_3
IO_L36P_3
IO_L2P_3
IO_L1P_3
VCCIO
INN
3
15
4
C23
10uF
C4
[1]
BANK 2
J4
+3.3V
GND
C22
0.01uF
R7
[1]
E8
GND
GND
GND
50
GND
GND
GND
GND
GND
B
C25
10uF
INN
EP2
ADJN/NC++
02-22-16
-5V
HD2X20-100-SOCKET
JP3
SHDNN
9
16
8
DATE
NOE Q.
+5V
2
C26
0.01uF
P1B
DEO_NANO
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
C24
10uF
BYPP
EP1
GND
BYPN
10
E4
NC+/ADJP
SHDNP
11
V-
ASP-122952-01
J3
GPIO_0IN0
GPIO_0IN1
GPIO_02
GPIO_04
GPIO_06
VCC_SYS
GPIO_08
GPIO_010
GPIO_012
GPIO_014
GPIO_016
GPIO_018
GPIO_020
GPIO_022
VCC3P3
GPIO_024
GPIO_026
GPIO_028
GPIO_030
GPIO_032
12
NC
E5 OPT
1
BANK 3
C
50M_CLK
V-
E3
13
C21
10uF
OUTP
APPROVED
PRODUCTION
4
6
4
7
5
GND
GND
GND
EEVCC
EESDA
EESCL
EEGND
AUX
R26
10k
GND
50M_CLK
C20
10uF
INP
DESCRIPTION
2
7
CS
SCK/SCL
MOSI/SDA
MISO
1
2
R23
OPT
14
4
V+
5V
159
157
155
153
151
149
147
145
143
141
139
137
135
133
131
129
127
125
123
121
119
117
115
113
111
109
107
105
103
101
E2
3
J1
HD2X7-079-MOLEX
V+
REV
__
+5V
6
D
171
169
LT3032EDE-5
V+
7
GPIO
SPI_MOSI
GND
E10
3V3
CLKOUT2N
CLKOUT2P
3V3
LVDS_TXN16
LVDS_TXP16
3V3
LVDS_TXN15
LVDS_TXP15
3V3
LVDS_TXN14
LVDS_TXP14
3V3
LVDS_TXN13
LVDS_TXP13
3V3
LVDS_TXN12
LVDS_TXP12
3V3
LVDS_TXN11
LVDS_TXP11
3V3
LVDS_TXN10
LVDS_TXP10
3V3
LVDS_TXN9
LVDS_TXP9
3V3
LVDS_TXN8
LVDS_TXP8
GND
SPI_CLK
SPI_CS
12V
CLKIN2N
CLKIN2P
12V
LVDS_RXN16
LVDS_RXP16
12V
LVDS_RXN15
LVDS_RXP15
12V
LVDS_RXN14
LVDS_RXP14
12V
LVDS_RXN13
LVDS_RXP13
12V
LVDS_RXN12
LVDS_RXP12
12V
LVDS_RXN11
LVDS_RXP11
12V
LVDS_RXN10
LVDS_RXP10
12V
LVDS_RXN9
LVDS_RXP9
12V
LVDS_RXN8
LVDS_RXP8
GND
TRIG
50M_CLK
160
158
156
154
152
150
148
146
144
142
140
138
136
134
132
130
128
126
124
122
120
118
116
114
112
110
108
106
104
102
GND
E11
R22
49.9
GND
GND
GND
GND
+3.3V
GND
GND
GND
+3.3V
172
170
GND
E1
TRIG
ECO
U6
+3.3V
INN
P1C
ASP-122952-01
R8,R11,
R14,R16
500
OPT
OPT
OPT
1k
1k
R7
U2
U3
U4
U5
OPT
LT1812CS8
OPT
OPT
LT6600CS8-2.5
OPT
OPT
OPT
OPT
LT1468CS8 LT1468CS8 LTC6655AHMS8-5
R20
R21
R25
2k
OPT
2k
OPT
4.02k OPT
OPT
OPT
0
0
OPT
0
R9
R10
R12
R13
R15 R17,R18 R19
200
OPT
25
0
OPT
25
0
OPT
OPT
200
OPT
OPT
500
OPT
0
3
OPT
OPT
25
CUSTOMER NOTICE
APPROVALS
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
APP ENG.
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
TECHNOLOGY
KIM T.
NOE Q.
TITLE: SCHEMATIC
16-BIT, 50 MSPS DAC
SIZE
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
2
N/A
SCALE = NONE
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
DATE:
IC NO.
LTC1668CG
REV.
2
DEMO CIRCUIT 2459A
Monday, February 22, 2016
1
SHEET
1
OF
1
A
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