Data Sheet

74HCU04-Q100
Hex unbuffered inverter
Rev. 2 — 22 October 2015
Product data sheet
1. General description
The 74HCU04-Q100 is a hex unbuffered inverter. Inputs include clamp diodes that enable
the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)
 Specified from 40 C to +85 C and from 40 C to +125 C
 Complies with JEDEC standard JESD7A
 Balanced propagation delays
 ESD protection:
 MIL-STD-883, method 3015 exceeds 2000 V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
 Multiple package options
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature
range
74HCU04D-Q100
Name
40 C to +125 C SO14
74HCU04PW-Q100 40 C to +125 C TSSOP14
Description
Version
plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74HCU04BQ-Q100 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5  3  0.85 mm
SOT762-1
74HCU04-Q100
NXP Semiconductors
Hex unbuffered inverter
4. Functional diagram
1
1
1A
1Y
2
3
2A
2Y
4
3
5
5
3A
3Y
6
9
4A
4Y
8
11
5A
5Y
10
13
6A
6Y
12
9
11
13
2
1
4
1
6
1
8
1
10
1
12
A
Y
mna045
mna343
mna342
Fig 1.
1
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram (one
inverter)
5. Pinning information
$
WHUPLQDO
LQGH[DUHD
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<
$
<
$
<
$
$
<
<
<
$
*1'
<
$
9&&
<
9&&
<
$
<
*1'
+&84
9&&
+&84
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DDD
7UDQVSDUHQWWRSYLHZ
DDD
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to VCC.
Fig 4.
Pin configuration SO14 and TSSOP14
74HCU04_Q100
Product data sheet
Fig 5.
Pin configuration DHVQFN14
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Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
2 of 16
74HCU04-Q100
NXP Semiconductors
Hex unbuffered inverter
5.1 Pin description
Table 2.
Pin description
Symbol
Pin
Description
1A
1
data input
1Y
2
data output
2A
3
data input
2Y
4
data output
3A
5
data input
3Y
6
data output
GND
7
ground (0 V)
4Y
8
data output
4A
9
data input
5Y
10
data output
5A
11
data input
6Y
12
data output
6A
13
data input
VCC
14
supply voltage
6. Functional description
Table 3.
Function table
H = HIGH voltage level; L = LOW voltage level
Input
Output
nA
nY
L
H
H
L
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
0.5
+7.0
V
-
20
mA
-
50
mA
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
[1]
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
[1]
IO
output current
0.5 V < VO < VCC + 0.5 V
-
25
mA
ICC
supply current
-
50
mA
IGND
ground current
50
-
mA
Tstg
storage temperature
65
+150
C
-
500
mW
IIK
[2]
total power dissipation
Ptot
SO14, TSSOP14 and
DHVQFN14 packages
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
74HCU04_Q100
Product data sheet
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Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
3 of 16
74HCU04-Q100
NXP Semiconductors
Hex unbuffered inverter
[2]
For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VCC
supply voltage
2.0
5.0
6.0
V
VI
input voltage
0
-
VCC
V
VO
output voltage
0
-
VCC
V
Tamb
ambient temperature
40
+25
+125
C
9. Static characteristics
Table 6.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
25 C
Conditions
Min
VIH
VIL
VOH
HIGH-level
input voltage
Typ
Max
Min
40 C to +125 C Unit
Max
Min
Max
VCC = 2.0 V
1.7
1.4
-
1.7
-
1.7
-
V
VCC = 4.5 V
3.6
2.6
-
3.6
-
3.6
-
V
VCC = 5.5 V
4.8
3.4
-
4.8
-
4.8
-
V
VCC = 2.0 V
-
0.6
0.3
-
0.3
-
0.3
V
VCC = 4.5 V
-
1.9
0.9
-
0.9
-
0.9
V
VCC = 5.5 V
-
2.6
1.2
-
1.2
-
1.2
V
HIGH-level
VI = VIH or VIL
output voltage
IO = 20 A; VCC = 2.0 V
1.8
2.0
-
1.8
-
1.8
-
V
IO = 20 A; VCC = 4.5 V
4.0
LOW-level
input voltage
4.5
-
4.0
-
4.0
-
V
IO = 4.0 mA; VCC = 4.5 V 3.98
4.32
-
3.84
-
3.7
-
V
IO = 20 A; VCC = 6.0 V
6.0
-
5.5
-
5.5
-
V
5.81
-
5.34
-
5.2
-
V
5.5
IO = 5.2 mA; VCC = 6.0 V 5.48
VOL
40 C to +85 C
LOW-level
VI = VIH or VIL
output voltage
IO = 20 A; VCC = 2.0 V
-
0
0.2
-
0.2
-
0.2
V
IO = 20 A; VCC = 4.5 V
-
0
0.5
-
0.5
-
0.5
V
IO = 4.0 mA; VCC = 4.5 V
-
0.15
0.26
-
0.33
-
0.4
V
IO = 20 A; VCC = 6.0 V
-
0
0.5
-
0.5
-
0.5
V
IO = 5.2 mA; VCC = 6.0 V
-
0.16
0.26
-
0.33
-
0.4
V
-
0.1
1.0
A
input leakage
current
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
2
-
20
-
20
A
CI
input
capacitance
-
3.5
-
-
-
-
-
pF
74HCU04_Q100
Product data sheet
VI = VCC or GND;
VCC = 6.0 V
1.0
II
-
-
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 22 October 2015
-
© NXP Semiconductors N.V. 2015. All rights reserved.
4 of 16
74HCU04-Q100
NXP Semiconductors
Hex unbuffered inverter
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); For test circuit see Figure 7.
Symbol Parameter
propagation delay
tpd
transition time
tt
power dissipation
capacitance
CPD
[1]
tpd is the same as tPHL, tPLH.
[2]
tt is the same as tTHL, tTLH.
[3]
25 C
Conditions
40 C to
+85 C
40 C to Unit
+125 C
Typ
Max
Max
Max
VCC = 2.0 V; CL = 50 pF
19
70
90
105
ns
VCC = 4.5 V; CL = 50 pF
7
14
18
21
ns
nA to nY; see Figure 6
[1]
VCC = 5.0 V; CL = 15 pF
5
-
-
-
ns
VCC = 6.0 V; CL = 50 pF
6
12
15
18
ns
VCC = 2.0 V; CL = 50 pF
19
75
95
110
ns
VCC = 4.5 V; CL = 50 pF
7
15
19
22
ns
VCC = 6.0 V; CL = 50 pF
6
13
16
19
ns
10
-
[2]
see Figure 6
per inverter; VI = GND to VCC
[3]
pF
CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL  VCC2  fo) = sum of outputs.
74HCU04_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
5 of 16
74HCU04-Q100
NXP Semiconductors
Hex unbuffered inverter
11. Waveforms
VI
VM
nA input
VM
GND
t PHL
t PLH
VOH
VCC
90 %
PULSE
GENERATOR
VM
VM
nY output
10 %
VOL
VI
VO
DUT
CL
50 pF
RT
t THL
t TLH
mna034
mna722
VM = 0.5  VCC; VI = GND to VCC.
Definitions for test circuit:
CL = Load capacitance including jig and probe
capacitance.
RT = Termination resistance should be equal to output
impedance Zo of the pulse generator.
Fig 6.
The input (nA) to output (nY) propagation
delay times
Fig 7.
Load circuit for switching times
12. Typical transfer characteristics
001aal928
2.4
(1)
VO
(V)
ID
(mA)
001aal927
6
1.2
VO
(V)
24
ID
(mA)
(1)
1.6
0.8
4
16
0.8
0.4
2
8
(2)
(2)
0
0
0.8
0
0
2.4
1.6
0
0
2
VI (V)
VCC = 2.0 V; IO = 0 A
74HCU04_Q100
Product data sheet
6
VI (V)
Tamb = 25 C.
Fig 8.
4
Tamb = 25 C.
Fig 9.
VCC = 4.5 V; IO = 0 A
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Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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74HCU04-Q100
NXP Semiconductors
Hex unbuffered inverter
001aal926
6
60
(1)
VO
(V)
ID
(mA)
4
40
Rbias = 560 kΩ
VCC
2
20
0.47 μF
(2)
0
2
4
output
VI
(f = 1 kHz)
0
0
input
100 μF
A IO
GND
6
VI (V)
mna050
Tamb = 25 C.
I
g fs = --------OV I
fi = 1 kHz at VO is constant
Fig 10. VCC = 6.0 V; IO = 0 A
Fig 11. Test set-up for measuring forward
transconductance
mna355
40
g fs
(mA/V)
30
20
10
0
0
2
4
VCC (V)
6
Tamb = 25 C.
Fig 12. Typical forward transconductance as a function of the supply voltage
74HCU04_Q100
Product data sheet
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Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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74HCU04-Q100
NXP Semiconductors
Hex unbuffered inverter
13. Application information
Some applications are:
• Linear amplifier (see Figure 13)
• Crystal oscillator design (see Figure 14)
• Astable multivibrator (see Figure 15)
Remark: All values given are typical unless otherwise specified.
R2
R1
VCC
1 μF
R2
R1
U04
U04
C1
ZL
C2
out
mna052
mna053
Maximum Vo(p-p) = VCC  2.0 V centered at 0.5  VCC.
C1 = 47 pF (typical)
G ol
G v = – --------------------------------------R1
1 + -------  1 + G ol 
R2
C2 = 33 pF (typical)
R1 = 1 M to 10 M (typical
R2 optimum value depends on the frequency and
required stability against changes in VCC or average
minimum ICC. ICC is typically 5 mA at VCC = 5 V and
fi = 10 MHz.
Gol = open loop gain
Gv = voltage gain
R1  3 k, R2  1 M
ZL > 10 k; Gol = 20 (typical)
VCC = 6.0 V
Typical unity gain bandwidth product is 5 MHz.
Fig 13. Used as a linear amplifier
Fig 14. Crystal oscillator configuration
Table 8.
External components for resonator (f < 1 MHz)
All values given are typical and must be used as an initial set-up.
Frequency
R1
R2
C1
C2
10 kHz to 15.9 kHz
22 M
220 k
56 pF
20 pF
16 kHz to 24.9 kHz
22 M
220 k
56 pF
10 pF
25 kHz to 54.9 kHz
22 M
100 k
56 pF
10 pF
55 kHz to 129.9 kHz
22 M
100 k
47 pF
5 pF
130 kHz to 199.9 kHz
22 M
47 k
47 pF
5 pF
200 kHz to 349.9 kHz
10 M
47 k
47 pF
5 pF
350 kHz to 600 kHz
10 M
47 k
47 pF
5 pF
74HCU04_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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74HCU04-Q100
NXP Semiconductors
Hex unbuffered inverter
Table 9.
Optimum value for R2
Frequency
R2
Optimum for
3 kHz
2.0 k
minimum required ICC
8.0 k
minimum influence due to change in VCC
6 kHz
1.0 k
minimum required ICC
4.7 k
minimum influence by VCC
0.5 k
minimum required ICC
10 kHz
14 kHz
>14 kHz
2.0 k
minimum influence by VCC
0.5 k
minimum required ICC
1.0 k
minimum influence by VCC
-
replace R2 by C3 with a typical value of 35 pF
001aal930
80
input
capacitance
(pF)
(1)
60
(2)
(3)
U04
40
U04
(4)
(5)
RS
R
C
20
001aah115
0
0
2
4
6
8
VI (V)
VCC = 2.0 V
1
1
f = ---  --------------T 2.2RC
VCC = 3.0 V
RS  2  R
VCC = 4.0 V
The average ICC (mA) is approximately
3.5 + 0.05  f (MHz)  C (pF) at VCC = 5.0 V.
VCC = 6.0 V
VCC = 5.0 V
Tamb = 25 C.
Fig 15. Astable multivibrator
74HCU04_Q100
Product data sheet
Fig 16. Input capacitance as function of input voltage
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Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
9 of 16
74HCU04-Q100
NXP Semiconductors
Hex unbuffered inverter
14. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
HE
v M A
Z
8
14
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
7
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.01
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.010 0.057
inches 0.069
0.004 0.049
0.05
0.244
0.039
0.041
0.228
0.016
0.028
0.024
0.01
0.01
0.028
0.004
0.012
θ
8o
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT108-1
076E06
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 17. Package outline SOT108-1 (SO14)
74HCU04_Q100
Product data sheet
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Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
10 of 16
74HCU04-Q100
NXP Semiconductors
Hex unbuffered inverter
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
E
D
A
X
c
y
HE
v M A
Z
8
14
Q
(A 3)
A2
A
A1
pin 1 index
θ
Lp
L
1
7
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.72
0.38
8o
o
0
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT402-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-153
Fig 18. Package outline SOT402-1 (TSSOP14)
74HCU04_Q100
Product data sheet
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Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
11 of 16
74HCU04-Q100
NXP Semiconductors
Hex unbuffered inverter
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
B
D
SOT762-1
A
A
A1
E
c
detail X
terminal 1
index area
terminal 1
index area
C
e1
e
v
w
b
2
C A B
C
y
y1 C
6
L
1
7
Eh
e
14
8
k
13
9
Dh
X
k
0
2
4 mm
scale
Dimensions (mm are the original dimensions)
Unit
max
nom
min
mm
A(1)
1
A1
b
0.05 0.30
0.02 0.25
0.00 0.18
c
D(1)
Dh
E(1)
Eh
0.2
3.1
3.0
2.9
1.65
1.50
1.35
2.6
2.5
2.4
1.15
1.00
0.85
e
e1
0.5
k
L
v
0.1
0.2
0.5
0.4
0.3
2
w
y
0.05 0.05
y1
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
Outline
version
SOT762-1
References
IEC
JEDEC
JEITA
sot762-1_po
European
projection
Issue date
15-04-10
15-05-05
MO-241
Fig 19. Package outline SOT762-1 (DHVQFN14)
74HCU04_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
12 of 16
74HCU04-Q100
NXP Semiconductors
Hex unbuffered inverter
15. Abbreviations
Table 10.
Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
LSTTL
Low-power Schottky Transistor-Transistor Logic
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
MIL
Military
TTL
Transistor-Transistor Logic
16. Revision history
Table 11.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74HCU04_Q100 v.2
20151022
Product data sheet
-
74HCU04_Q100 v.1
-
-
Modifications:
74HCU04_Q100 v.1
74HCU04_Q100
Product data sheet
•
Conditions VIL and VIH corrected (errata).
20130131
Product data sheet
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Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
13 of 16
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17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
17.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HCU04_Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74HCU04_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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19. Contents
1
2
3
4
5
5.1
6
7
8
9
10
11
12
13
14
15
16
17
17.1
17.2
17.3
17.4
18
19
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Typical transfer characteristics . . . . . . . . . . . . 6
Application information. . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2015.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 22 October 2015
Document identifier: 74HCU04_Q100