Data Sheet

HEF4069UB-Q100
Hex inverter
Rev. 2 — 9 September 2014
Product data sheet
1. General description
The HEF4069UB-Q100 is a general-purpose hex inverter. Each inverter has a single
stage.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)
 Specified from 40 C to +85 C and from 40 C to +125 C
 Fully static operation
 5 V, 10 V, and 15 V parametric ratings
 Standardized symmetrical output characteristics
 ESD protection:
 MIL-STD-883, method 3015 exceeds 2000 V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
 Complies with JEDEC standard JESD 13-B
3. Applications
 Oscillator
4. Ordering information
Table 1.
Ordering information
All types operate from 40 C to +125 C.
Type number
HEF4069UBT-Q100
Package
Name
Description
Version
SO14
plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
HEF4069UBTT-Q100 TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
HEF4069UB-Q100
NXP Semiconductors
Hex inverter
5. Functional diagram
1A
2A
3A
4A
5A
6A
1
2
3
4
5
6
9
8
11
10
13
12
1Y
2Y
3Y
4Y
VDD
5Y
A
6Y
VSS
001aag154
001aag152
Fig 1.
Y
Functional diagram
Fig 2.
Schematic diagram (one inverter)
6. Pinning information
6.1 Pinning
+()8%4
$ 9''
< $
$ <
< $
$ <
< $
966 <
DDD
Fig 3.
Pin configuration
6.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
1A to 6A
1, 3, 5, 9, 11, 13
input
1Y to 6Y
2, 4, 6, 8, 10, 12
output
VSS
7
ground (0 V)
VDD
14
supply voltage
HEF4069UB_Q100
Product data sheet
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Rev. 2 — 9 September 2014
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2 of 16
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Hex inverter
7. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VDD
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
II/O
Conditions
Min
Max
0.5
VI < 0.5 V or VI > VDD + 0.5 V
0.5
+18
V
10
mA
VDD + 0.5
V
-
10
mA
input/output current
-
10
mA
IDD
supply current
-
50
mA
Tstg
storage temperature
65
+150
C
Tamb
ambient temperature
40
+125
C
Ptot
total power dissipation
P
power dissipation
VO < 0.5 V or VO > VDD + 0.5 V
Unit
Tamb = 40 C to +125 C
SO14
[1]
-
500
mW
TSSOP14
[2]
-
500
mW
-
100
mW
per output
[1]
For SO14 packages: above Tamb = 70 C, Ptot derates linearly with 8 mW/K.
[2]
For TSSOP14 packages: above Tamb = 60 C, Ptot derates linearly with 5.5 mW/K.
8. Recommended operating conditions
Table 4.
Recommended operating conditions
Symbol
Parameter
Min
Typ
Max
Unit
VDD
supply voltage
3
-
15
V
VI
input voltage
0
-
VDD
V
Tamb
ambient temperature
40
-
+125
C
HEF4069UB_Q100
Product data sheet
Conditions
in free air
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Rev. 2 — 9 September 2014
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Hex inverter
9. Static characteristics
Table 5.
Static characteristics
VSS = 0 V; VI = VSS or VDD; unless otherwise specified.
Symbol Parameter
VIH
VIL
VOH
VOL
IOH
IOL
Conditions
VDD
Tamb = 40 C
Tamb = +25 C
Tamb = +85 C Tamb = +125 C Unit
Min
Max
Min
Max
Min
Max
Min
Max
5V
4
-
4
-
4
-
4
-
V
10 V
8
-
8
-
8
-
8
-
V
15 V
12.5
-
12.5
-
12.5
-
12.5
-
V
5V
-
1
-
1
-
1
-
1
V
10 V
-
2
-
2
-
2
-
2
V
15 V
-
2.5
-
2.5
-
2.5
-
2.5
V
HIGH-level
IO < 1 A
output voltage
5V
4.95
-
4.95
-
4.95
-
4.95
-
V
10 V
9.95
-
9.95
-
9.95
-
9.95
-
V
15 V
14.95
-
14.95
-
14.95
-
14.95
-
V
LOW-level
IO < 1 A
output voltage
5V
-
0.05
-
0.05
-
0.05
-
0.05
V
10 V
-
0.05
-
0.05
-
0.05
-
0.05
V
15 V
-
0.05
-
0.05
-
0.05
-
0.05
V
5V
-
1.7
-
1.4
-
1.1
-
1.1
mA
5V
-
0.64
-
0.5
-
0.36
-
0.36 mA
VO = 9.5 V
10 V
-
1.6
-
1.3
-
0.9
-
0.9
mA
VO = 13.5 V
15 V
-
4.2
-
3.4
-
2.4
-
2.4
mA
5V
0.64
-
0.5
-
0.36
-
0.36
-
mA
10 V
1.6
-
1.3
-
0.9
-
0.9
-
mA
15 V
4.2
-
3.4
-
2.4
-
2.4
-
mA
A
HIGH-level
input voltage
LOW-level
input voltage
IO < 1 A
IO < 1 A
HIGH-level
VO = 2.5 V
output current V = 4.6 V
O
LOW-level
VO = 0.4 V
output current V = 0.5 V
O
VO = 1.5 V
II
input leakage
current
15 V
-
0.1
-
0.1
-
1.0
-
1.0
IDD
supply current all valid input 5 V
combinations; 10 V
IO = 0 A
15 V
-
0.25
-
0.25
-
7.5
-
7.5
A
-
0.5
-
0.5
-
15.0
-
15.0
A
-
1.0
-
1.0
-
30.0
-
30.0
A
-
-
-
7.5
-
-
-
-
CI
input
capacitance
HEF4069UB_Q100
Product data sheet
digital inputs
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 9 September 2014
pF
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Hex inverter
10. Dynamic characteristics
Table 6.
Dynamic characteristics
Tamb = 25 C; for waveforms see Figure 4; for test circuit see Figure 5.
Symbol Parameter
tPHL
tPLH
tTHL
tTLH
[1]
HIGH to LOW
propagation delay
Conditions
VDD
Extrapolation formula[1]
Min
Typ
Max
nA to nY
5V
18 ns + (0.55 ns/pF)CL
-
45
90
ns
10 V
9 ns + (0.23 ns/pF)CL
-
20
40
ns
15 V
7 ns + (0.16 ns/pF)CL
-
15
25
ns
5V
13 ns + (0.55 ns/pF)CL
-
40
80
ns
10 V
9 ns + (0.23 ns/pF)CL
-
20
40
ns
LOW to HIGH
propagation delay
nA to nY
HIGH to LOW output
transition time
output nY
LOW to HIGH output
transition time
output nY
Unit
15 V
7 ns + (0.16 ns/pF)CL
-
15
30
ns
5V
10 ns + (1.00 ns/pF)CL
-
60
120
ns
10 V
9 ns + (0.42 ns/pF)CL
-
30
60
ns
15 V
6 ns + (0.28 ns/pF)CL
-
20
40
ns
5V
10 ns + (1.00 ns/pF)CL
-
60
120
ns
10 V
9 ns + (0.42 ns/pF)CL
-
30
60
ns
15 V
6 ns + (0.28 ns/pF)CL
-
20
40
ns
The typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF).
Table 7.
Dynamic power dissipation
VSS = 0 V; tr = tf  20 ns; Tamb = 25 C.
Symbol Parameter
PD
dynamic power dissipation
VDD
Typical formula
Where
5 V PD = 600  fi + (fo  CL)  VDD (W)
2
10 V PD = 4000  fi + (fo  CL)  VDD2 (W)
fi = input frequency in MHz;
fo = output frequency in MHz;
15 V PD = 22000  fi + (fo  CL)  VDD (W) CL = output load capacitance in pF;
(fo  CL) = sum of the outputs;
2
VDD = supply voltage in V.
HEF4069UB_Q100
Product data sheet
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Rev. 2 — 9 September 2014
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Hex inverter
11. Waveforms
tr
VI
90 %
VM
input
0V
tf
10 %
tPHL
VOH
tPLH
90 %
VM
output
10 %
VOL
tTLH
001aag185
tTHL
Measurement points: VM = 0.5VDD.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 4.
Propagation delay and transition times
9''
*
9,
92
'87
&/
57
DDJ
Definitions for test circuit:
CL = load capacitance including jig and probe capacitance;
RT = termination resistance should be equal to the output impedance Zo of the pulse generator;
For test data, refer to Table 8.
Fig 5.
Test circuit for measuring switching times
Table 8.
Test data
Supply voltage
Input
VDD
VI
tr, tf
CL
5 V to 15 V
VSS or VDD
 20 ns
50 pF
HEF4069UB_Q100
Product data sheet
Load
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Rev. 2 — 9 September 2014
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Hex inverter
11.1 Transfer characteristics
001aag159
5.0
500
VO
(V)
250
(2)
(1)
0
ID
(mA)
5
5
(2)
(2)
0
5.0
0
2.5
10
VO
(V)
ID
(μA)
2.5
001aag160
10
(1)
(2)
0
0
0
5
VI (V)
10
VI (V)
a. VDD = 5 V; IO = 0 A
b. VDD = 10 V; IO = 0 A
001aag161
20
20
VO
(V)
ID
(mA)
10
10
(2)
(1)
(2)
0
0
0
10
20
VI (V)
c. VDD = 15 V; IO = 0 A
(1) VO = output voltage.
(2) ID = drain current.
Fig 6.
Typical transfer characteristics
HEF4069UB_Q100
Product data sheet
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Rev. 2 — 9 September 2014
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Hex inverter
12. Application information
Some examples of applications for the HEF4069UB-Q100.
Figure 7 shows an astable relaxation oscillator using two HEF4069UB-Q100 inverters and
2 BAW62 diodes. The oscillation frequency is mainly determined by R1  C1, provided
R1 << R2 and R2  C2 << R1  C1.
The function of R2 is to minimize the influence of the forward voltage across the protection
diodes on the frequency; C2 is a stray (parasitic) capacitance.
The period Tp is given by Tp = T1 + T2,
where:
V DD + V ST
T 1 = R1C1In ------------------------V ST
2V DD – V ST
T 2 = R1C1In ---------------------------V DD – V ST
VST = the signal threshold level of the inverter.
The period is fairly independent of VDD, VST and temperature. The duty factor, however, is
influenced by VST.
9''
9''
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9''
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9''
9''
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9
IRUZDUGYROWDJH
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Fig 7.
DDD
Astable relaxation oscillator
HEF4069UB_Q100
Product data sheet
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Rev. 2 — 9 September 2014
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8 of 16
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NXP Semiconductors
Hex inverter
Figure 8 shows a crystal oscillator for frequencies up to 10 MHz using two
HEF4069UB-Q100 inverters. The second inverter amplifies the oscillator output voltage to
a level sufficient to drive other Local Oxidation CMOS (LOCMOS) circuits.
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The output inverter is used to amplify the oscillator output voltage to a level sufficient to drive other LOCMOS circuits.
Fig 8.
Crystal oscillator
Figure 9 and Figure 10 show voltage gain and supply current. Figure 11 shows the test
set-up and an example of an analog amplifier using one HEF4069UB-Q100.
001aag156
75
001aag157
20
IDD
(mA)
gain
(VO/VI)
15
50
typ
typ
10
25
5
0
0
0
5
10
15
0
VDD (V)
Fig 9.
5
10
15
VDD (V)
Typical voltage gain as a function of
supply voltage
Fig 10. Typical supply current as a function of
supply voltage
Nȍ
+()8%4
DDD
Fig 11. Test set-up
HEF4069UB_Q100
Product data sheet
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Rev. 2 — 9 September 2014
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Hex inverter
Figure 12 shows typical forward transconductance and Figure 13 shows the test set-up.
001aag164
10
gfs
(mA/V)
(1)
7.5
(2)
Rbias = 560 kΩ
5.0
(3)
VDD
2.5
0.47 μF
input
output
Vi
A
0
0
5
10
100 μF
Io
VSS
15
VDD (V)
001aag163
(1) Average +2; where: ‘’ is the standard deviation.
(2) Average.
(3) Average 2; where: ‘’ is the standard deviation.
dI
g fs = -------o- at VO is constant.
dV i
fi.= 1 kHz
Fig 12. Typical forward transconductance as a
function of supply voltage at Tamb = 25 C
HEF4069UB_Q100
Product data sheet
Fig 13. Test set-up
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Rev. 2 — 9 September 2014
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Hex inverter
13. Package outline
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Fig 14. Package outline SOT108-1 (SO14)
HEF4069UB_Q100
Product data sheet
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Rev. 2 — 9 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
11 of 16
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NXP Semiconductors
Hex inverter
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Fig 15. Package outline SOT402-1 (TSSOP14)
HEF4069UB_Q100
Product data sheet
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Rev. 2 — 9 September 2014
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Hex inverter
14. Abbreviations
Table 9.
Abbreviations
Acronym
Description
HBM
Human Body Model
ESD
ElectroStatic Discharge
MM
Machine Model
MIL
Military
15. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
HEF4069UB_Q100 v.2
20140909
Product data sheet
-
HEF4069UB_Q100 v.1
Modifications:
HEF4069UB_Q100 v.1
HEF4069UB_Q100
Product data sheet
•
Section 2: ESD protection: MIL-STD-833 changed to MIL-STD883
20130228
Product data sheet
-
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 9 September 2014
-
© NXP Semiconductors N.V. 2014. All rights reserved.
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16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
HEF4069UB_Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 9 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
HEF4069UB_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 9 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
15 of 16
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18. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
11.1
12
13
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 3
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Transfer characteristics . . . . . . . . . . . . . . . . . . 7
Application information. . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2014.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 9 September 2014
Document identifier: HEF4069UB_Q100