TLD1312EL Data Sheet

I n f i n e o n ® L I T I X TM B a s i c
TLD1312EL
3 Channel High Side Current Source
Data Sheet
Rev. 1.1, 2015-03-19
Automotive
TLD1312EL
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
3.1
3.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
4.1
4.2
4.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
5.1
5.2
5.3
5.3.1
5.3.2
EN Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EN Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Supply Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EN Unused . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EN - Pull Up to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EN - Direct Connection to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
10
11
12
12
12
6
6.1
6.2
6.3
PWMI Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PWM Dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal PWM Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Internal Supply / EN / PWMI Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
13
14
15
7
7.1
7.2
7.3
IN_SET Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Current Adjustment via RSET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics IN_SET Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
18
18
20
8
8.1
8.1.1
8.1.2
8.2
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Over Load Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reverse Battery Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21
21
21
21
22
9
9.1
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
10
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
11
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Data Sheet
2
8
8
9
9
Rev. 1.1, 2015-03-19
3 Channel High Side Current Source
LITIXTM Basic
1
TLD1312EL
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
3 Channel device with integrated output stages (current sources),
optimized to drive LEDs
Output current up to 120mA per channel
Low current consumption in sleep mode
PWM-operation supported via VS- and EN-pin
Integrated PWM dimming engine to provide two LED brightness
levels without external logic (e.g. µC)
Output current adjustable via external low power resistor and
possibility to connect PTC resistor for LED protection during over
temperature conditions
Reverse polarity protection
Overload protection
Undervoltage detection
Wide temperature range: -40 °C < Tj < 150 °C
PG-SSOP14 package with exposed heatslug
Green Product (RoHS compliant)
AEC Qualified
PG-SSOP14
Description
The LITIXTM Basic TLD1312EL is a three channel high side driver IC with integrated output stages. It is designed
to control LEDs with a current up to 120 mA. In typical automotive applications the device is capable to drive i.e.
3 red LEDs per chain (total 9 LEDs) with a current up to 60mA, which is limited by thermal cooling aspects. The
output current is controlled practically independent of load and supply voltage changes.
Table 1
Product Summary
VS(nom)
5.5 V… 40 V
VS(max)
40 V
VOUTx(max)
IOUTx(nom) 60 mA when using a supply voltage range of 8V
Operating voltage
Maximum voltage
Nominal output (load) current
- 18V (e.g. Automotive car battery). Currents up
to IOUT(max) possible in applications with low
thermal resistance RthJA
IOUTx(max)
Maximum output (load) current
120 mA; depending on thermal resistance RthJA
Type
Package
Marking
TLD1312EL
PG-SSOP14
TLD1312EL
Data Sheet
3
Rev. 1.1, 2015-03-19
TLD1312EL
Overview
Table 1
Product Summary
Output current accuracy at RSET = 12 kΩ
Current consumption in sleep mode
kLT
IS(sleep,typ)
750 ± 7%
0.1 µA
Protective functions
- ESD protection
- Under voltage lock out
- Over Load protection
- Over Temperature protection
- Reverse Polarity protection
Applications
Designed for exterior LED lighting applications such as tail/brake light, turn indicator, position light, side marker,...
The device is also well suited for interior LED lighting applications such as ambient lighting, interior illumination
and dash board lighting.
Data Sheet
4
Rev. 1.1, 2015-03-19
TLD1312EL
Block Diagram
2
Block Diagram
VS
Internal
supply
EN
Thermal
protection
Output
control
PWMI
OUT3
OUT2
OUT1
IN_SET Current
adjust
TLD1312EL
Figure 1
Data Sheet
GND
Basic Block Diagram
5
Rev. 1.1, 2015-03-19
TLD1312EL
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
Figure 2
Data Sheet
VS
1
VS
2
EN
3
NC
4
PWMI
14
NC
13
OUT3
12
OUT2
11
OUT1
5
10
NC
IN_SET
6
9
GND
NC
7
8
NC
TLD1312EL
EP
Pin Configuration
6
Rev. 1.1, 2015-03-19
TLD1312EL
Pin Configuration
3.2
Pin Definitions and Functions
Pin
Symbol
Input/
Output
Function
1, 2
VS
–
Supply Voltage; battery supply, connect a decoupling capacitor (100 nF 1 µF) to GND
3
EN
I
Enable pin
4
NC
–
Pin not connected
5
PWMI
I/O
PWM Input
6
IN_SET
I/O
Input / SET pin; Connect a low power resistor to adjust the output current
7
NC
–
Pin not connected
8
NC
–
Pin not connected
9
GND
–
1)
10
NC
–
Pin not connected
11
OUT1
O
Output 1
12
OUT2
O
Output 2
13
OUT3
O
Output 3
14
NC
–
Pin not connected
–
1)
Exposed
Pad
GND
Ground
Exposed Pad; connect to GND in application
1) Connect all GND-pins together.
Data Sheet
7
Rev. 1.1, 2015-03-19
TLD1312EL
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings 1)
Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin for input pins (I), positive
currents flowing out of the I/O and output pins (O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Max.
VS
VEN
VEN(VS)
VEN VOUTx
VOUTx
VPS
-16
40
V
–
-16
40
V
–
VS - 40
VS + 16
V
–
-16
40
V
–
-1
40
V
–
-16
40
V
–
VPWMI
VIN_SET
-0.3
6
V
–
-0.3
6
V
–
IIN_SET
IOUTx
–
2
mA
–
–
130
mA
–
Tj
Tstg
-40
150
°C
–
-55
150
°C
–
Voltages
4.1.1
Supply voltage
4.1.2
Input voltage EN
4.1.3
Input voltage EN related to VS
4.1.4
Input voltage EN related to VOUTx
VEN - VOUTx
4.1.5
4.1.6
Output voltage
Power stage voltage
VPS = VS - VOUTx
4.1.7
Input voltage PWMI
4.1.8
IN_SET voltage
Currents
4.1.9
IN_SET current
4.1.10
Output current
Temperatures
4.1.11
Junction temperature
4.1.12
Storage temperature
ESD Susceptibility
4.1.13
ESD resistivity to GND
VESD
-2
2
kV
Human Body
Model (100 pF via
1.5 kΩ)2)
4.1.14
ESD resistivity all pins to GND
-500
500
V
CDM3)
4.1.15
ESD resistivity corner pins to GND
VESD
VESD
-750
750
V
CDM3)
1) Not subject to production test, specified by design
2) ESD susceptibility, Human Body Model “HBM” according to ANSI/ESDA/JEDEC JS-001-2011
3) ESD susceptibility, Charged Device Model “CDM” according to JESD22-C101E
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Data Sheet
8
Rev. 1.1, 2015-03-19
TLD1312EL
General Product Characteristics
4.2
Pos.
Functional Range
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Conditions
4.2.16
Supply voltage range for
normal operation
VS(nom)
5.5
40
V
–
4.2.17
Power on reset threshold
VS(POR)
–
5
V
VEN = VS
RSET = 12 kΩ
IOUTx = 80% IOUTx(nom)
VOUTx = 2.5 V
4.2.18
Junction temperature
Tj
-40
150
°C
–
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Pos.
Thermal Resistance
Parameter
4.3.1
Junction to Case
4.3.2
Junction to Ambient 1s0p board
Symbol
RthJC
RthJA1
Limit Values
Min.
Typ.
Max.
–
8
10
–
–
4.3.3
Junction to Ambient 2s2p board
61
56
Unit
Conditions
K/W
1) 2)
K/W
1) 3)
Ta = 85 °C
Ta = 135 °C
–
–
RthJA2
K/W
–
–
45
43
–
–
1) 4)
Ta = 85 °C
Ta = 135 °C
1) Not subject to production test, specified by design. Based on simulation results.
2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed Pad are fixed to
ambient temperature). Ta = 85°C, Total power dissipation 1.5 W.
3) The RthJA values are according to Jedec JESD51-3 at natural convection on 1s0p FR4 board. The product (chip + package)
was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 70µm Cu, 300 mm2 cooling area. Total power dissipation 1.5 W
distributed statically and homogenously over all power stages.
4) The RthJA values are according to Jedec JESD51-5,-7 at natural convection on 2s2p FR4 board. The product (chip +
package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (outside 2 x 70 µm Cu, inner 2 x
35µm Cu). Where applicable, a thermal via array under the exposed pad contacted the first inner copper layer. Total power
dissipation 1.5 W distributed statically and homogenously over all power stages.
Data Sheet
9
Rev. 1.1, 2015-03-19
TLD1312EL
EN Pin
5
EN Pin
The EN pin is a dual function pin:
Internal Supply
Output Control
EN
V EN
Figure 3
Block Diagram EN pin
Note: The current consumption at the EN-pin IEN needs to be added to the total device current consumption. The
total current consumption is the sum of the currents at the VS-pin IS and the EN-pin IEN.
5.1
EN Function
If the voltage at the pin EN is below a threshold of VEN(off) the LITIXTM Basic IC will enter Sleep mode. In this state
all internal functions are switched off, the current consumption is reduced to IS(sleep). A voltage above VEN(on) at this
pin enables the device after the Power on reset time tPOR.
VS
V EN
IOU T
t
t
tPOR
100%
80%
t
Figure 4
Data Sheet
Power on reset
10
Rev. 1.1, 2015-03-19
TLD1312EL
EN Pin
5.2
Internal Supply Pin
The EN pin can be used to supply the internal logic. There are two typical application conditions, where this feature
can be used:
1) In “DC/DC control Buck” configurations, where the voltage Vs can be below 5.5V.
2) In configurations, where a PWM signal is applied at the Vbatt pin of a light module. The buffer capacitor CBUF is
used to supply the LITIXTM Basic IC during Vbatt low (Vs low) periods. This feature can be used to minimize the
turn-on time to the values specified in Pos. 8.2.13. Otherwise, the power-on reset delay time tPOR (Pos. 6.3.5) has
to be considered.
The capacitor can be calculated using the following formula:
I EN ( LS )
C BUF = tLOW ( max ) ⋅ -------------------------------------------------V S – V D1 – V S ( POR )
(1)
See also a typical application drawing in Chapter 9.
VBATT
VS
D1
EN
CBUF
Internal
supply
Thermal
protection
Output
control
OUT3
OUT2
OUT1
IN_SET
RSET
Current
adjust
TM
LITIX
Basic
LEDBasic
Driver
GND
GND
Figure 5
Data Sheet
External circuit when applying a fast PWM signal on VBATT
11
Rev. 1.1, 2015-03-19
TLD1312EL
EN Pin
V EN
t
V BATT
IOU T
t
tON (VS)
100%
80%
Switch off behavior depends on
V BATT and load characteristics
20%
t
Figure 6
Typical waveforms when applying a fast PWM signal on VBATT
The parameter tON(VS) is defined at Pos. 8.2.13. The parameter tOFF(VS) depends on the load and supply voltage
VBATT characteristics.
5.3
EN Unused
In case of an unused EN pin, there are two different ways to connect it:
5.3.1
EN - Pull Up to VS
The EN pin can be connected with a pull up resistor (e.g. 10 kΩ) to Vs potential. In this configuration the LITIXTM
Basic IC is always enabled.
5.3.2
EN - Direct Connection to VS
The EN pin can be connected directly to the VS pin (IC always enabled). This configuration has the advantage
(compared to the configuration described in Chapter 5.3.1) that no additional external component is required.
Data Sheet
12
Rev. 1.1, 2015-03-19
TLD1312EL
PWMI Pin
6
PWMI Pin
The PWMI pin is designed as a dual function pin.
IPWMI(L)
Output Control
PWMI
VPWMI
Figure 7
Block Diagram PWMI pin
The pin can be used for PWM-dimming via a push-pull stage of a micro controller, which is connecting the PWMIpin to a low or high potential.
Note: The micro controller’s push-pull stage has to able to sink currents according to Pos. 6.3.15 to activate the
device.
Furthermore, the device offers also an internal PWM unit by connecting an external-RC network according to
Figure 10.
6.1
PWM Dimming
A PWM signal can be applied at the PWMI pin for LED brightness regulation of all 3 output stages. The dimming
frequency can be adjusted in a very wide range (e.g. 400 Hz). The PWMI pin is low active. Turn on/off thresholds
VPWMI(L) and VPWMI(H) are specified in parameters Pos. 6.3.12 and Pos. 6.3.13.
V PWMI
IOU T
tON (PWMI )
tOFF(PWMI )
t
100%
80%
20%
t
Figure 8
Data Sheet
Turn on and Turn off time for PWMI pin usage
13
Rev. 1.1, 2015-03-19
TLD1312EL
PWMI Pin
6.2
Internal PWM Unit
Connecting a resistor and a capacitor in parallel on the PWMI pin enables the internal pulse width modulation unit.
The following figure shows the charging and discharging defined by the RC-network according to Figure 10 and
the internal PWM unit.
VPWMI
Outputs OFF
VPWMI(H)
Internal PWM
VPWMI(L)
Outputs ON
t
OUTON
Figure 9
OUT - OFF
OUTON
OUT - OFF
OUTON
OUT - OFF
OUTON
OUT - OFF
PWMI operating voltages
The PWM Duty cycle (DC) and the PWM frequency can be adjusted using the formulas below. Please use only
typical values of VPWMI(L), VPWMI(H) and IPWMI(on) for the calculation of tPWMI(on) and tPWMI(off) (as described in
Pos. 6.3.12 to Pos. 6.3.15).
⎛ V PWMI ( H ) – I PWMI ( on ) ⋅ R PWMI⎞
-⎟
t PWMI ( on ) = –R PWMI ⋅ C PWMI ⋅ LN ⎜ ------------------------------------------------------------------------------⎝ V PWMI ( L ) – I PWMI ( on ) ⋅ R PWMI ⎠
(2)
⎛ V PWMI ( H )⎞
-⎟
t PWMI ( off ) = R PWMI ⋅ C PWMI ⋅ LN ⎜ ------------------------⎝ V PWMI ( L ) ⎠
(3)
1
f PWMI = --------------------------------------------------------t PWMI ( on ) + tPWMI ( off )
(4)
DC = tPWMI ( on ) ⋅ f PWMI
(5)
Out of this equations the required CPWMI and RPWMI can be calculated:
t
t
⎞ PWMI ( off )
PWMI ( on )
------------------------
⎛ V PWMI ( L )
– I PWMI ( on ) ⋅ t PWMI ( off ) ⋅ ⎜ --------------------------⎟
⎝ V PWMI ( H )⎠
–1
C PWMI = ------------------------------------------------------------------------------------------------------------------------------------------------------------------tPWMI ( on )
-----------------------⎛ V PWMI ( L ) ⎞
⎛ V PWMI ( L ) ⎞ t PWMI ( off )
LN ⎜ --------------------------⎟ ⋅ V PWMI ( L ) ⋅ ⎜ --------------------------⎟
– V PWMI ( H )
⎝ V PWMI ( H )⎠
⎝ V PWMI ( H )⎠
t PWMI ( off )
RPWMI = --------------------------------------------------------------⎛ V PWMI ( H )⎞
-⎟
C PWMI ⋅ LN ⎜ ------------------------⎝ V PWMI ( L ) ⎠
Data Sheet
(6)
(7)
14
Rev. 1.1, 2015-03-19
TLD1312EL
PWMI Pin
See Figure 10 for a typical external circuitry.
Note: In case of junction temperatures above Tj(CRT) (Pos. 8.2.14) the device provides a temperature dependent
current reduction feature as descirbed in Chapter 8.1.1. In case of output current reduction IIN_SET is reduced
as well, which leads to increased turn on-times tPWMI(on), because the CPWMI is charged slower. The turn offtime tPWMI(off) remains the same.
VBATT
VS
10kΩ
Internal
supply
EN
Output
control
Thermal
protection
OUT3
PWMI
OUT2
OUT1
IN_SET
RPWMI CPWMI
RSET
Current
adjust
CPWMI
Basic LED Driver
GND
GND
Figure 10
Typical circuit using internal PWM unit
6.3
Electrical Characteristics Internal Supply / EN / PWMI Pin
Electrical Characteristics Internal Supply / EN / PWMI pin
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
6.3.1
Current consumption,
sleep mode
IS(sleep)
6.3.2
Current consumption,
active mode
IS(on)
Limit Values
Min.
Typ.
Max.
–
0.1
2
Unit
Conditions
µA
1)
mA
–
–
–
–
–
–
1.4
0.75
1.5
VEN = 0.5 V
Tj < 85 °C
VS = 18 V
VOUTx = 3.6 V
2)
VPWMI= 0.5 V
IIN_SET = 0 µA
Tj < 105 °C
VS = 18 V
VOUTx = 3.6V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
Data Sheet
15
Rev. 1.1, 2015-03-19
TLD1312EL
PWMI Pin
Electrical Characteristics Internal Supply / EN / PWMI pin (cont’d)
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
6.3.3
Current consumption,
IS(dis,IN_SET)
device disabled via IN_SET
Limit Values
Min.
–
–
–
6.3.4
Current consumption,
device disabled via PWMI
Typ.
–
–
–
Unit
Conditions
mA
2)
Max.
Tj < 105 °C
VIN_SET = 5 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
1.4
0.7
1.4
IS(dis,PWMI)
mA
–
–
–
–
–
–
1.6
0.75
1.6
VS and EN-pin
2)
VS = 18 V
Tj < 105 °C
VPWMI= 3.4 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
VS = VEN = 0 → 13.5 V
VOUTx(nom) = 3.6 ± 0.3V
IOUTx = 80% IOUTx(nom)
VEN = 5.5 V
VOUTx = 3 V
IOUTx = 50% IOUTx(nom)
VEN = 5.5 V
VOUTx = 3.6 V
IOUTx ≥ 90% IOUTx(nom)
6.3.5
Power-on reset delay time 3) tPOR
–
–
25
µs
6.3.6
Required supply voltage for VS(on)
output activation
–
–
4
V
6.3.7
Required supply voltage for VS(CC)
current control
–
–
5.2
V
6.3.8
VEN(on)
EN turn off threshold
VEN(off)
EN input current during low IEN(LS)
–
–
2.5
V
–
0.8
–
–
V
–
–
–
1.8
mA
1)
6.3.9
6.3.10
EN turn on threshold
supply voltage
6.3.11
EN high input current
IEN(H)
mA
–
–
–
–
–
–
–
–
VS = 18 V
0.1
0.1
1.65
0.45
1)
VS = 4.5 V
Tj < 105 °C
VEN = 5.5 V
Tj < 105 °C
VS = 13.5 V, VEN = 5.5 V
VS = 18 V, VEN = 5.5 V
VS = VEN = 18 V
1)
VS = 18 V, REN = 10 kΩ
between VS and EN-pin
6.3.12
PWMI (active low)
Switching low threshold
(outputs on)
VPWMI(L)
1.5
1.85
2.3
V
1)4)
6.3.13
PWMI(active low)
Switching high threshold
(outputs off)
VPWMI(H)
2.45
2.85
3.2
V
1)4)5)
Data Sheet
16
VS = 8...18 V
VS = 8...18 V
Rev. 1.1, 2015-03-19
TLD1312EL
PWMI Pin
Electrical Characteristics Internal Supply / EN / PWMI pin (cont’d)
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
6.3.14
PWMI
ΔVPWMI
Switching threshold
difference VPWMI(H) - VPWMI(L)
6.3.15
PWMI (active low)
Low input current with
active channels (voltage
<VPWMI(L))
IPWMI(on)
PWMI(active low)
High input current
IPWMI(off)
6.3.16
1)
2)
3)
4)
5)
Symbol
Limit Values
Min.
Typ.
Max.
0.75
1
1.10
IIN_SET
IIN_SET *4 IIN_SET
*3.1
-5
Unit
Conditions
V
1)4)5)
µA
1)
*4.9
–
5
µA
VS = 8...18 V
Tj = 25...115 °C
IIN_SET = 100 µA
VPWMI= 1.7 V
VEN = 5.5 V
VS = 8...18 V
VPWMI= 5 V
VEN = 5.5 V
VS = 8...18 V
Not subject to production test, specified by design
The total device current consumption is the sum of the currents IS and IEN(H), please refer to Pos. 6.3.11
See also Figure 4
Parameter valid if an external PWM signal is applied
If TTL level compatibility is required, use µC open drain output with pull up resistor
Data Sheet
17
Rev. 1.1, 2015-03-19
TLD1312EL
IN_SET Pin
7
IN_SET Pin
The IN_SET pin is a multiple function pin for output current definition and input:
IN_SET
IIN_SET
VIN_SET
GND
Figure 11
Block Diagram IN_SET pin
7.1
Output Current Adjustment via RSET
The output current for all three channels can only be adjusted simultaneously. The current adjustment can be done
by placing a low power resistor (RSET) at the IN_SET pin to ground. The dimensioning of the resistor can be done
using the formula below:
kR SET = ---------I OUT
(8)
The gain factor k (RSET * output current) is specified in Pos. 8.2.4 and Pos. 8.2.5. The current through the RSET is
defined by the resistor itself and the reference voltage VIN_SET(ref), which is applied to the IN_SET during supplied
device.
7.2
Input Pin
The IN_SET pin can be connected via RSET to the open-drain output of a µC or to an external NMOS transistor as
described in Figure 12. This signal can be used to turn off the output stages of the IC. A minimum IN_SET current
of IIN_SET(act) is required to turn on the output stages. This feature is implemented to prevent glimming of LEDs
caused by leakage currents on the IN_SET pin, see Figure 14 for details.
Microcontroller
(e.g. XC866)
OUT
RSET
IN_SET
Current
adjust
TM
LITIX
Basic
LEDBasic
Driver
GND
VDDP = 5 V
Figure 12
Schematics IN_SET interface to µC
The resulting switching times are shown in Figure 13:
Data Sheet
18
Rev. 1.1, 2015-03-19
TLD1312EL
IN_SET Pin
IIN_ SET
tON (IN_ SET )
IOU T
t
tOFF(IN _ SET)
100%
80%
20%
t
Figure 13
Switching times via IN_SET
IOUT [mA]
k = IOUTx * VIN_SET(ref) / IIN_SETx
IOUTx
IIN_SET(ACT)
Figure 14
Data Sheet
IIN_SETx
IIN_SET [µA]
IOUT versus IINSET
19
Rev. 1.1, 2015-03-19
TLD1312EL
IN_SET Pin
7.3
Electrical Characteristics IN_SET Pin
Electrical Characteristics IN_SET pin
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
VIN_SET(ref)
7.3.1
IN_SET reference
voltage
7.3.2
IN_SET activation
IIN_SET(act)
current without turn on of
output stages
Limit Values
Unit
Conditions
Min.
Typ.
Max.
1.19
1.23
1.27
V
1)
2
–
15
µA
See Figure 14
VOUTx = 3.6 V
Tj = 25...115 °C
1) Not subject to production test, specified by design
Data Sheet
20
Rev. 1.1, 2015-03-19
TLD1312EL
Power Stage
8
Power Stage
The output stages are realized as high side current sources with a current of 120 mA. During off state the leakage
current at the output stage is minimized in order to prevent a slightly glowing LED.
The maximum current of each channel is limited by the power dissipation and used PCB cooling areas (which
results in the applications RthJA).
For an operating current control loop the supply and output voltages according to the following parameters have
to be considered:
•
•
•
Required supply voltage for current control VS(CC), Pos. 6.3.7
Voltage drop over output stage during current control VPS(CC), Pos. 8.2.6
Required output voltage for current control VOUTx(CC), Pos. 8.2.7
8.1
Protection
The device provides embedded protective functions, which are designed to prevent IC destruction under fault
conditions described in this data sheet. Fault conditions are considered as “outside” normal operating range.
Protective functions are neither designed for continuous nor for repetitive operation.
8.1.1
Over Load Behavior
An over load detection circuit is integrated in the LITIXTM Basic IC. It is realized by a temperature monitoring of the
output stages (OUTx).
As soon as the junction temperature exceeds the current reduction temperature threshold Tj(CRT) the output current
will be reduced by the device by reducing the IN_SET reference voltage VIN_SET(ref). This feature avoids LED’s
flickering during static output overload conditions. Furthermore, it protects LEDs against over temperature, which
are mounted thermally close to the device. If the device temperature still increases, the three output currents
decrease close to 0 A. As soon as the device cools down the output currents rise again.
IOU T
V IN_ SET
Tj (C R T)
Figure 15
Tj
Output current reduction at high temperature
Note: This high temperature output current reduction is realized by reducing the IN_SET reference voltage voltage
(Pos. 7.3.1). In case of very high power loss applied to the device and very high junction temperature the
output current may drop down to IOUTx = 0 mA, after a slight cooling down the current increases again.
8.1.2
Reverse Battery Protection
The TLD1312EL has an integrated reverse battery protection feature. This feature protects the driver IC itself, but
also connected LEDs. The output reverse current is limited to IOUTx(rev) by the reverse battery protection.
Data Sheet
21
Rev. 1.1, 2015-03-19
TLD1312EL
Power Stage
Note: Due to the reverse battery protection a reverse protection diode for the light module may be obsolete. In case
of high ISO-pulse requirements and only minor protecting components like capacitors a reverse protection
diode may be reasonable. The external protection circuit needs to be verified in the application.
8.2
Electrical Characteristics Power Stage
Electrical Characteristics Power Stage
Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40 °C to +150 °C, VOUTx = 3.6 V, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
8.2.1
Output leakage current
Typ.
Unit
Conditions
µA
VEN = 5.5 V
IIN_SET = 0 µA
VOUTx = 2.5 V
Tj = 150 °C
1)
Tj = 85 °C
1)
VEN = 5.5 V
IIN_SET = 0 µA
VOUTx = VS = 40 V
1)
VS = -16 V
Max.
IOUTx(leak)
–
–
–
–
7
3
8.2.2
Output leakage current in
boost over battery setup
–
IOUTx(leak,B2B)
–
50
µA
8.2.3
Reverse output current
-IOUTx(rev)
–
1
µA
–
Output load: LED with
break down voltage
< - 0.6 V
8.2.4
8.2.5
Output current accuracy
limited temperature range
Output current accuracy
over temperature
1)
kLT
697
645
750
750
803
855
697
645
750
750
803
855
kALL
8.2.6
Voltage drop over power
VPS(CC)
stage during current control
VPS(CC) = VS - VOUTx
0.75
–
–
V
8.2.7
Required output voltage for VOUTx(CC)
current control
2.3
–
–
V
8.2.8
Maximum output current
120
–
–
mA
IOUT(max)
Tj = 25...115 °C
VS = 8...18 V
VPS = 2 V
RSET = 6...12 kΩ
RSET = 30 kΩ
1)
Tj = -40...115 °C
VS = 8...18 V
VPS = 2 V
RSET = 6...12 kΩ
RSET = 30 kΩ
1)
VS = 13.5 V
RSET = 12 kΩ
IOUTx ≥ 90% of
(kLT(typ)/RSET)
1)
VS = 13.5 V
RSET = 12 kΩ
IOUTx ≥ 90% of
(kLT(typ)/RSET)
RSET = 4.7 kΩ
The maximum output
current is limited by the
thermal conditions.
Please refer to
Pos. 4.3.1 - Pos. 4.3.3
Data Sheet
22
Rev. 1.1, 2015-03-19
TLD1312EL
Power Stage
Electrical Characteristics Power Stage (cont’d)
Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40 °C to +150 °C, VOUTx = 3.6 V, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
8.2.9
PWMI turn on time
tON(PWMI)
Limit Values
Min.
Typ.
Max.
–
–
15
Unit
Conditions
µs
2)
VS = 13.5 V
RSET = 12 kΩ
PWMI → L
8.2.10
PWMI turn off time
tOFF(PWMI)
–
–
10
µs
IOUTx = 80% of
(kLT(typ)/RSET)
2)
VS = 13.5 V
RSET = 12 kΩ
PWMI → H
8.2.11
IN_SET turn on time
tON(IN_SET)
–
–
15
µs
8.2.12
IN_SET turn off time
tOFF(IN_SET)
–
–
10
µs
8.2.13
VS turn on time
tON(VS)
–
–
20
µs
8.2.14
Current reduction
temperature threshold
Tj(CRT)
–
140
–
°C
8.2.15
Output current during
current reduction at high
temperature
IOUT(CRT)
85% of –
(kLT(typ)/
RSET)
–
A
IOUTx = 20% of
(kLT(typ)/RSET)
VS = 13.5 V
IIN_SET = 0 → 100 µA
IOUTx = 80% of
(kLT(typ)/RSET)
VS = 13.5 V
IIN_SET = 100 → 0 µA
IOUTx = 20% of
(kLT(typ)/RSET)
1) 3)
VEN = 5.5 V
RSET = 12 kΩ
VS = 0 → 13.5 V
IOUTx = 80% of
(kLT(typ)/RSET)
1)
IOUTx = 95% of
(kLT(typ)/RSET)
1)
RSET = 12 kΩ
Tj = 150 °C
1) Not subject to production test, specified by design
2) see also Figure 8
3) see also Figure 6
Data Sheet
23
Rev. 1.1, 2015-03-19
TLD1312EL
Application Information
9
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
Vbat
BCM
PROFET
VBB
channel 1
load current
sense
internal
power
supply
logic
multi step
load current
limitation
open load
detection
IN1
IS1
clamp for
inductive load
gate control
&
charge pump
ESD
protection
OUT1
temperature
sensor
SEN
channel 2
control and protection circuit
equivalent to
channel 1
IN2
IS2
OUT2
R GND
GND
TAIL
Rear Light assembly
Cmod =2.2µF
CVS =4.7nF
CVS=4.7nF
ISO -Pulse
protection circuit
depending on
requirements
Internal
supply
EN
Thermal
protection
Output
control
PWMI
4.7nF**
BRAKE
4.7nF**
VS
10kΩ
CVS =4.7nF
VS
10kΩ
4.7nF**
Internal
supply
EN
Thermal
protection
OUT3
PWMI
OUT2
RPWMI CPWMI
RSET
GND
Figure 16
GND
4.7nF** 4.7nF** 4.7nF**
Thermal
protection
OUT3
PWMI
OUT2
RSET
GND
4.7nF** 4.7nF** 4.7nF**
OUT3
OUT1
IN_SET
Current
adjust
Basic
LITIXTMLED
Basic Driver
Output
control
OUT2
OUT1
IN_SET
Current
adjust
Basic
LITIXTMLED
Basic Driver
Internal
supply
EN
Output
control
OUT1
IN_SET
VS
10kΩ
RSET
Current
adjust
Basic
LITIXTMLED
Basic Driver
GND
** For EMI improvement, if required.
System Diagram internal PWM generation
Note: This is a very simplified example of an application circuit. In case of high ISO-pulse requirements a reverse
protection diode may be used for LED protection. The function must be verified in the real application.
9.1
•
Further Application Information
For further information you may contact http://www.infineon.com/
Data Sheet
24
Rev. 1.1, 2015-03-19
TLD1312EL
Package Outlines
10
Package Outlines
0.19 +0.06
0.08 C
0.15 M C A-B D 14x
0.64 ±0.25
1
8
1
7
0.2
M
D 8x
Bottom View
3 ±0.2
A
14
6 ±0.2
D
Exposed
Diepad
B
0.1 C A-B 2x
14
7
8
2.65 ±0.2
0.25 ±0.05 2)
0.1 C D
8˚ MAX.
C
0.65
3.9 ±0.11)
1.7 MAX.
Stand Off
(1.45)
0 ... 0.1
0.35 x 45˚
4.9 ±0.11)
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion
Dimensions in mm
PG-SSOP-14-1,-2,-3-PO V02
Figure 17
PG-SSOP14
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Data Sheet
25
Rev. 1.1, 2015-03-19
TLD1312EL
Revision History
11
Revision History
Revision
Date
Changes
1.0
2013-08-08
Inital revision of data sheet
1.1
2015-03-19
Updated parameters KLT and KALL in the chapter Power Stage.
Data Sheet
26
Rev. 1.1, 2015-03-19
Edition 2015-03-19
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2015 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
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For further information on technology, delivery terms and conditions and prices, please contact the nearest
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