Data Sheet

74LV244-Q100
Octal buffer/line driver (3-state)
Rev. 1 — 19 May 2014
Product data sheet
1. General description
The 74LV244-Q100 is a low-voltage Si-gate CMOS device and is pin and function
compatible with 74HC244-Q100 and 74HCT244-Q100.
The 74LV244-Q100 is an octal non-inverting buffer/line driver with 3-state outputs. The
output enable inputs 1OE and 2OE control the 3-state outputs. A HIGH on nOE causes
the outputs to assume a high impedance OFF-state.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)
 Specified from 40 C to +85 C and from 40 C to +125 C
 Wide operating voltage: 1.0 V to 5.5 V
 Optimized for low voltage applications: 1.0 V to 3.6 V
 Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
 Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V; Tamb = 25 C
 Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V; Tamb = 25 C
 Complies with JEDEC standard no. 7A
 ESD protection:
 MIL-STD-883, method 3015 exceeds 2000 V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74LV244D-Q100
40 C to +125 C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74LV244PW-Q100
40 C to +125 C
TSSOP20 plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
SOT360-1
74LV244-Q100
NXP Semiconductors
Octal buffer/line driver (3-state)
4. Block diagram
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Fig 1.
Functional diagram
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Fig 2.
Logic symbol
74LV244-Q100
Product data sheet
PQD
Fig 3.
IEC logic symbol
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 May 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
2 of 14
74LV244-Q100
NXP Semiconductors
Octal buffer/line driver (3-state)
5. Pinning information
5.1 Pinning
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Fig 4.
Pin configuration SO20 and TSSOP20
5.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
1OE, 2OE
1, 19
output enable input (active LOW)
1A0, 1A1, 1A2, 1A3
2, 4, 6, 8
data input
2Y0, 2Y1, 2Y2, 2Y3
3, 5, 7, 9
bus output
GND
10
ground (0 V)
2A0, 2A1, 2A2, 2A3
17, 15, 13, 11
data input
1Y0, 1Y1, 1Y2, 1Y3
18, 16, 14, 12
bus output
VCC
20
supply voltage
6. Functional description
Table 3.
Function table[1]
Input
Output
nOE
nAn
nYn
L
L
L
L
H
H
H
X
Z
[1]
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
74LV244-Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 May 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
3 of 14
74LV244-Q100
NXP Semiconductors
Octal buffer/line driver (3-state)
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
0.5
+7.0
V
IIK
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
-
20
mA
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
-
50
mA
IO
output current
0.5 V < VO < VCC + 0.5 V
-
35
mA
ICC
supply current
-
70
mA
IGND
ground current
70
-
mA
Tstg
storage temperature
65
+150
C
Ptot
total power dissipation
Tamb = 40 C to +125 C
SO20
[1]
-
500
mW
TSSOP20
[2]
-
400
mW
[1]
For SO20 packages: Ptot derates linearly with 8 mW/K above 70 C.
[2]
For TSSOP20 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
8. Recommended operating conditions
Table 5.
Symbol
Operating conditions
Parameter
VCC
supply voltage
Conditions
[1]
Min
Typ
Max
Unit
1.0
3.3
5.5
V
VI
input voltage
0
-
VCC
V
VO
output voltage
0
-
VCC
V
Tamb
ambient temperature
40
-
+85
C
40
-
+125
C
t/V
[1]
input transition rise and fall VCC = 1.0 V to 2.0 V
rate
VCC = 2.0 V to 2.7 V
0
-
500
ns/V
0
-
200
ns/V
VCC = 2.7 V to 3.6 V
0
-
100
ns/V
VCC = 3.6 V to 5.5 V
0
-
50
ns/V
The LV is guaranteed to function down to VCC = 1.0 V (input levels GND or VCC). DC characteristics are guaranteed from VCC = 1.2 V to
VCC = 5.5 V.
74LV244-Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 May 2014
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74LV244-Q100
NXP Semiconductors
Octal buffer/line driver (3-state)
9. Static characteristics
Table 6.
Static characteristics
Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
HIGH-level
input voltage
VIH
LOW-level
input voltage
VIL
VOH
40 C to +85 C
Conditions
40 C to +125 C
Unit
Min
Typ[1]
Max
Min
VCC = 1.2 V
0.9
-
-
0.9
V
VCC = 2.0 V
1.4
-
-
1.4
V
VCC = 2.7 V to 3.6 V
2.0
-
-
2.0
V
VCC = 4.5 V to 5.5 V
0.7VCC
-
-
0.7VCC
V
Max
VCC = 1.2 V
-
-
0.3
0.3
V
VCC = 2.0 V
-
-
0.6
0.6
V
VCC = 2.7 V to 3.6 V
-
-
0.8
0.8
V
VCC = 4.5 V to 5.5 V
-
-
0.3VCC
0.3VCC
V
-
1.2
-
-
-
V
VCC = 2.0 V
1.8
2.0
-
1.8
-
V
VCC = 2.7 V
2.5
2.7
-
2.5
-
V
VCC = 3.0 V
2.8
3.0
-
2.8
-
V
VCC = 4.5 V
4.3
4.5
-
4.3
-
V
VCC = 3.0 V; IO = 8 mA
2.40
2.82
-
2.20
-
V
VCC = 4.5 V; IO = 16 mA
3.60
4.20
-
3.50
-
V
-
0
-
-
-
V
VCC = 2.0 V
-
0
0.2
-
0.2
V
VCC = 2.7 V
-
0
0.2
-
0.2
V
VCC = 3.0 V
-
0
0.2
-
0.2
V
VCC = 4.5 V
-
0
0.2
-
0.2
V
VCC = 3.0 V; IO = 8 mA
-
0.25
0.40
-
0.50
V
HIGH-level
VI = VIH or VIL; IO = 100 A
output voltage
VCC = 1.2 V
VI = VIH or VIL
LOW-level
VI = VIH or VIL; IO = 100 A
output voltage
VCC = 1.2 V
VOL
VCC = 4.5 V; IO = 16 mA
-
0.35
0.55
-
0.65
V
II
input leakage
current
VCC = 5.5 V; VI = VCC or GND
-
-
1.0
-
1.0
A
IOZ
OFF-state
output current
VCC = 3.6 V; VI = VIH or VIL;
VO = VCC or GND
-
-
5
-
10
A
ICC
supply current VCC = 5.5 V; VI = VCC or GND;
IO = 0 A
-
-
20
-
160
A
ICC
additional
per input; VCC = 2.7 V to 3.6 V;
supply current VI = VCC  0.6 V
-
-
500
-
850
A
CI
input
capacitance
-
3.5
-
-
-
pF
[1]
All typical values are measured at Tamb = 25 C.
74LV244-Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 May 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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74LV244-Q100
NXP Semiconductors
Octal buffer/line driver (3-state)
10. Dynamic characteristics
Table 7.
Dynamic characteristics
GND (ground = 0 V); for test circuit, see Figure 7
Symbol
Parameter
propagation delay
tpd
40 C to +85 C
Conditions
Min
Typ[1]
VCC = 1.2 V
-
50
VCC = 2.0 V
-
17
VCC = 2.7 V
-
VCC = 3.0 V to 3.6 V
-
VCC = 3.3 V; CL = 15 pF
Min
Max
-
-
ns
24
-
31
ns
13
17
-
23
ns
9
14
-
18
ns
-
8.0
-
-
-
ns
-
-
12
-
15
ns
VCC = 1.2 V
-
65
-
-
-
ns
VCC = 2.0 V
-
22
39
-
49
ns
1An to 1Yn; 2An to 2Yn;
see Figure 5
enable time
1OE to 1Yn; 2OE to 2Yn;
see Figure 6
[2]
VCC = 2.7 V
-
16
29
-
36
ns
VCC = 3.0 V to 3.6 V
-
12
23
-
29
ns
-
-
19
-
24
ns
VCC = 1.2 V
-
60
-
-
ns
VCC = 2.0 V
-
22
34
-
43
ns
VCC = 2.7 V
-
17
24
-
32
ns
VCC = 3.0 V to 3.6 V
-
13
21
-
26
ns
VCC = 4.5 V to 5.5 V
-
-
16
-
19
ns
-
35
-
-
-
ns
VCC = 4.5 V to 5.5 V
disable time
tdis
power dissipation
capacitance
CPD
Max
[2]
VCC = 4.5 V to 5.5 V
ten
40 C to +125 C Unit
1OE to 1Yn; 2OE to 2Yn;
see Figure 6
VI = GND to VCC; VCC = 3.3 V
[2]
[3]
[1]
Unless otherwise stated, all typical values are measured at Tamb = 25 C and nominal VCC.
[2]
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3]
CPD is used to determine the dynamic power dissipation PD = CPD  VCC2  fi + (CL  VCC2  fo) (PD in W), where:
fi = input frequency in MHz;
fo = output frequency in MHz;
 (CL  VCC2  fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in V.
74LV244-Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 May 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
6 of 14
74LV244-Q100
NXP Semiconductors
Octal buffer/line driver (3-state)
11. Waveforms
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Q$QLQSXW
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90
90
W3/+
W3+/
92+
90
Q<QRXWSXW
92/
90
PQD
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5.
Input (nAn) to output (nYn) propagation delays
9,
Q2(LQSXW
90
*1'
W 3/=
W 3=/
9&&
Q<QRXWSXW
/2:WR2))
2))WR/2:
90
9;
92/
W 3=+
W 3+=
92+
9<
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+,*+WR2))
2))WR+,*+
*1'
90
RXWSXWV
HQDEOHG
RXWSXWV
GLVDEOHG
RXWSXWV
HQDEOHG
DDH
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6.
Table 8.
3-state enable and disable times
Measurement points
Supply voltage
Input
Output
VCC
VM
VM
VX
VY
< 2.7 V
0.5VCC
0.5VCC
VOL + 0.1VCC
VOH  0.1VCC
2.7 V to 3.6 V
1.5 V
1.5 V
VOL + 0.3 V
VOH  0.3 V
 4.5 V
0.5VCC
0.5VCC
VOL + 0.1VCC
VOH  0.1VCC
74LV244-Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 May 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
7 of 14
74LV244-Q100
NXP Semiconductors
Octal buffer/line driver (3-state)
W:
9,
QHJDWLYH
SXOVH
90
90
9
WI
WU
WU
WI
9,
SRVLWLYH
SXOVH
90
90
9
W:
9(;7
9&&
*
9,
5/
92
'87
57
5/
&/
DDH
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 7.
Table 9.
Test circuit for measuring switching times
Test data
Supply voltage
Input
VCC
VI
tr, tf
CL
RL
tPHL, tPLH
tPZH, tPHZ
tPZL, tPLZ
< 2.7 V
VCC
 2.5 ns
50 pF
1 k
open
GND
2VCC
2.7 V to 3.6 V
2.7 V
 2.5 ns
15 pF, 50 pF
1 k
open
GND
2VCC
 4.5 V
VCC
 2.5 ns
50 pF
1 k
open
GND
2VCC
74LV244-Q100
Product data sheet
Load
VEXT
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 May 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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74LV244-Q100
NXP Semiconductors
Octal buffer/line driver (3-state)
12. Package outline
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74LV244-Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 May 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
9 of 14
74LV244-Q100
NXP Semiconductors
Octal buffer/line driver (3-state)
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Package outline SOT360-1 (TSSOP20)
74LV244-Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 May 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
10 of 14
74LV244-Q100
NXP Semiconductors
Octal buffer/line driver (3-state)
13. Abbreviations
Table 10.
Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MIL
Military
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 11.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74LV244_Q100 v.1
20140519
Product data sheet
-
-
74LV244-Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 May 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
11 of 14
74LV244-Q100
NXP Semiconductors
Octal buffer/line driver (3-state)
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74LV244-Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 May 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
12 of 14
74LV244-Q100
NXP Semiconductors
Octal buffer/line driver (3-state)
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74LV244-Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 May 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
13 of 14
NXP Semiconductors
74LV244-Q100
Octal buffer/line driver (3-state)
17. Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
11
12
13
14
15
15.1
15.2
15.3
15.4
16
17
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11
Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Contact information. . . . . . . . . . . . . . . . . . . . . 13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2014.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 May 2014
Document identifier: 74LV244-Q100