Application Note: SCM1100M Series High Voltage 3 Phase Motor Drivers

Product Information
SCM1100M Series High Voltage 3 Phase Motor Drivers
Introduction
The SCM1100M is a high voltage three-phase motor driver
IC for 85 to 253 VAC input, middle output power motor
driver systems. IGBTs, diodes, and controller ICs are all
housed in the proprietary SCM package (figure 1), and the
protection circuits enhance system-level reliability.
Features and benefits include the following:
▪ Each half-bridge circuit consists of a pre-driver circuit that
is completely independent from the others
▪ Protection against simultaneous high- and low-side turn-on (STP)
▪ Bootstrap diodes with series resistors for suppressing
inrush current are incorporated
▪ CMOS compatible input (3.3 to 5 V)
▪ Designed to minimize simultaneous current through both
high- and low-side IGBTs by optimizing gate drive resistors
▪ UVLO protection with auto restart
▪ Overcurrent protection with off-time period adjustable by
an external capacitor
▪ Fault (FO indicator) signal output at protection activation:
UVLO (low side only), OCP, and STP
▪ Proprietary power DIP package
▪ UL Recognized Component (File No.: E118037)
The product lineup for the SCM1100M series provides the
following options for motor driving applications:
Part Number
IGBT Rating
Remarks
SCM1101M
600 V / 10 A
Low saturation voltage
SCM1103M
600 V / 5 A
Low saturation voltage
SCM1104M
600 V / 8 A
Low saturation voltage
SCM1104MF
600 V / 8 A
Low saturation voltage
SCM1105MF
600 V / 15 A
Low saturation voltage
SCM1106M
600 V / 10 A
High speed
SCM1106MF
600 V / 10 A
High speed
SCM1110MF
600 V / 15 A
High speed
Figure 1. SCM1100M Series packages are fully molded DIPs, For
10 to 15 A (suffix F) variants, a copper heat dissipation pad is
attached to the upper surface of the case.(left); for 5 to 10 A devices,
the standard case is available (right).
stands for inverter power module, a technology that has now
become prominent in the marketplace, and for Sanken, it
highlights a broad variety of high voltage, three-phase motor
driver ICs targeted at the residential white goods (home
appliance) and commercial three-phase motor market segments, such as: air conditioners, refrigerators, and washing
machines.
Sanken IPM devices are particularly well-suited to applications in variable speed control systems and power inverter
systems. Sanken has developed a great deal of expertise
in these markets, which have become mature in certain
areas due to governmental regulations, and are emerging in
many other marketplaces. Demand for these applications is
expected to increase rapidly in the near future, due to commercial economic pressures and governmental regulations
mandating the use of energy-conserving technologies.
Contents
Energy-Conserving Technology
The SCM1100M series is one of the expanding IPM product
lines being offered by the Sanken Electric Company. IPM
All performance characteristics given are typical values for
circuit or system baseline design only and are at the nominal
operating voltage and an ambient temperature of 25°C, unless otherwise stated.
38100, Rev. 3
Introduction
Energy-Conserving Technology
Rapid Redesign Support
Robust Device Design
Pin Functional Descriptions
Protection Circuits
Precautions
Application Circuit
Characteristic Performance Data
Output Characteristic Performance Data
1
1
2
2
2
4
5
6
7
9
Rapid Redesign Support
IPM type ICs are gradually becoming prevalent for controlling
motors in residential and commercial laundry washing machines.
In this application, the ICs replace several discrete components, thus saving application space and design effort. In many
instances, IPM devices yield the lowest overall cost solution,
especially in the current regulatory environment, which is forcing manufacturers to redesign their power management systems.
Traditional discrete-device topologies are proving difficult to
adapt to these applications, and manufacturers can take advantage
of rapid design solutions using the highly integrated topologies
offered by IPM types of devices. Sanken Electric IPMs optimally
fulfill such market needs with products that integrate our latest technologies inside a single package. Simplified Design for
Application Circuits
The SCM1100M series supports the 3-shunt method, in which
a shunt resistor is used in each phase. This enables small currents to be detected, and highly accurate inverter control to be
achieved, thus contributing to low motor noise. In addition, each
of the three phases contains an overcurrent protection circuit, and
a function that prevents simultaneous turn-on of both the highside and low-side IGBTs.
Overall, use of the SCM1100M series with the 3-shunt method
allows a 15% reduction in the area of the application print circuit
board used for the main circuit of the inverter, and a reduction in
the quantity of components of about 50%. With these and many
other designer-friendly features, the SCM1100M series allows a
highly reliable inverter main circuit to be designed using only a
small number of external components.
allowing stable control to be achieved. It also avoids consecutive
short-circuits when OCP protection mode is released.
The OCP mode also features soft turn-off at power-down during
an overcurrent event. This minimizes negative voltage impinging
on the LS terminal, by restraining di/dt. This protects the IC from
failure due to reverse voltage there and on the external current
sense circuit.
All three drive phases can be simultaneously brought to a complete stop (all three gates turned off) during protection modes.
This can be implemented by connecting the 3 failure signal
output terminals externally. The FO terminal is also used as
an enable input. Failure signal output continues during protection modes: CMOS logic circuit operation continues, as well as
UVLO during OCP and STP modes.
Pin Functional Descriptions
This section describes the features of the SCM1100M devices in
order by pin function. Refer to figure 2 for a block diagram of the
devices.
U, V, and W. These pins are the outputs of the individual IC
phases, and serve as the connection terminals to the 3 phase
motor that is being driven.
VB1, VB2, and VB3. Circuit main supply inputs that drive
high-side IGBTs. Serve as terminals for the bootstrap capacitors,
CBOOT, for each phase. The bootstrap circuits are floated during
operation, thus each half-bridge circuit needs one bootstrap
circuit, and it is recommended to place CBOOT as close to the IC
as possible (see figure 2).
Robust Device Design
HS
Several built-in features allow the SCM1100M series to support a
more dependable overall application.
VB
A built-in high-voltage bootstrap diode is built-in, simplifying
trace layout on the application PCB by reducing component
count, and eliminating the corresponding adequate creepage
distance.
An in-rush current-absorbing resistor provides built-in protection (STP) circuit against high-sde/low-side simultaneous on
(shoot-through). In addition, employing a pre-driver for each
half-bridge, prevents high/low simultaneous ON due to erroneous
command signal input or external noise.
The embedded pre-driver for each half-bridge ensures short input
dead-time. This optimizes the switching speed of high/low sides,
VBB
HO
UV
VCC
Input
Detect
HIN
Logic
Level
LIN
&
Shift
Drive
Circuit
U, V, or W
Shoot
Through
Prevention
UV
Detect
COM
FO
O .C .
Drive
LS
Protect
CFO
LO
Circuit
HVIC
Figure 2. SCM1100M Series Phase Block Diagram. These devices support
three phases, referred to as U, V, and W. One of three phases is shown in
the diagram.
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115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
2
At the beginning of operation, during the startup period, this
capacitor needs to be fully charged by turning on the low-side
IGBT. The capacitance of the individual capacitors can be
calculated by the following formulas, and whichever resulting
capacitance value is larger should be chosen:
CBOOT (μF) > 800 ×tLoff (s) ,
or
CBOOT = 0.1 μF ,
where TLoff is the maximum off-period of the low-side IGBT, in
seconds, corresponding to the non-charging period of CBOOT.
The gate driver circuit consumes current even if the high-side
IGBT is not on, and the voltage across CBOOT goes down.
Therefore, make sure that that sufficient voltage is maintained
across CBOOT during low frequency operation, such as the
startup period. In addition, capacitance tolerance needs to be
taken into account in selecting the CBOOT value, and it is
strongly recommended to optimize the value of CBOOT through
actual board tests to make sure UVLO circuits for VB1, VB2 and
VB3 are not activated.
HS1, HS2, and HS3. These pins are internally connected to the
U, V, and W pins. The negative node of corresponding CBOOT is
connected to the pin.
VCC1, VCC2, and VCC3. These pins are logic supply inputs.
To prevent malfunctioning of operation from ripple voltage
on supply voltage input, it is recommended to place a ceramic
capacitor (> 0.01 μF) as close to the pin as possible.
COM1, COM2, and COM3. These are logic GND pins of the
incorporated pre-driver chips. In order to drive and control the
internal IGBTs properly, these should be connected as close to
the LSx pins as possible.
CBOOT
VB
VCC
VBB
Rboot
VBB
Dboot
CBOOT
U,V,W
High Side &
Low Side
SCM1100 M 1 phase of 3
LS
Figure 3. Bootstrap Circuit. Each of the three phases has an independent
bootstrap circuit. The CBOOT circuit for one phase is shown above.
HIN1, HIN2, HIN3, LIN1, LIN2, and LIN3. These are gate
driver control pins, and are 5 V CMOS compatible, with Schmitt
trigger circuits. These are active high, and have internal pulldown 100 kW resistors. In case of high noise interference or
unstable input logic status, it is recommended to use external
filter circuits or additional pull-down resistors. The equivalent
circuits are shown in figure 5.
VBB1, VBB2, and VBB3. These are the main supply inputs.
Place bypass capacitors and also film capacitors for snubber
circuits of approximately 0.1 μF at each pin, in order to suppress
surge voltage. In addition, it is recommended to shorten the PCB
traces for those pins to a minimum.
25
33
Branded Side
24
1
Figure 4. SCM1100M Series Pin-out Diagram. The pin assignments are
listed in the table below.
Terminal List Table
Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Number
FO1
CFO1
LIN1
COM1
HIN1
VCC1
VB1
HS1
FO2
CFO2
LIN2
COM2
HIN2
VCC2
VB2
HS2
FO3
CFO3
LIN3
COM3
HIN3
VCC3
VB3
HS3
VBB
W
LS3
VBB
V
LS2
VBB
U
33
LS1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Function
U phase fault output for overcurrent and UVLO detected
Capacitor for U phase overcurrent protection hold time
Signal input for low-side U phase (active high)
Supply ground for U phase IC
Signal input for high-side U phase (active high)
Supply voltage for U phase IC
High-side floating supply voltage for U phase
High-side floating supply ground for U phase
V phase fault output for overcurrent and UVLO detected
Capacitor for V phase overcurrent protection hold time
Signal input for low-side V phase (active high)
Supply ground for V phase IC
Signal input for high-side V phase (active high)
Supply voltage for V phase IC
High-side floating supply voltage for V phase
High-side floating supply ground for V phase
W phase fault output for overcurrent and UVLO detected
Capacitor for W phase overcurrent protection hold time
Signal input for low-side W phase (active high)
Supply ground for W phase IC
Signal input for high-side W phase (active high)
Supply voltage for W phase IC
High-side floating supply voltage for W phase
High-side floating supply ground for W phase
Positive DC bus supply voltage
Output for W phase
Negative DC bus supply ground for W phase
Cut-pin ( positive DC bus supply voltage)
Output for V phase
Negative DC bus supply ground for V phase
Cut-pin ( positive DC bus supply voltage)
Output for U phase
Negative DC bus supply ground for U phase
3
LS1, LS2, and LS3. These are inverter GND terminals
and a shunt resistor for monitoring current should be placed
between those pins and the COM pins. Trace length between the
correpsonding current sensing resistor and LSx pin should be as
short as possible, otherwise, malfunctioning may occur.
CFO1, CFO2, and CFO3. In the event of the overcurrent
protection enabling, both high- and low-side drivers are turned
off. The overcurrent protection off-time period is adjusted by
the external capacitors at those pins. See the Protection Circuits
section for more details.
FO. This pin is pulled down in the event of the protection circuits
enabling; UVLO, OCP, or STP (Simultaneous high- and low-side
turning on) being activated; or both high- and low-side IGBTs
being turned off.
Figure 6 shows the internal circuit of the FO pin, which must
be pulled-up by an external pull-up resistor because of the open
drain structure. The sink current is limited to 5 mA. In addition,
the FO pin potential is monitored by the internal circuit and when
its potential is pulled down externally, it shuts off the circuit.
Therefore, by tying the three FO pins together, it can shut off all
phases if even one of the phase protection circuits is activated.
It is recommended to place a capacitor CN (<0.01 μF) near those
pins to prevent malfunctioning from noise interference.
5V
HIN
LIN
2 kΩ
Protection Circuits
This section describes the various protection cricuits provided in
the SCM1100M series.
Undervoltage Lockout (UVLO). The UVLO circuit is
integrated to protect the IGBT from being driven by low gate
driving voltage due to insufficient main supply voltage of the
gate driver circuit. The UVLO circuit timing chart is shown in
figure 7.
When the boot voltage (between VB and VS) becomes less than
UVHL, the high-side IGBT turns off. However, the FO pin is not
pulled down. After that, when the boot voltage returns to the
normal operating voltage range, it automatically restarts at the
first rising edge of the control input signal.
When VCC voltage becomes less than UVLL threshold, both
high- and low-side IGBTs are turned off, and the FO pin is pulled
down. After it recovers to the normal operating voltage, FO is
raised by the pull-up resistor, and the IGBT is turned on at the
next rising edge of each corresponding input.
Simultaneous High- and Low-Side On Protection (STP).
This circuit protects the high- and low-side IGBTs against the
event of both the low- and high-side inputs being high, or a
malfunction turning on both IGBTs because of noise interference.
In that case, the FO pin is pulled down.
Overcurrent Protection (OCP). The overcurrent protection
circuit monitors the voltage across the external current sensing
resistor, and when it reaches the threshold voltage of 0.5 V
(VTRIP) and remains there longer than 2 μs, OCP shuts off both
high- and low-side IGBTs. The OCP timing is shown in figure 8.
It is possible to adjust the off-time duration by an external
capacitor at the CFO pin (see figure 9 for the circuit at the CFO
pin, and figure 10 for timing effects). In that case, the current
sensing resistor is dedicated to its respective output, and if only
100
kΩ
COM
Hside- Driver I/O Timing Diagrams
Figure 5. Logic Inputs. The HIN and LIN internal equivalent circuits are
illustrated.
5V
HIN
LIN
UVHL
VB- HS
FO
UVHH
* Start from positive edge
after UVLO release .
HO
2 kΩ
LO
FO
* No output at H-side UVLO
*VCC = 15 V
COM
Figure 6. Fault Circuit Inputs. The internal circuits of the FO pins are
illustrated.
Figure 7. Undervoltage Protection (UVLO) timing diagram.
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115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
4
one of them is activated, only the corresponding phase circuit
is turned off. During the off-time period, the FO pin remains
low, and the phase circuit remains off, regardless of any input
signals to the HIN and LIN pins. The OCP circuit is integrated in
each phase circuit, and protects each phase circuit individually.
However; as explained before, by tying the FO pins together, it
is possible to shut off all phase circuits when one of the phases’
OCP circuit is activated. See the Application Circuit section for
more details. After being shutoff by OCP, and the CFO duration
is passed, FO is pulled-up by the external resistor, and the IGBTs
are enabled for activattion, but it only occurs at the rising edge of
the HIN and LIN inputs.
The value for the shunt (current sensing) resistor, RS , can be
calculated as follows:
RS (Ω) = 0.5 V / ITRIP(typ.) A – 0.0035 ,
where 0.0035 is the SCM1100 internal wiring resistance. For
example, if ITRIP(typ.) = 10 A, then
0.5 V /10 A – 0.0035 = 0.0465 Ω .
Note: The formula above does not include any parasitic resistance
of the PCB traces.
It is recommended to use a less than 10 nF capacitor, otherwise,
the formulas above are not applicable.
Precautions
Power-up Sequence. Make sure proper VCC voltage is
secured before applying logic high to HIN and LIN. When
powering down, apply logic low to all HIN and LIN pins, and
then turn off VCC.
Short Circuit. Output short circuit (load short, short to GND)
protection is not integrated, therefore; make sure such conditions
are not applied to the IC.
PCB Trace Length. Circuit traces around the IC should be as
short as possible. If the lengths are long, it may cause not only
malfunctioning, but also IC breakdown because of surge voltage
resulting from parasitic inductance of the traces.
Surge Voltage. Surge voltage superimposed on the inputs
should be suppressed by capacitors. Otherwise, it could cause
malfunctioning or IC breakdown in worst case scenarios.
The OCP off-time setting capacitors can be configured as either
one common capacitor for all three CFOx pins, or as a separate
capacitor for each CFOx pin. The value for each configuration
can be calculated as follows,
5V
2 μA
for one common capacitor:
CFO
20Ω
toff(min) = tmin ms = 0.31 × CFO nF , and
for three individual capacitors:
COM
toff(min) = tmin ms = 0.93 × CFO nF .
2 kΩ
FO
Overcurrent Protection
Figure 9. Overcurrent Protection (OCP) timing diagram.
LIN
IGBT turns off softly after
overcurrent condition is detected
VB- HS
VCC
1.5
)2
TA = 25°C
1.0
.)
(Typ
arate
(Min.)
rate
Sepa
Sep
'XUDWLRQ
LS
PV
BlankingTime
(2 μs typ.)
0.5
Common
(Typ.)
)
Common (Min.
FO
CFO
0
Vrc
(3.5 V typ.)
&)2Q)
The slope depends on
OCP Assist Timer
CFO capacitance
(2 μs min.)
* Off operation of all phases can be done by wired OR system
with the three FO pins short circuited
Figure 8. Overcurrent Protection (OCP) timing diagram.
Figure 10. CFO Off-Time Duration versus CFO Capacitance. Shown for
common and separate capacitor configurations.
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115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
5
Input Dead-Time. Ensure a dead time between high- and
low-side turn on and turn off to avoid simultaneous current flow
through the high- and low-side IGBTs. It is recommended that
the dead time be longer than 2 μs. The IC itself does not have an
integrated dead time circuit.
HS1
Application Circuit
The following diagram applies for a common current sensing
shunt resistor for the three phases.
SCM 1106 M
8
CBOOT1
7
31
VBB
32
U
VB1
VCC1
6
HIN1
5
LIN1
3
4
FO1
1
HS2
&
Shoot
Through
Prevention
COM1
CFO1
Input
Logic
UV
Detect
Level
Shift
HO
Drive
Circuit
UV
Detect
O.C.
Protect
2
Drive
LO
Circuit
33 LS1
HVIC 1
16
CBOOT2
15
28
VBB
29
V
VB2
VCC2
C o n t r o lle r
HIN2
LIN2
COM2
FO2
CFO2
HS3
14
13
11
HO
UV
Input
Logic
&
Shoot
Through
Prevention
12
9
Detect
Level
Shift
UV
Detect
O.C.
Protect
10
Drive
Circuit
Drive
Circuit
M
LO
30 LS2
HVIC 2
24
CBOOT3
25
23
VBB
VB3
VCC3
22
HIN3
21
LIN3
19
VFO
COM3
RFO
CN
&
Shoot
Through
Prevention
20
FO3 17
CFO3
Input
Logic
18
UV
Detect
Level
Shift
HO
Drive
Circuit
26 W
UV
Detect
O.C.
Protect
Drive
LO
Circuit
VBB
27 LS3
HVIC 3
VCC
RS
CFO
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
6
Characteristic Performance Data
The following data is applicable to all of the SCM1100M series.
SCM1100M ICC-Tj(3 phase)
1
VCC=15 V
MAX
6
TYP
MIN
4
VB-HS=15V
80
Iboot[μA]
8
ICC[mA]
SCM1100M IBoot-Tj(Single phase)
100
2
MAX
60
TYP
MIN
40
20
0
0
0
-25
2
5
7
Tj[°C]
10
12
15
-25
0
IN=5V
IIN[μA]
80
TYP
60
MIN
40
20
0
25
50
75
Tj[°C]
100 125
3
0
-25
150
0
25
50
75
100
4
4
3
MAX
TYP
MIN
2
3
MAX
2
TYP
MIN
1
1
50
75
150
SCM1100M VIL-Tj
5
25
125
Tj[°C]
VINL[V]
VINH[V]
15
1
SCM1100M VIH-Tj
0
12
MAX
TYP
MIN
2
5
0
-25
10
4
MAX
100
0
-25
7
Tj[°C]
5
BlankTime[μs]
120
5
SCM1100M tbk(BlankTime)-Tj
SCM1100M IIN-Tj
140
2
100
125
150
0
-25
0
25
50
75
100
125
150
Tj[°C]
Tj[°C]
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
7
Characteristic Performance Data (continued)
The following data is applicable to all of the SCM1100M series.
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Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
7M>°C@
8
Output Characteristic Performance Data
The following data is applicable to the SCM1101M or SCM1101MF, 10 A device.
IGBT and FRD DC Characteristics
Forward Voltage versus Forward Current
VCE(sat) versus Supply Current
2.5
VGE = 15 V
2
2
1.5
1.5
Vf (V)
VCE(sat) (V)
2.5
1
75°C
Tj=25°C
0.5
125°C
1
75°C
125°C
0.5
TJ = 25°C
0
0
0
1
2
3
4
5
IC (A)
6
7
8
9
0
10
1
2
3
4
5
If (A)
6
7
8
9
10
9
10
11
9
10
11
Switching Power Loss (Half-Bridge Operation at TJ = 25°C)
Low-side Eon, Eoff versus Supply Current
High-side Eon, Eoff versus Supply Current
500
VBB = 300 V,VB = 15 V
Inductive load
400
VBB = 300 V, VCC=15 V
Inductive load
400
Eoff
300
200
E (μJ)
E (μJ)
500
Eon
100
Eoff
300
200
Eon
100
0
0
0
1
2
3
4
5
6
IC (A)
7
8
9
10
0
11
1
2
3
4
5
6
IC (A)
7
8
High-side Eon,Eoff versus Supply Current
900
800
700
600
500
400
300
200
100
0
VBB= 300 V,VB = 15 V
Inductive load
Eoff
E (μJ)
E (μJ)
Switching Power Loss (Half-Bridge Operation at TJ = 125°C)
Eon
0
1
2
3
4
5
6
IC (A)
7
8
9
10
11
Low-side Eon, Eoff versus Supply Current
900
800
700
600
500
400
300
200
100
0
VBB = 300 V, VCC = 15 V
Inductive load
Eoff
Eon
0
1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
2
3
4
5
6
IC (A)
7
8
9
Output Characteristic Performance Data (Continued)
The following data is applicable to the SCM1103M, 5 A device.
IGBT and FRD DC Characteristics
VCE(sat) versus Supply Current
Forward Voltage versus Forward Current
2.5
VGE = 15 V
2
2
1.5
1.5
Vf (A)
VCE(sat) (V)
2.5
1
125°C
75°C
TJ = 25°C
0.5
1
75°C
125°C
0.5
0
TJ = 25°C
0
0
0.5
1
1.5
2
2.5
IC (A)
3
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
If (A)
3
3.5
4
4.5
5
Switching Power Loss (Half-Bridge Operation at TJ = 25°C)
High-side Eon, Eoff versus Supply Current
Low-side Eon, Eoff versus Supply Current
300
VBB = 300 V, VB = 15 V
Inductive load
200
E (μJ)
E (μJ)
300
Eoff
VBB = 300 V, VCC = 15 V
Inductive load
200
100
100
Eoff
Eoff
Eon
0
0
0
1
2
3
IC (A)
4
5
0
6
1
2
3
IC (A)
4
5
6
Switching Power Loss (Half-Bridge Operation at TJ = 125°C)
High-side Eon, Eoff versus Supply Current
400
300
VBB = 300 V,VCC = 15 V
Inductive load
300
Eoff
Eoff
E (μJ)
E (μJ)
Low-side Eon, Eoff versus Supply Current
400
VBB = 300 V,VB =15 V
Inductive load
200
Eon
Eon
100
200
100
0
0
0
1
2
3
IC (A)
4
5
6
0
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
1
2
3
IC (A)
4
5
6
10
Output Characteristic Performance Data (Continued)
The following data is applicable to the SCM1104M or SCM1104MF, 8 A device.
IGBT and FRD DC Characteristics
Forward Voltage versus Forward Current
VCE(sat) versus Supply Current
2.5
2.5
VGE =15 V
2
1.5
1.5
Vf (V)
VCE(sat) (V)
2
1
125°C
75°C
TJ = 25°C
0.5
1
T = 25°C
75°C J
125°C
0.5
0
0
0
2
4
IC (A)
6
8
0
2
4
If (A)
6
8
Switching Power Loss (Half-Bridge Operation at TJ = 25°C)
High-side Eon, Eoff versus Supply Current
400
VBB = 300 V, VB=15 V
Inductive load
VBB = 300 V, VCC = 15 V
Inductive load
300
Eoff
E (μJ)
E (μJ)
300
Low-side Eon, Eoff versus Supply Current
400
200
Eon
100
200
Eon
Eoff
100
0
0
0
1
2
3
4
5
6
7
8
0
9
1
2
3
IC (A)
4
5
IC (A)
6
7
8
9
8
9
Switching Power Loss (Half-Bridge Operation at TJ = 125°C)
High-side Eon, Eoff versus Supply Current
600
500
400
Eoff
300
VBB= 300 V, VCC = 15 V
Inductive load
500
200
E (μJ)
E (μJ)
400
Low-side Eon,Eoff versus Supply Current
600
VBB = 300 V, VB =15 V
Inductive load
200
Eon
100
300
Eoff
Eon
100
0
0
0
1
2
3
4
5
IC ( A)
6
7
8
9
0
1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
2
3
4
5
IC (A)
6
7
11
Output Characteristic Performance Data (Continued)
The following data is applicable to the SCM1105MF, 15 A device.
IGBT and FRD DC Characteristics
VCE(sat) versus Supply Current
Forward Voltage versus Forward Current
2.5
2.5
VGE = 15 V
2
1.5
Vf (V)
VCE(sat) (V)
2
1
125°C
75°C
0.5
1.5
1
75°C
125°C
0.5
TJ = 25°C
0
Tj=25°C
0
0
1
2
3
4
5
6
7 8
IC (A)
9 10 11 12 13 14 15
0
1
2
3
4
5
6
7 8
If (A)
9 10 11 12 13 14 15
Switching Power Loss (Half-Bridge Operation at TJ = 25°C)
High-side Eon, Eoff versus Supply Current
700
E (μJ)
500
500
Eoff
400
VBB = 300 V, VCC =15 V
Inductive load
600
Eon
300
E (μJ)
600
Low-side Eon, Eoff versus Supply Current
700
VBB = 300 V,VB =15 V
Inductive load
400
200
200
100
100
0
Eoff
300
Eon
0
0
1
2 3
4
5
6
7 8 9 10 11 12 13 14 15 16
IC (A)
0
1
2
3
4 5
6
7
8 9 10 11 12 13 14 15 16
IC ( A)
Switching Power Loss (Half-Bridge Operation at TJ = 125°C)
1400
VBB = 300 V, VB =15 V
1200 Inductive load
1000
600
Eon
400
Inductive load
1000
Eoff
800
VBB= 300 V, VCC = 15 V
1200
E (μJ)
E (μJ)
Low-side Eon, Eoff versus Supply Current
High-side Eon, Eoff versus Supply Current
1400
200
Eoff
800
600
Eon
400
200
0
0
0 1
2 3
4 5
6 7 8 9 10 11 12 13 14 15 16
IC (A)
0
1
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
3
4
5
6
7 8 9 10 11 12 13 14 15 16
IC (A)
12
Output Characteristic Performance Data (Continued)
The following data is applicable to the SCM1106M and SCM1106MF, 10 A device.
IGBT and FRD DC Characteristics
VCE(sat) versus Supply Current
Forward Voltage versus Forward Current
2.5
VCE(sat) (V)
2
2.5
VGE = 15 V
2
1.5
Vf (V)
1.5
125°C
75°C
1
TJ= 25°C
0.5
1
75°C
125°C
0.5
0
TJ = 25°C
0
0
2
4
6
IC (A)
8
10
0
2
4
If (A)
6
8
10
Switching Power Loss (Half-Bridge Operation at TJ = 25°C)
Low-side Eon, Eoff versus Supply Current
High-side Eon, Eoff versus Supply Current
400
VBB = 300 V,VB =15 V
Inductive load
VBB = 300 V,VB =15 V
Inductive load
300
200
E (μJ)
300
E (μJ)
400
Eon
100
Eon
200
Eoff
100
Eoff
0
0
0
1
2
3
4
5
6
IC (A)
7
8
9
10
11
0
1
2
3
4
5
6
7
8
9
10
11
10
11
IC (A)
Switching Power Loss (Half-Bridge Operation at TJ = 125°C)
High-side Eon, Eoff versus Supply Current
Low-side Eon, Eoff versus Supply Current
600
600
VBB = 300 V,VB =15 V
Inductive load
500
400
300
E (μJ)
400
E (μJ)
VBB = 300 V,VB =15 V
Inductive load
500
Eon
200
Eon
300
200
Eoff
100
Eoff
100
0
0
0
1
2
3
4
5
6
IC (A)
7
8
9
10
11
0
1
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
2
3
4
5
6
7
8
9
IC (A)
13
Output Characteristic Performance Data (Continued)
The following data is applicable to the SCM1110MF, 15 A device.
IGBT and FRD DC Characteristics
Vf versus If
VCE(sat) versus Supply Current
2.5
2.5
VGE= 15 V
2
1.5
1.5
Vf (V)
VCE(sat) (V)
2
125°C
75°C
1
TJ = 25°C
0.5
1
75°C
125°C
0.5
TJ = 25°C
0
0
0
1
2
3
4
5
6
7 8
IC (A)
0
9 10 11 12 13 14 15
1
2
3
4
5
6
7 8
If (A)
9 10 11 12 13 14 15
Switching Power Loss (Half-Bridge Operation at TJ = 25°C)
Low-side Eon, Eoff versus Supply Current
High-side Eon, Eoff versus Supply Current
700
700
VBB = 300 V,VB =15 V
Inductive load
600
500
500
E (μJ)
E (μJ)
VBB = 300 V,VB =15 V
Inductive load
600
400
300
Eon
200
300
Eoff
200
Eoff
100
Eon
400
100
0
0
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
IC (A)
IC (A)
Switching Power Loss (Half-Bridge Operation at TJ = 125°C)
High-side Eon, Eoff versus Supply Current
E (μJ)
800
600
VBB = 300 V,VB =15 V
Inductive load
VBB = 300 V,VB =15 V
Inductive load
800
Eoff
400
200
Low-side Eon, Eoff versus Supply Current
1000
E (μJ)
1000
Eon
600
Eon
400
Eoff
200
0
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
IC (A)
0
1 2
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
3 4
5 6
7 8
9 10 11 12 13 14 15 16
IC (A)
14
The products described herein are manufactured in Japan by Sanken Electric Co., Ltd. for sale by Allegro MicroSystems, Inc.
Sanken and Allegro reserve the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Therefore, the user is cautioned to verify that the information in this
publication is current before placing any order.
When using the products described herein, the applicability and suitability of such products for the intended purpose shall be reviewed at the users
responsibility.
Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure and defect of semiconductor products
at a certain rate is inevitable.
Users of Sanken products are requested to take, at their own risk, preventative measures including safety design of the equipment or systems
against any possible injury, death, fires or damages to society due to device failure or malfunction.
Sanken products listed in this publication are designed and intended for use as components in general-purpose electronic equipment or apparatus
(home appliances, office equipment, telecommunication equipment, measuring equipment, etc.). Their use in any application requiring radiation
hardness assurance (e.g., aerospace equipment) is not supported.
When considering the use of Sanken products in applications where higher reliability is required (transportation equipment and its control systems
or equipment, fire- or burglar-alarm systems, various safety devices, etc.), contact a company sales representative to discuss and obtain written
confirmation of your specifications.
The use of Sanken products without the written consent of Sanken in applications where extremely high reliability is required (aerospace equipment, nuclear power-control stations, life-support systems, etc.) is strictly prohibited.
The information included herein is believed to be accurate and reliable. Application and operation examples described in this publication are
given for reference only and Sanken and Allegro assume no responsibility for any infringement of industrial property rights, intellectual property
rights, or any other rights of Sanken or Allegro or any third party that may result from its use.
Anti radioactive ray design is not considered for the products listed herein.
Copyright ©2007-2009 Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
15
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