Application Note: SX68000MH Series High Voltage 3-Phase Motor Driver ICs

Application Information
SX68000MH Series High Voltage 3-Phase Motor Driver ICs
Introduction
The SX68000MH series is an inverter power module which
includes power MOSFETs, pre-driver IC, and bootstrap
diodes with limit resistors in a single package. The device
provides an ideal solution especially for small size inverter
motors such as fans and pumps. These ICs take 230 VAC
input voltage, and up to 2.5 A (continuous) output current.
Figure 1 shows the functional block diagram of the device.
High voltage power supply is applied between VBB1 and
VBB2 and LS. 15 V is applied between VCC1 and COM1,
and VCC2 and COM2. Six signals, HIN1 through HIN3 and
LIN1 through LIN3, control the on-off switching of the six
internal power MOSFETs. These input signals are active
high (xIN = High → MOSFET on). Boot capacitors should
be connected between VB1 and U, VB2 and V, and VB31
and W1, for high-side power supply.
The device includes: OCP (overcurrent protection, activated
for example at a short on the inverter bridge), TSD (thermal
shutdown, activated for example at abnormal temperatures,
or overloads), and UVLO (protection circuit for sudden
drops of the controlling power supply voltage). Operation of
these protection features can be monitored on the fault signal
output terminal, F̄¯¯Ō¯.
There is a current limiter function for the MOSFET control
signal. When the current through a shunt resistor exceeds
the threshold, the OCL terminal goes high (active high). By
connecting this signal to the SD terminal, current limiter
operation (high-side of MOSFETs turned off for 1 carrier
PWM cycle) can be performed.
Table 1. SX68000MH Series Lineup
MOSFET Rating
(Ω Typ)
(Ω Max)
Boot
Resistance
(Ω)
SX68001MH
250
2
1.25
1.5
60
SX68002MH
500
1.5
3.2
4
60
SX68003MH
500
2.5
2
2.4
60
Part
Number
Breakdown
(V)
Output
(A)
RDS(on)
Contents
Introduction
Features
Terminal Functions
Protection Functions
Application Information
Cautions and Warnings
Performance Characteristics
Worldwide Contacts
SX68000MH-AN
January 28, 2013
SANKEN ELECTRIC CO., LTD.
http://www.sanken-ele.co.jp/en/
1
2
4
7
12
14
15
25
• OCP (Overcurrent Protection)
Features
OCP is a function that shuts down the MOSFET gate signal at
overcurrent conditions, such as output short-circuit and inverter
bridge short-circuit, and to output an alarm signal. The output time
of the alarm signal is set by an external resistor and capacitor.
• Package: 27-pin SOP
The SX68000MH series is packaged in an SOP package with
27 pins, which enables down-sizing and simple PCB layout. Pin
pitch is 1.2 mm, with a 2.4 mm pitch separating adjacent high and
low voltage pins. Pin width is 0.4 mm. Body thickness is 2.1 mm.
This package size is suitable to be embedded in a motor.
• Gate shutdown function on both high- and low-side at abnormal
operation
• Integrated boot diode (600 V, 0.5 A) with a current limit resistor
for each of the high-side gate drivers
Externally connecting the SD terminal and the inverted F̄¯¯Ō¯
terminal signal enables the device to shut down all high-side and
low-side MOSFETs at abnormal conditions (when the F̄¯¯Ō¯ signal
goes low), such as overheating, overcurrent, or controlling power
supply voltage drop.
• OCL (Overcurrent Limiter) function (with signal output and
shut-down terminal)
• Built-in TSD (thermal shutdown) function, embodied in the
low-side driver IC (MIC)
When the current exceeds the setting value, to limit the current
the MOSFET is switched off for one PWM cycle at the carrier
frequency.
When the MIC chip temperature exceeds the set value, the gate
input is shut down, and the device outputs an alarm signal. Temperature is monitored by the low-side MIC.
• Three built-in high voltage bootstrap diodes, each with current
limiting resistor
VB1
VB2
VB31 VB32
VCC1
VBB1
VBB2
UVLO
HIN1
HIN2
HIN3
UVLO
Input
Logic
UVLO
UVLO
High Side
Level Shift Driver
W1
W2
V
V1
V2
U
COM1
SD
VCC2
REG
LIN 1
LIN 2
LIN 3
COM2
REG
UVLO
Input Logic
(OCP Reset)
Thermal
Shutdown
Low Side
Driver
OCP
OCP and OCL
FO
LS
OCL
Figure 1. Functional Block Diagram
SX68000MH-AN
SANKEN ELECTRIC CO., LTD.
2
• Built-in protection circuit for controlling power supply voltage
drop (UVLO)
The device monitors each controlling supply voltage: VCC1,
VCC2, VB1, VB2, and VB31. If any of these voltages falls below
the undervoltage threshold, the gate is shut down. If the VCC2
voltage falls below the undervoltage threshold, the F̄¯¯Ō¯ signal is
asserted.
• Alarm signal output (indicating shut down) while protection
circuit is in operation
Operates on the low, through the F̄¯¯Ō¯ terminal, an open collector
output. When TSD, OCP, or UVLO protection for controlling
power supply voltage VCC2 drop are activated, the internal tran-
sistor turns on and drives the F̄¯¯Ō¯ terminal low.
• RoHS compliance
RoHS compliant (Pb free) for terminal solder and internal solder.
• Structure
The SX68000MH series has a total of 11 chips: six MOSFETs,
two drive ICs, and three bootstrap diodes mounted on a copper
leadframe. Gold wires connect from chip to chip, and from chip
to leadframe. The case is molded epoxy resin. Part number and
lot number are printed on the surface of the case. Figure 2 shows
the package exterior and the internal construction.
Cu leadframe
Au wire
Chip
Figure 2. SX68000MH Package Structure; external view (left), and cross section view (right)
22 ±0.2 (Including mold flash)
+0.15
0.25 –0.05
18
27
14.1 ±0.3
1
+0.15
0.4 –0.05
1.2 ±0.2
17
11.4 ±0.2
(Not including
mold flash)
1.05 ±0.2
2.1 ±0.2
Figure 3. SX68000MH Package Outline Drawing
SX68000MH-AN
0.2
0
SANKEN ELECTRIC CO., LTD.
3
Terminal Functions
Pin-out Diagram
V2
W2
LS
LIN2
LIN3
OCL
V1
VB32
18
FO
8
VCC2
7
U
6
19
COM2
5
VB1
SD
4
REG
HIN1
3
LIN1
W1
HIN2
2
21 20
VBB1
VB31
1
VBB2
HIN3
22
COM1
23
VCC1
25 24
V
26
VB2
27
9 10 11 12 13 14 15 16 17
To keep sufficient distance between high and low voltage terminals, or
between high-voltage terminals with different electric potentials, one pin
each is removed between: pin 2 (V) and pin 3 (VCC1), pin 18 (W2) and
pin 19 (V2), pin 19 (V2) and pin 20 (U), pin 21 (VB1) and pin 22 (VBB1),
pin 22 (VBB1) and pin 23 (V1), pin 23 (V1) and pin 24 (W1), pin 25 (VB31)
and pin 26 (VBB2), and pin 26 (VBB2) and pin 27 (VB32).
Table 2. Terminal List Table
Number
Name
Function
Number
Name
Function
1
VB2
2
V
High-side bootstrap terminal (V phase)
14
COM2
Low-side GND terminal
Output of V-phase
15
VCC2
3
VCC1
Low-side logic supply voltage
High-side logic supply voltage
16
¯¯Ō
¯
F̄
Fault signal output; active low
4
COM1
High-side logic GND terminal
17
LS
Low-side MOSFET source terminal
5
HIN3
High-side input terminal (W-phase)
18
W2
Output of W phase (connect to W1)
6
HIN2
High-side input terminal (V-phase)
19
V2
Output of V phase (connect to V1)
7
HIN1
High-side input terminal (U-phase)
20
U
Output of U phase
8
SD
High-side shut down input
21
VB1
9
OCL
Current limiter signal output (CMOS output)
22
VBB1
10
LIN3
Low-side input terminal (W phase)
23
V1
Output of V phase (connect to V2)
11
LIN2
Low-side input terminal (V phase)
24
W1
Output of W phase (connect to W2)
12
LIN1
Low-side input terminal (U phase)
25
VB31
26
VBB2
Main supply voltage 2 (connect VBB1 externally)
27
VB32
High side bootstrap terminal (W phase)
13
SX68000MH-AN
REG
7.5 V regulator output
SANKEN ELECTRIC CO., LTD.
High-side bootstrap terminal (U phase)
Main supply voltage 1 (connect VBB2 externally)
High side bootstrap terminal (W phase)
4
Table 3. Equivalent Circuits for Input and Output Terminals
Pin
Number
Terminals
Input or
Output
1, 21, 25 (27)
VB2, VB1,
VB31 (VB32)
Input
VCC1
Input
Equivalent Circuit
VBx
(High side) U, V, W
High-side
drive circuit
VCC1
3
REG
UVLO
COM1
5, 6, 7,
10,11,12
HIN3, HIN2, HIN1,
LIN3, LIN2, LIN1
2 kΩ
Input
HINx, LINx
2 kΩ
SD
Input
5V
2 kΩ
20 kΩ
COMx
8
Boot Diode, VBx
SD
5V
2 kΩ
Filter
3.3 µs
To Shutdown
1 MΩ
COM1
5V
100 Ω
9
OCL
Output
200 kΩ
OCL
COM2
VCC2
13
REG
REG
Output
100 kΩ
COM2
VCC2
15
VCC2
Input
REG
UVLO
Low-side
drive circuit
COM2
5V
Shut
down
16
¯¯Ō
¯
F̄
Input,
Output
1 MΩ
50 Ω
FO
COM2
5V
2 kΩ
17
LS
Input
LS
OCL
OCP
200 kΩ
COM2
SX68000MH-AN
SANKEN ELECTRIC CO., LTD.
5
Descriptions of input and output terminals
The following are explanations for the input and output terminals
(please refer to figure 18):
or damage by power supply ripple or external surges, please put
ceramic capacitors, CBYP , of 0.01 to 0.1 μF near the terminals. In
addition, if surge voltage could exceed 20 V, it is recommended
to use a Zener diode, DZ (VZ = 18 to 20 V) .
• VBB1, VBB2 terminals
• REG terminal
These are the main supply voltage terminals, and they are internally connected to each other. For thermal considerations, it is
recommended to connect both VBB1 and VBB2 externally.
This is the terminal for the regulated 7.5 V output. The maximum
load current is 35 mA. If the regulator output is used in the application, please consider stabilizing the output voltage by using an
electrolytic capacitor between REG and COM.
Note: In order to reduce surge voltages, it is recommended to use
a snubber capacitor, CS in figure 18, of 0.01 to 0.1 μF between
VBB and COM. In order to achieve better effectiveness of the
snubber capacitor, please make the capacitor PCB trace as short
as practicable, and place it between the IC and an additional
electrolytic capacitor.
VBB1 and VBB2 are high voltage terminals. Please provide sufficient separation from other traces or consider using overcoating
material.
In addition, the main current flows through VBB1 and VBB2.
Please make these traces as wide as possible.
• U, V1, V2, W1, W2 terminals
These terminals are connected to the motor. Because V1 and V2,
and W1 and W2, are not connected to each other internally in the
IC, please connect those terminals on the PCB. Because these
output terminals have high voltage, please provide sufficient separation from other lines or consider using overcoating material.
Note: Because the V terminal is internally connected the V1 terminal, there is no requirement to connect these two terminals to
each other externally. The V terminal is used to connect the bootstrap capacitor. Please do not connect this terminal to the motor.
Because the main current flows through the U, V1, V2, W1, and
W2 terminals, please make the traces wide for these terminals.
• VB1, VB2, VB31(VB32) terminals
If the regulator output is unused, please leave the terminal open.
• HIN1, HIN2, HIN3, LIN1, LIN2, and LIN3 terminals
These are the input terminals for MOSFET control. Threshold
voltage is set for the use of both 3.3 V and 5 V inputs. Input logic
is active high and a pull-down resistor of 22 kΩ (typ) is built-in.
In case external noise becomes significant or wire connections
are long, please consider using an RC filter, as shown in figure 4
(RA = 50 to 300 Ω , C = 100 to 1,000 pF), or a pull-down resistor
(RPD ≈ 4.7 to 10 kΩ).
• SD terminal
This input terminal is used to shut down the high-side output
MOSFETs. The terminal is active high, and when a high signal
(3.3 or 5 V) is applied, those MOSFET gates are shut down.
By connecting OCL to the SD terminal externally, current limiter
operation is enabled (figure 6 shows the timing diagram for the
current limiter function). There is an internal filter of 3.3 μs (typ)
on the SD terminal. Pulses input from the OCL terminal that are
narrower than that are considered noise, and the gates are not shut
down. If a pulse is wider than 3.3 μs, the gates are shut down.
When the gates are shut down, the current flowing through the
shunt resistor becomes 0 A, and the OCL signal goes low (0 V),
However, each high-side MOSFET remains off until the corresponding HIN signal transitions from low to high, until a positive
(rising) signal edge comes (referred to as edge operation).
These are terminals to connect the bootstrap capacitors for
smoothing the high-side controlling supply voltage. Please connect individual capacitors, CB , between VB1 and U, VB2 and
V, and VB31 and W1. VB31 is internally connected to VB32.
Please leave VB32 unconnected.
By connecting the SD terminal and the inverted F̄¯¯Ō¯ terminal signal, all high-side and low-side MOSFETs can be shut down when
an abnormal circumstance occurs, such as overheating, overcurrent, or undervoltage on the control supply voltage.
In order to avoid effects of external noise, please place these
capacitors very near to the IC. In addition, please use ceramic
capacitors which have good high frequency response.
As shown in figure 5, the LS terminal can be used to control the
OCL terminal. If the voltage at the LS terminal is kept higher
The bootstrap capacitors are charged from the VB terminals,
which are supplied through the VCC1 terminal, the bootstrap
diodes, DB , inside the IC, and the in-rush current limiter boot
resistors, RB . The time constant for charging is RB × CB .
• OCL, LS terminals
System
Control
IC
(MCU)
SX68000MH
RPD
• VCC1, VCC2 terminals
These are the control power supply voltage terminals. Please connect both VCC1 and VCC2 to 15 V. To avoid malfunction
SX68000MH-AN
RA
Figure 4. External Noise Reduction Circuit; for HIN and LIN input terminals
SANKEN ELECTRIC CO., LTD.
6
than 0.65 V (typ) for 2 μs (typ), the output voltage at the OCL
terminal goes high (5 V). When OCL is connected to the SD
terminal, it operates as a current limiter (see figure 6 for current
limiter timing; F̄¯¯Ō¯ is the fault flag signal output).
• F̄¯¯Ō¯ terminal
An internal transistor on the F̄¯¯Ō¯ output terminal is turned on
by the protection circuits due to overcurrent, overtemperature,
or for undervoltage on the control supply voltage, VCC2 . At the
same time, the low-side MOSFETs are shut down. After the fault
condition is released, the F̄¯¯Ō¯ transistor operates according to LIN
(logic level operation).
Please connect a pull-up resistor, RFO = 3.3 to 10 kΩ, and a
capacitor for noise malfunction prevention, CFO = 0.001 to
0.01 μF, to the F̄¯¯Ō¯ terminal.
0.65 V
LS
2 kΩ
COM2
–
+
200 kΩ
OCL
Filter
2 μs (typ)
Figure 5. Equivalent Circuit from LS to OCL
Protection Functions
The following are descriptions and timing charts of the operation
of protection functions for the SX68000MH series.
Protection circuit for controlling power supply voltage
drop (undervoltage lockout, UVLO)
If gate drive voltage of the output MOSFETs becomes insufficient, there is greater MOSFET power dissipation, and in the
worst case, the IC may be damaged. In order to avoid this, a
protection circuit for controlling power supply voltage drop is
incorporated.
The control IC (MIC) monitors the high-side voltage: between
VCC1 and COM1, VB1 and U, VB2 and V1, and VB3 and W1
(the MIC also monitors the low-side voltage, between VCC2 and
COM2). As shown in figure 7, after VB exceeds the VUVHH rated
value, 10.5 V (typ), at the next positive (rising) edge on HIN
(edge operation), an output-on pulse appears at HO (the gates of
the high-side output MOSFETs). When VB goes below the VUVHL
rated value, 10 V (typ), the high-side MOSFETs are shut down.
When the voltage between VCC1 and COM1 goes below VUVLL ,
11 V (typ), which applies on both of VCC1 and VCC2 UVLO
conditions, the high-side MOSFETs are shut down. After a shutdown, when the power supply voltage rises and exceeds VUVLH ,
HIN
LIN
High-side gate shut down
HO (high-side
MOSFET gate)
3.3 μs
3.3 μs
Low-side gate shut down
LO (low-side
MOSFET gate)
VTRIP (1V)
LS
VLIM
2 μs
2 μs
2 μs
OCL and
SD
20 μs(min)
FO
Figure 6. Timing Chart of Current Limiter Operation
SX68000MH-AN
SANKEN ELECTRIC CO., LTD.
7
collector internal transistor on the F̄¯¯Ō¯ terminal turns on. When
VCC2 rises and exceeds VUVLH , 11.5V(typ), the shut down of
the low-side MOSFETs is released and internal transistor on the
F̄¯¯Ō¯ terminal turns off. After the fault condition is released, the
F̄¯¯Ō¯ transistor operates according to LIN (logic level operation),
see figure 10.
11.5 V (typ), at the next positive (rising) edge (edge operation),
an output-on pulse appears at HO.
Note: When power MOSFET output is shut down according to
UVLO operation due to a voltage drop on the high side, the fault
is not reflected at the F̄¯¯
Ō¯ output.
Figures 8 and 9 show the internal equivalent circuit of the UVLO
detection features on the high-side control power supply, on the
VB and VCC1 terminals. As shown in the figures, internal filters
are provided to eliminate line noise.
The low-side UVLO circuit has an internal filter to eliminate line
noise, similar to the high-side UVLO circuit.
As mentioned above, this IC contains filters against steep drops
in the control voltages: VB, VCC1, and VCC2. However, there
are possibilities of malfunction due to line noise or IC damage
When the voltage between VCC2 and COM2 goes below VUVLL ,
11 V (typ), the low-side MOSFETs are shut down and the open
HIN
VCC1
VUVLH
VUVLL
VB to VUVHH
High Side
(U,V,W)
VUVHH
VUVHL
HO
Figure 7. Timing Chart of High-Side UVLO Operation
SET pulse
FF
S Q
RESET pulse
MOSFET gate
to Drive circuit
HIN
SET pulse
Pulse
Generator
RESET pulse
R
VREF
VB
VREF
VCC1
Filter
MOSFET gate
to Drive circuit
R
Comparator
+
–
FF
S Q
Comparator
+
–
Filter
U,V,W
Figure 8. High-Side UVLO Internal Equivalent Circuit at VB
SX68000MH-AN
Figure 9. High-Side UVLO Internal Equivalent Circuit at VCC1
SANKEN ELECTRIC CO., LTD.
8
in the event excessive voltage is applied, a filter time-constant is
exceeded, or only VCC1 drops but VB is retained, and so forth.
Therefore, please place an external ceramic capacitor, CBYP , of
0.01 to 0.1 μF and a Zener diode, DZ (VZ = 18 to 20 V) near the
power supply terminals.
Note: Because the die temperature of the power MOSFETs is
NOT directly monitored, damage to the IC by overheating cannot
be fully prevented. Please note that there may be some delay in
temperature detection, such as in cases when the MOSFET temperature is increased abruptly, until the heat reaches the monitors.
Thermal Shutdown (TSD)
Over Current Protection (OCP)
The SX68000MH series contains a Thermal Shutdown circuit. In
the event the IC is overheated by an increase of power consumption due to overload or an increase of ambient temperature, the
low-side power MOSFETs are shut down, and the internal open
collector transistor on the F̄¯¯Ō¯ terminal is turned on.
The SX68000MH series contains an Overcurrent Protection
function. Figure 12 shows the internal equivalent circuit structure
for OCP. If the voltage between LS and COM is exceeds VTRIP ,
Table 4 provides the TSD temperature parameters. Detection is
done by the low-side MIC. When the temperature exceeds 150°C
(typ), the low-side MOSFETs are shut down, and when the temperature goes below 120°C (typ), the shutdown is released and
the IC operates according to the LIN signals.
Table 4. Thermal Protection (TSD) Levels
Low-Side MIC Temperature (°C)
Symbol
Min.
Typ.
Max.
TSD Enable
TDH
135
150
165
TSD Release
TDL
105
120
135
TDHYS
–
30
–
TSD Hysteresis
LIN
VCC2
VUVLH
VUVLL
VUVLH
LO
FO
Open collector transistor
turns on at low
Figure 10. Timing chart of low-side UVLO operation
LIN
TMIC
TDH
TDL
LO
FO
Open collector transistor
turns on at low
Figure 11. Timing Chart of Thermal Protection (TSD) Operation (TMIC is the temperature monitored at the low-side MIC)
SX68000MH-AN
SANKEN ELECTRIC CO., LTD.
9
1.0 V (typ), for the blanking time, tBK , 2 μs (typ), OCP operation
is started.
At the start of OCP operation, at the same time as an internal
transistor on the F̄¯¯Ō¯ terminal (connected to F̄¯¯Ō¯ through a 50 Ω
resistor) turns on, the gates of the low-side output MOSFETs are
shut down. OCP operation is continued for a period of 25 μs
(typ) after the LS terminal voltage becomes less than 1 V. After
the 25 μs period has passed, the gate shutdown is released, and
the transistor of the F̄¯¯Ō¯ terminal turns off. After that, the IC oper-
ates according to the LIN signals.
There is an internal circuit that shuts down the MOSFET gates
when the F̄¯¯Ō¯ terminal is low. The F̄¯¯Ō¯ Recovery time, the delay in
return from OCP mode to normal operation, is adjustable by an
external pull-up resistor, RFO , on the F̄¯¯Ō¯ terminal. If it is required
to extend the MOSFET shutdown period beyond the 25 μs (typ)
of OCP, it can be extended by increasing the value of RFO or not
inserting RFO. For more information, please refer to the Implementing Adjustable F̄¯¯Ō¯ Recovery Time section.
1 MΩ
MOSFET
Shut down
2 kΩ
VREF
(1 V)
ー
LS
OCP
+
Filt er
2 μs
FF
S
Q
Timer
25 μs
FO
50 Ω
R
Figure 12. OCP Internal Equivalent Circuit
LIN
LO
LS
VTRIP
(1V)
<2 μs
2μs
20 μs (min)
FO
Figure 13. Timing Chart of Overcurrent Protection (OCP) Operation
SX68000MH-AN
SANKEN ELECTRIC CO., LTD.
10
¯¯Ō
¯ Recovery Time
Implementing Adjustable F̄
This IPM has a function to adjust F̄¯¯Ō¯ recovery time using an
external pull-up resistor and a capacitor added at the F̄¯¯
Ō¯ terminal. Figure 14 is an example for the implementation. Using this
implementation the recovery time from an OCP mode to the
normal operation can be increased.
5V
SX68000MH
Shut
down
1 MΩ
3.3 or 5 V
RFO
FO
50 Ω
CFO
COM2
¯¯Ō
¯ Internal Equivalent Circuit; demonstrating
Figure 14. F̄
RFO and CFO implementation
LIN
Protection
feature
operation
FO recovery time
LO
Filter
3.3 μs (typ)
Filter
3.3 μs (typ)
2 V (typ)
FO
¯¯Ō
¯ Recovery
Figure 15. Timing Chart for F̄
3.0
FO Recovery Time (ms)
FO Recovery Time (ms)
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
2.5
2.0
1.5
1.0
0.5
0
0
1000
2000
3000
4000
5000
0
0.002
RFO (kΩ)
0.006
0.008
0.010
CFO (μF)
¯¯Ō
¯ Recovery Time Versus RFO; CFO = 0.01 μF, VFO = 5 V
Figure 16. F̄
SX68000MH-AN
0.004
¯¯Ō
¯ Recovery Time Versus CFO; RFO = 1 MΩ, VFO = 5 V
Figure 17. F̄
SANKEN ELECTRIC CO., LTD.
11
Application Information
Figure 18 is an example of a typical application circuit.
• Make the PCB circuit layout between the bootstrap capacitors,
CB (≈ 1 μF) and the IC as short as possible to avoid malfunction
due to noise.
• Please be sure to connect W1 and W2, and V1 and V2, on the
printed circuit board.
• One of the bootstrap capacitors for the W phase can be populated between pin 24 (W1) and pin 25 (VB31). Also, because
pin 27 (VB32) and pin 25 are internally connected, pin 27 can
be left open.
• When the current limiter is not used, please leave the OCL
terminal open, and the SD terminal open or connected to GND
(when significant external noise is expected).
• Although the F̄¯¯Ō¯ terminal has an internal pull-up resistor of
1 MΩ, please connect a pull-up resistor RFO between the F̄¯¯Ō¯ terminal and a 5 V or 3.3 V power supply in consideration a noise
reduction capability. Please note, if the F̄¯¯Ō¯ terminal is connected to the 5 V or 3.3 V without the pull-up resistor, the thermal
protection (TSD) function is disabled (low-side UVLO protection and Overcurrent Protection functions remain enabled).
• Place a ceramic capacitor, CBYP (0.01 to 0.1 μF) between VCC1
and COM1, as well as VCC2 and COM2, to avoid malfunction
due to noise. Make the PCB circuit layout between these capacitors and the IC as short as possible.
• Make the PCB circuit layout between current sense resistor,
RS , inserted between LS and COM2, and the IC as wide and as
short as possible to avoid malfunction due to noise.
• Place a ceramic capacitor, CFO (0.001 to 0.01 μF) between the
F̄¯¯Ō¯ and COM2 terminals to avoid malfunction due to noise.
VB1
15 V
VB2
VB32
VB31
DB1 RB1
VCC1
DB2
RB2
DB3
RB3
CBYP
UVLO
HIN1
HIN2
HIN3
Input
Logic
VBB1
VBB2
UVLO
UVLO
UVLO
CB1
High Side
Level Shift Driver
COM1
System
5V
Control To
regulator
Block
(MCU)
CBYP
5V
RFO
SD
VCC2
REG
LIN1
LIN2
LIN3
REG
UVLO
Input Logic
(OCP reset)
CB2
CB3
W1
W2
V
V1
V2
U
BLDCM
CS
Low Side
Driver
COM2
FO
Thermal
Shutdown
OCP
OCP and OCL
LS
OCL
RS
Figure 18. Typical Application Circuit; with a 5 V MCU (with current limiter configured)
SX68000MH-AN
SANKEN ELECTRIC CO., LTD.
12
Figure 19 shows the recommended PCB footprint solder pad layout. When designing, please consider ease of mounting, reliability of connection, wiring space, whether or not it generates solder
bridges, and so forth.
Pin18
Pin 27
Recommended PCB pattern layout
Pin 17
Pin 1
Figure 19. Example Footprint Pattern Layout; please perform sufficient
mounting evaluation at your company when designing PCB
Measurement point of IC case temperature
Table 5 shows the thermal resistance data for the SX68000MH
series.
Figure 20 shows the point of measurement for case temperature
for the thermal resistance data.
Table 5. Thermal Resistance
Symbol
Rating
(°C/W)
Junction to Case*
RθJC
15
Junction to
Ambient*
RθJA
41.7
*Mounted on 1.6 mm thick CEM-3 PCB, with 35 μm thick
copper layer, without overmolding, in still air.
7.65 mm
4 mm
– Measurement point
Figure 20. Temperature Measurement Point; located on top face of
device case
SX68000MH-AN
SANKEN ELECTRIC CO., LTD.
13
Cautions and Warnings
• Power supply sequence
• Surge suppression
Powering-on the IC has no specific sequencing requirements.
However, please ensure that the minimum controlling voltage,
VCC , has been established before sending input to the HIN or
LIN terminals.
Please reduce applied surges to each terminal by adding ceramic
capacitors or Zener diodes, or other measures. Surges may cause
not only malfunction but also damage the IC. Make sure to fully
consider this point.
• Input dead-time
• Short-circuit protection
This IC does not contain a protection circuit for ground-fault.
Please make sure not to cause ground-fault mode.
Please set dead-time externally (no internal setting), so as not to
cause shoot-through (high to low short-circuit). 1.5 μs or longer
is recommended for the SX68000MH series.
• Distance between terminals
• Heat dissipation
The SX68000MH series uses an SOP 27-pin package and the distance between the terminals is 1.2 mm pitch. It is recommended
to apply overcoating or overmolding between the terminals and
on the PCB.
This IC is intended for use with small size motor controllers.
Because of the package physical size and corresponding higher
thermal resistances, it is strongly recommended to verify heat dissipation experimentally in the actual application in a design phase.
SX68000MH-AN
SANKEN ELECTRIC CO., LTD.
14
Performance Characteristics
Applicable to all SX68000MH series
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
-25
Power Supply Input Current versus Junction Temperature
Input on, VCC = 15 V, VIN = 5 V, 3 phases
Typ.
Min.
0
25
50
75
100
125
ICC (mA)
Max.
150
Max.
Typ.
Min.
0
25
50
75
100
125
150
TJ (°C)
Bootstrap Current versus Junction Temperature
Input off, VCC = 15 V, VIN = 0 V
Bootstrap Current versus Junction Temperature
Input on, VCC = 15 V, VIN = 5 V
400
400
350
350
300
300
250
Max.
200
150
Typ.
100
Min.
50
Max.
250
200
Typ.
150
100
Min.
50
0
0
-25
0
25
50
75
100
125
-25
150
0
25
50
75
100
125
150
TJ (°C)
TJ (°C)
Power Supply Input Current versus Voltage
Input off, VCC = 15 V, 3 phases
Bootstrap Current versus Bootstrap Voltage
Input off, VB = 15 V
6.0
250
5.0
TJ = 25°C
4.5
TJ = –20°C
IBOOT (μA)
TJ = 125°C
5.5
ICC (mA)
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
-25
TJ (°C)
IBOOT (μA)
IBOOT (μA)
ICC (mA)
Power Supply Input Current versus Junction Temperature
Input off, VCC = 15 V, VIN = 0 V
4.0
200
TJ = 125°C
150
TJ = 25°C
100
TJ = –20°C
50
3.5
3.0
12
13
14
15
16
17
18
19
20
0
12
13
VCC (V)
SX68000MH-AN
14
15
16
17
18
19
20
VB (V)
SANKEN ELECTRIC CO., LTD.
15
Applicable to all SX68000MH series
Power Supply Input Current versus Voltage
VCC = 15 V, Logic on (output on), 3 phase
6.5
300
TJ = 125°C
6.0
TJ = 125°C
IBOOT (μA)
250
5.5
ICC (mA)
Bootstrap Current versus Bootstrap Voltage
VB = 15 V, Logic on (output on)
TJ = 25°C
5.0
4.5
TJ = –20°C
4.0
TJ = 25°C
200
150
TJ = –20°C
100
50
3.5
3.0
0
12
13
14
15
16
17
18
19
20
12
13
14
VCC (V)
1.8
1.6
1.6
1.4
1.2
1.2
0
25
50
75
100
125
1.0
-25
150
Min.
0
25
50
75
100
125
150
TJ (°C)
MOSFET Switch-On Delay versus Junction Temperature
HIN input to high-side output (HO) MOSFET gate (internal)
MOSFET Switch-On Delay versus Junction Temperature
LIN input to low-side output (LO) MOSFET gate (internal)
1100
1100
Max.
1000
900
Typ.
800
700
600
500
Input Delay(L) (ns)
Input Delay(H) (ns)
Max.
Typ.
1.8
TJ (°C)
400
Max.
1000
900
800
Typ.
700
600
500
400
300
300
0
25
50
75
100
125
-25
150
0
25
MOSFET Switch-On Minimum Pulse Width
versus Junction Temperature
HIN input
Typ.
25
50
75
100
125
150
twON(L)(min) (ns)
Max.
0
50
75
100
125
150
TJ (°C)
TJ (°C)
twON(H)(min) (ns)
20
2.0
1.4
500
450
400
350
300
250
200
150
100
50
0
-25
MOSFET Switch-On Minimum Pulse Width
versus Junction Temperature
LIN input
Max.
Typ.
0
TJ (°C)
SX68000MH-AN
19
2.2
VIL (V)
VIH (V)
2.0
-25
18
2.4
Max.
Typ.
Min.
2.2
500
450
400
350
300
250
200
150
100
50
0
17
Input Threshold Voltage versus Junction Temperature
Logic off (output off)
2.4
-25
16
VB (V)
Input Threshold Voltage versus Junction Temperature
Logic on (output on)
1.0
-25
15
25
50
75
100
125
150
TJ (°C)
SANKEN ELECTRIC CO., LTD.
16
Applicable to all SX68000MH series
Input Terminal High Current versus Junction Temperature
VIN = 5 V
1200
700
1000
600
800
500
IINH (μA)
Gate Output Pulse Width (ns)
Output MOSFET Gate Pulse Width versus Input Pulse Width
Typical values at TJ = 25°C, VCC = 15 V
600
400
300
Low side
400
Min.
100
0
-25
0
200
Typ.
400
200
High side
200
0
Max.
600
800
1000
1200
0
25
Input Pulse Width (ns)
12.0
11.5
11.5
Min.
9.5
150
Max.
Typ.
10.5
Typ.
10.0
9.5
9.0
9.0
8.5
8.5
8.0
8.0
0
25
50
75
100
125
150
-25
0
25
TJ (°C)
50
75
100
125
150
TJ (°C)
Low-Side Undervoltage Lockout Enable Threshold
versus Junction Temperature
Low-Side Undervoltage Lockout Release Threshold
versus Junction Temperature
13.0
13.0
12.5
Typ.
11.5
11.0
Min.
10.5
12.0
11.5
Min.
11.0
10.5
10.0
10.0
9.5
9.5
9.0
9.0
-25
0
25
50
75
100
125
150
-25
0
TJ (°C)
SX68000MH-AN
Max.
Typ.
12.5
Max.
VUVLH (V)
12.0
VUVLL (V)
125
11.0
VUVHH (V)
VUVHL (V)
Max.
Typ.
10.0
-25
100
High-Side Undervoltage Lockout Release Threshold
versus Junction Temperature
12.0
10.5
75
TJ (°C)
High-Side Undervoltage Lockout Enable Threshold
versus Junction Temperature
11.0
50
25
50
75
100
125
150
TJ (°C)
SANKEN ELECTRIC CO., LTD.
17
Applicable to all SX68000MH series
Low-Side Undervoltage Lockout Filter
versus Junction Temperature
35
14
30
12
25
20
15
Max.
10
Typ.
5
0
25
50
75
100
125
10
8
6
Max.
4
Typ.
2
Min.
0
-25
UVLO Filter (μs)
VB UVLO Filter (μs)
High-Side (VB) Undervoltage Lockout Filter
versus Junction Temperature
0
-25
150
Min.
0
25
Overcurrent Limiter Reference High Threshold Voltage
versus Junction Temperature
0.66
Typ.
0.65
Min.
VTRIPH (V)
VLIMH (V)
150
Max.
1.06
Max.
0.67
0.64
1.04
Typ.
1.02
Min.
1.00
0.63
0.62
0.98
0
25
50
75
100
125
150
-25
0
25
TJ (°C)
50
75
100
125
150
TJ (°C)
Blanking Time (OCL, OCP)
versus Junction Temperature
Overcurrent Protection Hold Time
versus Junction Temperature
3.5
40
3.0
2.5
Typ.
2.0
Min.
1.5
Max.
35
Max.
30
tP (μs)
tbk (μs)
125
1.08
0.68
Typ.
25
Min.
20
15
10
5
0
1.0
0
25
50
75
100
125
150
-25
0
TJ (°C)
SX68000MH-AN
100
Overcurrent Protection Trip High Threshold Voltage
versus Junction Temperature
0.69
-25
75
TJ (°C)
TJ (°C)
-25
50
25
50
75
100
125
150
TJ (°C)
SANKEN ELECTRIC CO., LTD.
18
Applicable to all SX68000MH series
Fault Signal Input (FO) Gate Off Release Voltage
versus Junction Temperature
Output off
Overcurrent Limit Output (OCL) Voltage
versus Junction Temperature
5.4
2.4
Typ.
5.2
Max.
Min.
4.6
VFOH (V)
VOCL (V)
4.8
Max.
2.2
5.0
4.4
Typ.
2.0
Min.
1.8
1.6
1.4
4.2
4.0
-25
0
25
50
75
100
125
1.2
-25
150
0
25
Fault Signal Input (FO) Gate Off Enable Voltage
versus Junction Temperature
Output off
2.0
1.8
Max.
Typ.
Min.
1.6
FO Filter (μs)
VFOL (V)
2.2
1.4
25
50
75
100
125
150
-25
150
Max.
Typ.
Min.
0
25
50
75
100
125
150
TJ (°C)
Fault Signal Output (FO) On Voltage
versus Junction Temperature
Output on, external pull-up to 5 V via 3.3 kΩ resistor
High-Side Shutdown (SD) High Threshold Voltage
versus Junction Temperature
350
3.6
Typ.
Max.
Min.
250
200
Max.
VSDH ( V )
300
VFO (mV)
125
9
8
7
6
5
4
3
2
1
0
TJ (°C)
3.2
Typ.
Min.
2.8
2.4
150
2.0
100
-25
100
Fault Signal Input (FO) Filter
versus Junction Temperature
2.4
0
75
TJ (°C)
TJ (°C)
1.2
-25
50
0
25
50
75
100
125
150
-25
0
TJ (°C)
25
50
75
100
125
150
TJ (°C)
¯¯Ō
¯ is an input/output terminal.
Note: F̄
SX68000MH-AN
SANKEN ELECTRIC CO., LTD.
19
Applicable to all SX68000MH series
High-Side Shutdown (SD) Filter
versus Junction Temperature
High-Side Shutdown (SD) Low Threshold Voltage
versus Junction Temperature
3.2
Typ.
2.4
SD Filter (μs)
VSDL (V)
2.8
Max.
Min.
2.0
1.6
-25
0
25
50
75
100
125
150
9
8
7
6
5
4
3
2
1
0
-25
Max.
Typ.
Min.
0
25
7.5 V Regulated Output (REG) Voltage
versus Junction Temperature
VCC = 15 V, IREG = 0 A
100
125
150
7.5 V Regulated Output (REG) Voltage
versus Junction Temperature
VCC = 15 V, IREG = 35 mA
8.3
8.3
8.1
8.1
7.9
Max.
7.7
Typ.
7.5
Min.
7.9
VREG (V)
VREG (V)
75
TJ (°C)
TJ (°C)
7.3
7.7
7.5
Max.
7.3
Typ.
7.1
7.1
6.9
6.9
6.7
-25
50
Min.
6.7
0
25
50
75
100
125
150
-25
0
25
TJ (°C)
50
75
100
125
150
TJ (°C)
Typical 7.5 V Regulated Output (REG)
Voltage versus Current
VCC = 15 V
8.3
8.1
VREG (V)
7.9
7.7
TJ = –20°C
7.5
TJ = 25°C
TJ = 125°C
7.3
7.1
6.9
6.7
0
5
10
15
20
25
30
35
IREG (mA)
SX68000MH-AN
SANKEN ELECTRIC CO., LTD.
20
MOSFET Characteristics
Applicable to SX68001MH
On-Resistance versus Drain Current
VGS = 15 V
Source to Drain Current versus Voltage
VGS = 0 V
2.0
4
TJ = 125°C
1.5
TJ = 125°C
TJ = 75°C
2
TJ = 25°C
ISD (A)
RDS(on) (Ω)
3
1.0
TJ = 75°C
0.5
1
TJ = 25°C
0
0
0
0.5
1.0
1.5
2.0
0
0.2
0.4
ID (A)
Switching Loss versus Drain Current
VBB = 150 V, VCC = 15 V, TJ = 25°C
1.0
1.2
50
EON (High Side)
EOFF (High Side)
EON (Low Side)
EOFF (Low Side)
30
EON (High Side)
EOFF (High Side)
EON (Low Side)
EOFF (Low Side)
40
E (μJ)
40
E (μJ)
0.8
Switching Loss versus Drain Current
VBB = 150 V, VCC = 15 V, TJ = 125°C
50
20
10
30
20
10
0
0
0
0.5
1.0
1.5
0
2.0
0.5
1.0
1.5
2.0
ID (A)
ID (A)
Recovery Loss versus Drain Current
VBB = 150 V, VCC = 15 V, TJ = 25°C
Recovery Loss versus Drain Current
VBB = 150 V, VCC = 15 V, TJ = 125°C
5
5
4
4
3
Low Side
2
High Side
1
0
E (μJ)
E (μJ)
0.6
VSD (V)
3
Low Side
2
High Side
1
0
0
0.5
1.0
1.5
2.0
0
ID (A)
SX68000MH-AN
0.5
1.0
1.5
2.0
ID (A)
SANKEN ELECTRIC CO., LTD.
21
MOSFET Characteristics
Applicable to SX68002MH
On-Resistance versus Drain Current
VGS = 15 V
8
1.5
TJ = 125°C
7
6
TJ = 75°C
5
4
TJ = 125°C
1.0
ISD (A)
RDS(on) (Ω)
Source to Drain Current versus Voltage
VGS = 0 V
TJ = 25°C
3
TJ = 75°C
0.5
2
TJ = 25°C
1
0
0
0
0.5
1.0
1.5
0
0.2
0.4
ID (A)
0.8
1.0
1.2
1.4
VSD (V)
Switching Loss versus Drain Current
VBB = 300 V, VCC = 15 V, TJ = 25°C
Switching Loss versus Drain Current
VBB = 300 V, VCC = 15 V, TJ = 125°C
200
200
EON (High Side)
EOFF (High Side)
EON (Low Side)
EOFF (Low Side)
EON (High Side)
EOFF (High Side)
EON (Low Side)
EOFF (Low Side)
150
E (μJ)
150
E (μJ)
0.6
100
50
100
50
0
0
0
0.5
1.0
0
1.5
0.5
ID (A)
1.0
1.5
ID (A)
Recovery Loss versus Drain Current
VBB = 300 V, VCC = 15 V, TJ = 25°C
Recovery Loss versus Drain Current
VBB = 300 V, VCC = 15 V, TJ = 125°C
15
15
10
10
Low Side
5
E (μJ)
E (μJ)
Low Side
High Side
5
High Side
0
0
0
0.5
1.0
1.5
0
ID (A)
SX68000MH-AN
0.5
1.0
1.5
ID (A)
SANKEN ELECTRIC CO., LTD.
22
MOSFET Characteristics
Applicable to SX68003MH
On-Resistance versus Drain Current
VGS = 15 V
5
Source to Drain Current versus Voltage
VGS = 0 V
2.5
TJ = 125°C
2.0
TJ = 75°C
3
TJ = 25°C
2
TJ = 125°C
ISD (A)
RDS(on) (Ω)
4
1
1.5
TJ = 75°C
1.0
TJ = 25°C
0.5
0
0
0
0.5
1.0
1.5
2.0
2.5
0
0.5
1.0
ID (A)
Switching Loss versus Drain Current
VBB = 300 V, VCC = 15 V, TJ = 25°C
Switching Loss versus Drain Current
VBB = 300 V, VCC = 15 V, TJ = 125°C
300
300
EON (High Side)
EOFF (High Side)
EON (Low Side)
EOFF (Low Side)
200
EON (High Side)
EOFF (High Side)
EON (Low Side)
EOFF (Low Side)
250
200
E (μJ)
250
E (μJ)
1.5
VSD (V)
150
150
100
100
50
50
0
0
0
0.5
1.0
1.5
2.0
2.5
0
0.5
1.0
1.5
2.0
ID (A)
ID (A)
Recovery Loss versus Drain Current
VBB = 300 V, VCC = 15 V, TJ = 25°C
Recovery Loss versus Drain Current
VBB = 300 V, VCC = 15 V, TJ = 125°C
15
15
10
10
2.5
E (μJ)
Low Side
High Side
5
0
E (μJ)
Low Side
High Side
5
0
0
0.5
1.0
1.5
0
SX68000MH-AN
0.5
1.0
1.5
ID (A)
ID (A)
SANKEN ELECTRIC CO., LTD.
23
• The contents in this document are subject to changes, for improvement and other purposes, without notice. Make sure that this is the
latest revision of the document before use.
• Application and operation examples described in this document are quoted for the sole purpose of reference for the use of the products herein and Sanken can assume no responsibility for any infringement of industrial property rights, intellectual property rights or
any other rights of Sanken or any third party which may result from its use.
• Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure and defect of semiconductor products at a certain rate is inevitable. Users of Sanken products are requested to take, at their own risk, preventative measures
including safety design of the equipment or systems against any possible injury, death, fires or damages to the society due to device
failure or malfunction.
• Sanken products listed in this document are designed and intended for the use as components in general purpose electronic equipment or apparatus (home appliances, office equipment, telecommunication equipment, measuring equipment, etc.).
When considering the use of Sanken products in the applications where higher reliability is required (transportation equipment and
its control systems, traffic signal control systems or equipment, fire/crime alarm systems, various safety devices, etc.), and whenever
long life expectancy is required even in general purpose electronic equipment or apparatus, please contact your nearest Sanken sales
representative to discuss, prior to the use of the products herein.
The use of Sanken products without the written consent of Sanken in the applications where extremely high reliability is required
(aerospace equipment, nuclear power control systems, life support systems, etc.) is strictly prohibited.
• In the case that you use Sanken products or design your products by using Sanken products, the reliability largely depends on the
degree of derating to be made to the rated values. Derating may be interpreted as a case that an operation range is set by derating the
load from each rated value or surge voltage or noise is considered for derating in order to assure or improve the reliability. In general,
derating factors include electric stresses such as electric voltage, electric current, electric power etc., environmental stresses such
as ambient temperature, humidity etc. and thermal stress caused due to self-heating of semiconductor products. For these stresses,
instantaneous values, maximum values and minimum values must be taken into consideration.
In addition, it should be noted that since power devices or IC's including power devices have large self-heating value, the degree of
derating of junction temperature affects the reliability significantly.
• When using the products specified herein by either (i) combining other products or materials therewith or (ii) physically, chemically
or otherwise processing or treating the products, please duly consider all possible risks that may result from all such uses in advance
and proceed therewith at your own responsibility.
• Anti radioactive ray design is not considered for the products listed herein.
• Sanken assumes no responsibility for any troubles, such as dropping products caused during transportation out of Sanken's distribution network.
• The contents in this document must not be transcribed or copied without Sanken's written consent.
SX68000MH-AN
SANKEN ELECTRIC CO., LTD.
24
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